Fadt.c 9.6 KB

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  1. /** @file
  2. This file contains a structure definition for the ACPI 5.0 Fixed ACPI
  3. Description Table (FADT). The contents of this file should only be modified
  4. for bug fixes, no porting is required.
  5. Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
  6. SPDX-License-Identifier: BSD-2-Clause-Patent
  7. **/
  8. //
  9. // Statements that include other files
  10. //
  11. #include <IndustryStandard/Acpi.h>
  12. //
  13. // FADT Definitions
  14. //
  15. #define EFI_ACPI_OEM_FADT_REVISION 0x00000000
  16. #define EFI_ACPI_PREFERRED_PM_PROFILE 0x00 // To be fixed
  17. #define EFI_ACPI_SCI_INT 0x0009
  18. #define EFI_ACPI_SMI_CMD 0x000000B2
  19. #define EFI_ACPI_ACPI_ENABLE 0 // To be fixed
  20. #define EFI_ACPI_ACPI_DISABLE 0 // To be fixed
  21. #define EFI_ACPI_S4_BIOS_REQ 0x00
  22. #define EFI_ACPI_CST_CNT 0x00
  23. #define EFI_ACPI_PSTATE_CNT 0x00
  24. #define EFI_ACPI_GPE1_BASE (EFI_ACPI_GPE1_BLK_BIT_WIDTH / 2)
  25. #define EFI_ACPI_P_LVL2_LAT 0x0065 // 101
  26. #define EFI_ACPI_P_LVL3_LAT 0x03E9 // 1001
  27. #define EFI_ACPI_FLUSH_SIZE 0x0000
  28. #define EFI_ACPI_FLUSH_STRIDE 0x0000
  29. #define EFI_ACPI_DUTY_OFFSET 0x01
  30. #define EFI_ACPI_DUTY_WIDTH 0x00
  31. #define EFI_ACPI_DAY_ALRM 0x0D
  32. #define EFI_ACPI_MON_ALRM 0x00
  33. #define EFI_ACPI_CENTURY 0x32
  34. //
  35. // IA-PC Boot Architecture Flags
  36. //
  37. #define EFI_ACPI_IAPC_BOOT_ARCH 0 // To be fixed
  38. //
  39. // Fixed Feature Flags
  40. //
  41. #define EFI_ACPI_FIXED_FEATURE_FLAGS 0 // To be fixed
  42. //
  43. // PM1A Event Register Block Generic Address Information
  44. //
  45. #define EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
  46. #define EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH 0x20
  47. #define EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET 0x00
  48. #define EFI_ACPI_PM1A_EVT_BLK_ADDRESS 0 // To be fixed
  49. //
  50. // PM1B Event Register Block Generic Address Information
  51. //
  52. #define EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
  53. #define EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH 0x00
  54. #define EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET 0x00
  55. #define EFI_ACPI_PM1B_EVT_BLK_ADDRESS 0 // To be fixed
  56. //
  57. // PM1A Control Register Block Generic Address Information
  58. //
  59. #define EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
  60. #define EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH 0x10
  61. #define EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET 0x00
  62. #define EFI_ACPI_PM1A_CNT_BLK_ADDRESS 0 // To be fixed
  63. //
  64. // PM1B Control Register Block Generic Address Information
  65. //
  66. #define EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
  67. #define EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH 0x00
  68. #define EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET 0x00
  69. #define EFI_ACPI_PM1B_CNT_BLK_ADDRESS 0 // To be fixed
  70. //
  71. // PM2 Control Register Block Generic Address Information
  72. //
  73. #define EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
  74. #define EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH 0x08
  75. #define EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET 0x00
  76. #define EFI_ACPI_PM2_CNT_BLK_ADDRESS 0 // To be fixed
  77. //
  78. // Power Management Timer Control Register Block Generic Address
  79. // Information
  80. //
  81. #define EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
  82. #define EFI_ACPI_PM_TMR_BLK_BIT_WIDTH 0x20
  83. #define EFI_ACPI_PM_TMR_BLK_BIT_OFFSET 0x00
  84. #define EFI_ACPI_PM_TMR_BLK_ADDRESS 0 // To be fixed
  85. //
  86. // General Purpose Event 0 Register Block Generic Address
  87. // Information
  88. //
  89. #define EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
  90. #define EFI_ACPI_GPE0_BLK_BIT_WIDTH 0 // size of R_PCH_ACPI_GPE0_STS_127_96 + R_PCH_ACPI_GPE0_EN_127_96
  91. #define EFI_ACPI_GPE0_BLK_BIT_OFFSET 0x00
  92. #define EFI_ACPI_GPE0_BLK_ADDRESS 0 // To be fixed
  93. //
  94. // General Purpose Event 1 Register Block Generic Address
  95. // Information
  96. //
  97. #define EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
  98. #define EFI_ACPI_GPE1_BLK_BIT_WIDTH 0x0
  99. #define EFI_ACPI_GPE1_BLK_BIT_OFFSET 0x0
  100. #define EFI_ACPI_GPE1_BLK_ADDRESS 0 // To be fixed
  101. //
  102. // Reset Register Generic Address Information
  103. //
  104. #define EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID EFI_ACPI_2_0_SYSTEM_IO
  105. #define EFI_ACPI_RESET_REG_BIT_WIDTH 0x08
  106. #define EFI_ACPI_RESET_REG_BIT_OFFSET 0x00
  107. #define EFI_ACPI_RESET_REG_ADDRESS 0x00000CF9
  108. #define EFI_ACPI_RESET_VALUE 0x06
  109. //
  110. // Number of bytes decoded by PM1 event blocks (a and b)
  111. //
  112. #define EFI_ACPI_PM1_EVT_LEN ((EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH) / 8)
  113. //
  114. // Number of bytes decoded by PM1 control blocks (a and b)
  115. //
  116. #define EFI_ACPI_PM1_CNT_LEN ((EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH) / 8)
  117. //
  118. // Number of bytes decoded by PM2 control block
  119. //
  120. #define EFI_ACPI_PM2_CNT_LEN (EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH / 8)
  121. //
  122. // Number of bytes decoded by PM timer block
  123. //
  124. #define EFI_ACPI_PM_TMR_LEN (EFI_ACPI_PM_TMR_BLK_BIT_WIDTH / 8)
  125. //
  126. // Number of bytes decoded by GPE0 block
  127. //
  128. #define EFI_ACPI_GPE0_BLK_LEN (EFI_ACPI_GPE0_BLK_BIT_WIDTH / 8)
  129. //
  130. // Number of bytes decoded by GPE1 block
  131. //
  132. #define EFI_ACPI_GPE1_BLK_LEN (EFI_ACPI_GPE1_BLK_BIT_WIDTH / 8)
  133. //
  134. // Fixed ACPI Description Table
  135. // Please modify all values in Fadt.h only.
  136. //
  137. EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
  138. {
  139. EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
  140. sizeof (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE),
  141. EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
  142. //
  143. // Checksum will be updated at runtime
  144. //
  145. 0x00,
  146. //
  147. // It is expected that these values will be updated at runtime
  148. //
  149. { ' ', ' ', ' ', ' ', ' ', ' ' },
  150. 0,
  151. EFI_ACPI_OEM_FADT_REVISION,
  152. 0,
  153. 0
  154. },
  155. //
  156. // These addresses will be updated at runtime
  157. //
  158. 0x00000000,
  159. 0x00000000,
  160. EFI_ACPI_RESERVED_BYTE,
  161. EFI_ACPI_PREFERRED_PM_PROFILE,
  162. EFI_ACPI_SCI_INT,
  163. EFI_ACPI_SMI_CMD,
  164. EFI_ACPI_ACPI_ENABLE,
  165. EFI_ACPI_ACPI_DISABLE,
  166. EFI_ACPI_S4_BIOS_REQ,
  167. EFI_ACPI_PSTATE_CNT,
  168. EFI_ACPI_PM1A_EVT_BLK_ADDRESS,
  169. EFI_ACPI_PM1B_EVT_BLK_ADDRESS,
  170. EFI_ACPI_PM1A_CNT_BLK_ADDRESS,
  171. EFI_ACPI_PM1B_CNT_BLK_ADDRESS,
  172. EFI_ACPI_PM2_CNT_BLK_ADDRESS,
  173. EFI_ACPI_PM_TMR_BLK_ADDRESS,
  174. EFI_ACPI_GPE0_BLK_ADDRESS,
  175. EFI_ACPI_GPE1_BLK_ADDRESS,
  176. EFI_ACPI_PM1_EVT_LEN,
  177. EFI_ACPI_PM1_CNT_LEN,
  178. EFI_ACPI_PM2_CNT_LEN,
  179. EFI_ACPI_PM_TMR_LEN,
  180. EFI_ACPI_GPE0_BLK_LEN,
  181. EFI_ACPI_GPE1_BLK_LEN,
  182. EFI_ACPI_GPE1_BASE,
  183. //
  184. // Latest OS have C-State capability and CST_CNT SMI doesn't need to be defined.
  185. // CST_CNT SMI is not handled in BIOS and it can be removed safely.
  186. //
  187. EFI_ACPI_CST_CNT,
  188. EFI_ACPI_P_LVL2_LAT,
  189. EFI_ACPI_P_LVL3_LAT,
  190. EFI_ACPI_FLUSH_SIZE,
  191. EFI_ACPI_FLUSH_STRIDE,
  192. EFI_ACPI_DUTY_OFFSET,
  193. EFI_ACPI_DUTY_WIDTH,
  194. EFI_ACPI_DAY_ALRM,
  195. EFI_ACPI_MON_ALRM,
  196. EFI_ACPI_CENTURY,
  197. EFI_ACPI_IAPC_BOOT_ARCH,
  198. EFI_ACPI_RESERVED_BYTE,
  199. EFI_ACPI_FIXED_FEATURE_FLAGS,
  200. //
  201. // Reset Register Block
  202. //
  203. {
  204. EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID,
  205. EFI_ACPI_RESET_REG_BIT_WIDTH,
  206. EFI_ACPI_RESET_REG_BIT_OFFSET,
  207. EFI_ACPI_5_0_BYTE,
  208. EFI_ACPI_RESET_REG_ADDRESS
  209. },
  210. EFI_ACPI_RESET_VALUE,
  211. {
  212. EFI_ACPI_RESERVED_BYTE,
  213. EFI_ACPI_RESERVED_BYTE,
  214. EFI_ACPI_RESERVED_BYTE
  215. },
  216. //
  217. // These addresses will be updated at runtime
  218. //
  219. 0x0000000000000000, // X_FIRMWARE_CTRL
  220. 0x0000000000000000, // X_DSDT
  221. {
  222. //
  223. // X_PM1a Event Register Block
  224. //
  225. EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID,
  226. EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH,
  227. EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET,
  228. EFI_ACPI_5_0_WORD,
  229. EFI_ACPI_PM1A_EVT_BLK_ADDRESS
  230. },
  231. {
  232. //
  233. // X_PM1b Event Register Block
  234. //
  235. EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID,
  236. EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH,
  237. EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET,
  238. EFI_ACPI_5_0_WORD,
  239. EFI_ACPI_PM1B_EVT_BLK_ADDRESS
  240. },
  241. {
  242. //
  243. // X_PM1a Control Register Block
  244. //
  245. EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID,
  246. EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH,
  247. EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET,
  248. EFI_ACPI_5_0_WORD,
  249. EFI_ACPI_PM1A_CNT_BLK_ADDRESS
  250. },
  251. {
  252. //
  253. // X_PM1b Control Register Block
  254. //
  255. EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID,
  256. EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH,
  257. EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET,
  258. EFI_ACPI_5_0_WORD,
  259. EFI_ACPI_PM1B_CNT_BLK_ADDRESS
  260. },
  261. {
  262. //
  263. // X_PM2 Control Register Block
  264. //
  265. EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID,
  266. EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH,
  267. EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET,
  268. EFI_ACPI_5_0_BYTE,
  269. EFI_ACPI_PM2_CNT_BLK_ADDRESS
  270. },
  271. {
  272. //
  273. // X_PM Timer Control Register Block
  274. //
  275. EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID,
  276. EFI_ACPI_PM_TMR_BLK_BIT_WIDTH,
  277. EFI_ACPI_PM_TMR_BLK_BIT_OFFSET,
  278. EFI_ACPI_5_0_DWORD,
  279. EFI_ACPI_PM_TMR_BLK_ADDRESS
  280. },
  281. {
  282. //
  283. // X_General Purpose Event 0 Register Block
  284. //
  285. EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID,
  286. EFI_ACPI_GPE0_BLK_BIT_WIDTH,
  287. EFI_ACPI_GPE0_BLK_BIT_OFFSET,
  288. EFI_ACPI_5_0_BYTE,
  289. EFI_ACPI_GPE0_BLK_ADDRESS
  290. },
  291. {
  292. //
  293. // X_General Purpose Event 1 Register Block
  294. //
  295. EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID,
  296. EFI_ACPI_GPE1_BLK_BIT_WIDTH,
  297. EFI_ACPI_GPE1_BLK_BIT_OFFSET,
  298. EFI_ACPI_5_0_BYTE,
  299. EFI_ACPI_GPE1_BLK_ADDRESS
  300. },
  301. {
  302. //
  303. // Sleep Control Reg - update in DXE driver
  304. //
  305. 0,
  306. 0,
  307. 0,
  308. 0,
  309. 0
  310. },
  311. {
  312. //
  313. // Sleep Status Reg - update in DXE driver
  314. //
  315. 0,
  316. 0,
  317. 0,
  318. 0,
  319. 0
  320. }
  321. };