12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051 |
- /** @file
- Copyright (c) 2023, Ampere Computing LLC. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
- **/
- //
- // S1 Start here
- //
- // PCIE6 S1 RCA2
- Device (PCIA) {
- //
- // Hardware ID must be PNP0A08, which maps to a PCIe root complex.
- // Section 6.1.5
- //
- Name (_HID,"PNP0A08")
- Name (_CCA, ONE)
- Method (_STA, 0, NotSerialized) {
- Return (0xF)
- }
- //
- // Optionally, include a compatible ID of PNP0A03, which maps to a PCI
- // root complex for use with pre-PCIe operating systems.
- // Section 6.1.2
- //
- Name (_CID,"PNP0A03")
- //
- // Declare the segment number of this root complex. Most systems only
- // have one segment, which is numbered 0.
- // Section 6.5.6
- //
- Name (_SEG, 6)
- //
- // Declare the base bus number, which is the bus number of the root
- // bus in this root complex. This is usually 0, but need not be.
- // For root complexes supporting multiple root busses, this should
- // be the lowest numbered root bus.
- // Section 6.5.5
- //
- Name (_BBN, 0)
- //
- // The _UID value provides a way of uniquely identifying a device
- // in the case where more than one instance of a specific device
- // is implemented with the same _HID/_CID. For systems with a
- // single root complex, this is usually just 0. For systems with
- // multiple root complexes, this should be different for each
- // root complex.
- // Section 6.1.12
- //
- Name (_UID, "PCIA")
- Name (_STR, Unicode("PCIe 10 Device"))
- //
- // Declare the PCI Routing Table.
- // This defines SPI mappings of the four line-based interrupts
- // associated with the root complex and hierarchy below it.
- // Section 6.2.12
- //
- Name (_PRT, Package() {
- //
- // Routing for device 0, all functions.
- // Note: ARM doesn't support LNK nodes, so the third param
- // is 0 and the fourth param is the SPI number of the interrupt
- // line. In this example, the A/B/C/D interrupts are wired to
- // SPI lines 136/137/138/139 + 320 respectively. PCIA RCA2
- //
- Package() {0x0001FFFF, 0, 0, 456},
- Package() {0x0001FFFF, 1, 0, 457},
- Package() {0x0001FFFF, 2, 0, 458},
- Package() {0x0001FFFF, 3, 0, 459},
- Package() {0x0002FFFF, 0, 0, 456},
- Package() {0x0002FFFF, 1, 0, 457},
- Package() {0x0002FFFF, 2, 0, 458},
- Package() {0x0002FFFF, 3, 0, 459},
- Package() {0x0003FFFF, 0, 0, 456},
- Package() {0x0003FFFF, 1, 0, 457},
- Package() {0x0003FFFF, 2, 0, 458},
- Package() {0x0003FFFF, 3, 0, 459},
- Package() {0x0004FFFF, 0, 0, 456},
- Package() {0x0004FFFF, 1, 0, 457},
- Package() {0x0004FFFF, 2, 0, 458},
- Package() {0x0004FFFF, 3, 0, 459},
- })
- //
- // Declare the resources assigned to this root complex.
- // Section 6.2.2
- //
- Method (_CBA, 0, Serialized) {
- Return (0x7BFFF0000000)
- }
- Name (RBUF, ResourceTemplate () {
- //
- // Declare the range of bus numbers assigned to this root
- // complex. In this example, the minimum bus number will be
- // 0, the maximum bus number will be 0xFF, supporting
- // 256 busses total.
- // Section 19.5.141
- //
- WordBusNumber (
- ResourceProducer,
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- PosDecode, // Decode
- 0, // AddressGranularity
- 0, // AddressMinimum - Minimum Bus Number
- 255, // AddressMaximum - Maximum Bus Number
- 0, // AddressTranslation - Set to 0
- 256) // RangeLength - Number of Busses
- //
- // Declare the memory range to be used for BAR memory
- // windows. This declares a 4GB region starting at
- // 0x4000000000.
- // Section 19.5.80
- //
- // Memory32Fixed (ReadWrite, 0x1FF80000, 0x10000, )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000000070000000, // AddressMinimum - MIN
- 0x0000000077FFFFFF, // AddressMinimum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x0000000008000000 // RangeLength - LEN
- )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000780000000000, // AddressMinimum - MIN
- 0x00007BFFDFFFFFFF, // AddressMaximum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x000003FFE0000000 // RangeLength - LEN
- )
- })
- Method (_CRS, 0, Serialized) {
- Return (RBUF)
- }
- //
- // Declare an _OSC (OS Control Handoff) method which takes 4 arguments.
- //
- // Argments:
- // Arg0 A Buffer containing a UUID
- // Arg1 An Integer containing a Revision ID of the buffer format
- // Arg2 An Integer containing a count of entries in Arg3
- // Arg3 A Buffer containing a list of DWORD capabilities
- // Return Value:
- // A Buffer containing a list of capabilities
- // See the APCI spec, Section 6.2.10,
- // and the PCI FW spec, Section 4.5.
- //
- // The following is an example, and may need modification for
- // specific implementations.
- //
- Name (SUPP,0) // PCI _OSC Support Field value
- Name (CTRL,0) // PCI _OSC Control Field value
- Method (_OSC, 4) {
- //
- // Look for the PCI Host Bridge Interface UUID.
- // Section 6.2.10.3
- //
- //
- // Create DWord-adressable fields from the Capabilities Buffer
- // Create CDW1 outside the test as it's used in the else clause.
- //
- CreateDWordField (Arg3,0,CDW1)
- If (LEqual (Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
- CreateDWordField (Arg3,4,CDW2)
- CreateDWordField (Arg3,8,CDW3)
- //
- // Save Capabilities DWord 2 & 3
- //
- Store (CDW2,SUPP)
- Store (CDW3,CTRL)
- //
- // Only allow native hot plug control if OS supports:
- // ASPM
- // Clock PM
- // MSI/MSI-X
- //
- If (LNotEqual (And (SUPP, 0x16), 0x16)) {
- //
- // Mask bit 0 (and undefined bits)
- //
- And (CTRL,0x1E,CTRL)
- }
- //
- // Never allow native Hot plug, PME.
- // Never allow SHPC (no SHPC controller in this system).
- // Only allow PCIe AER control if PCIe AER Firmware-First is disabled
- // Allows PCI Express Capability Structure control
- //
- if (AERF) {
- And (CTRL, 0x10, CTRL)
- } Else {
- And (CTRL, 0x18, CTRL)
- }
- //
- // Check for unknown revision.
- //
- If (LNotEqual (Arg1,One)) {
- Or (CDW1,0x08,CDW1)
- }
- //
- // Check if capabilities bits were masked.
- //
- If (LNotEqual (CDW3,CTRL)) {
- Or (CDW1,0x10,CDW1)
- }
- //
- // Update DWORD3 in the buffer.
- //
- Store (CTRL,CDW3)
- Return (Arg3)
- } Else {
- //
- // Unrecognized UUID
- //
- Or (CDW1,4,CDW1)
- Return (Arg3)
- }
- } // End _OSC
- //
- // Declare a _DSM method for various functions called by the OS.
- // See the APCI spec, Section 9.14.1,
- // and the PCI FW spec, Section 4.6.
- // See also:
- // http://download.microsoft.com/download/9/c/5/9c5b2167-8017-4bae-9fde-d599bac8184a/PCI-rsc.doc
- //
- Method (_DSM, 0x4, Serialized) {
- //
- // Match against the _DSM PCI GUID.
- //
- If (LEqual (Arg0,ToUUID("E5C937D0-3553-4d7a-9117-EA4D19C3434D"))) {
- Switch (ToInteger(Arg2)) {
- //
- // Function 0: Return supported functions as a bitfield
- // with one bit for each supported function.
- // Bit 0 must always be set, as that represents
- // function 0 (which is what is being called here).
- // Support for different functions may depend on
- // the revision ID of the interface, passed as Arg1.
- //
- Case (0) {
- //
- // Functions 0-7 are supported.
- //
- Return (Buffer() {0x01})
- }
- }
- }
- //
- // If not one of the function identifiers we recognize, then return a buffer
- // with bit 0 set to 0 indicating no functions supported.
- //
- Return (Buffer() {0})
- }
- //
- // Root Port 0 Device within the Root Complex.
- //
- Device (RP0) {
- //
- // Device 0, Function 0.
- //
- Name (_ADR, 0x00000000)
- }
- Method (_PXM, 0, NotSerialized) {
- // Patch by code
- Return(0xFF)
- }
- } // PCIA RCA2
- // PCIEB RCA3
- Device (PCIB) {
- //
- // Hardware ID must be PNP0A08, which maps to a PCIe root complex.
- // Section 6.1.5
- //
- Name (_HID,"PNP0A08")
- Name (_CCA, ONE)
- Method (_STA, 0, NotSerialized) {
- Return (0xF)
- }
- //
- // Optionally, include a compatible ID of PNP0A03, which maps to a PCI
- // root complex for use with pre-PCIe operating systems.
- // Section 6.1.2
- //
- Name (_CID,"PNP0A03")
- //
- // Declare the segment number of this root complex. Most systems only
- // have one segment, which is numbered 0.
- // Section 6.5.6
- //
- Name (_SEG, 7)
- //
- // Declare the base bus number, which is the bus number of the root
- // bus in this root complex. This is usually 0, but need not be.
- // For root complexes supporting multiple root busses, this should
- // be the lowest numbered root bus.
- // Section 6.5.5
- //
- Name (_BBN, 0)
- //
- // The _UID value provides a way of uniquely identifying a device
- // in the case where more than one instance of a specific device
- // is implemented with the same _HID/_CID. For systems with a
- // single root complex, this is usually just 0. For systems with
- // multiple root complexes, this should be different for each
- // root complex.
- // Section 6.1.12
- //
- Name (_UID, "PCIB")
- Name (_STR, Unicode("PCIe 11 Device"))
- //
- // Declare the PCI Routing Table.
- // This defines SPI mappings of the four line-based interrupts
- // associated with the root complex and hierarchy below it.
- // Section 6.2.12
- //
- Name (_PRT, Package() {
- //
- // Routing for device 0, all functions.
- // Note: ARM doesn't support LNK nodes, so the third param
- // is 0 and the fourth param is the SPI number of the interrupt
- // line. In this example, the A/B/C/D interrupts are wired to
- // SPI lines 140/141/142/143 + 320 respectively. PCIB RCA3
- //
- Package() {0x0001FFFF, 0, 0, 460},
- Package() {0x0001FFFF, 1, 0, 461},
- Package() {0x0001FFFF, 2, 0, 462},
- Package() {0x0001FFFF, 3, 0, 463},
- Package() {0x0002FFFF, 0, 0, 460},
- Package() {0x0002FFFF, 1, 0, 461},
- Package() {0x0002FFFF, 2, 0, 462},
- Package() {0x0002FFFF, 3, 0, 463},
- Package() {0x0003FFFF, 0, 0, 460},
- Package() {0x0003FFFF, 1, 0, 461},
- Package() {0x0003FFFF, 2, 0, 462},
- Package() {0x0003FFFF, 3, 0, 463},
- Package() {0x0004FFFF, 0, 0, 460},
- Package() {0x0004FFFF, 1, 0, 461},
- Package() {0x0004FFFF, 2, 0, 462},
- Package() {0x0004FFFF, 3, 0, 463},
- })
- //
- // Declare the resources assigned to this root complex.
- // Section 6.2.2
- //
- Method (_CBA, 0, Serialized) {
- Return (0x7FFFF0000000)
- }
- Name (RBUF, ResourceTemplate () {
- //
- // Declare the range of bus numbers assigned to this root
- // complex. In this example, the minimum bus number will be
- // 0, the maximum bus number will be 0xFF, supporting
- // 256 busses total.
- // Section 19.5.141
- //
- WordBusNumber (
- ResourceProducer,
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- PosDecode, // Decode
- 0, // AddressGranularity
- 0, // AddressMinimum - Minimum Bus Number
- 255, // AddressMaximum - Maximum Bus Number
- 0, // AddressTranslation - Set to 0
- 256) // RangeLength - Number of Busses
- //
- // Declare the memory range to be used for BAR memory
- // windows. This declares a 4GB region starting at
- // 0x4000000000.
- // Section 19.5.80
- //
- // Memory32Fixed (ReadWrite, 0x1FFC0000, 0x10000, )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000000078000000, // AddressMinimum - MIN
- 0x000000007FFFFFFF, // AddressMinimum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x0000000008000000 // RangeLength - LEN
- )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x00007C0000000000, // AddressMinimum - MIN
- 0x00007FFFDFFFFFFF, // AddressMaximum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x000003FFE0000000 // RangeLength - LEN
- )
- })
- Method (_CRS, 0, Serialized) {
- Return (RBUF)
- }
- //
- // Declare an _OSC (OS Control Handoff) method which takes 4 arguments.
- //
- // Argments:
- // Arg0 A Buffer containing a UUID
- // Arg1 An Integer containing a Revision ID of the buffer format
- // Arg2 An Integer containing a count of entries in Arg3
- // Arg3 A Buffer containing a list of DWORD capabilities
- // Return Value:
- // A Buffer containing a list of capabilities
- // See the APCI spec, Section 6.2.10,
- // and the PCI FW spec, Section 4.5.
- //
- // The following is an example, and may need modification for
- // specific implementations.
- //
- Name (SUPP,0) // PCI _OSC Support Field value
- Name (CTRL,0) // PCI _OSC Control Field value
- Method (_OSC, 4) {
- //
- // Look for the PCI Host Bridge Interface UUID.
- // Section 6.2.10.3
- //
- //
- // Create DWord-adressable fields from the Capabilities Buffer
- // Create CDW1 outside the test as it's used in the else clause.
- //
- CreateDWordField (Arg3,0,CDW1)
- If (LEqual (Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
- CreateDWordField (Arg3,4,CDW2)
- CreateDWordField (Arg3,8,CDW3)
- //
- // Save Capabilities DWord 2 & 3
- //
- Store (CDW2,SUPP)
- Store (CDW3,CTRL)
- //
- // Only allow native hot plug control if OS supports:
- // ASPM
- // Clock PM
- // MSI/MSI-X
- //
- If (LNotEqual (And (SUPP, 0x16), 0x16)) {
- //
- // Mask bit 0 (and undefined bits)
- //
- And (CTRL,0x1E,CTRL)
- }
- //
- // Never allow native Hot plug, PME.
- // Never allow SHPC (no SHPC controller in this system).
- // Only allow PCIe AER control if PCIe AER Firmware-First is disabled
- // Allows PCI Express Capability Structure control
- //
- if (AERF) {
- And (CTRL, 0x10, CTRL)
- } Else {
- And (CTRL, 0x18, CTRL)
- }
- //
- // Check for unknown revision.
- //
- If (LNotEqual (Arg1,One)) {
- Or (CDW1,0x08,CDW1)
- }
- //
- // Check if capabilities bits were masked.
- //
- If (LNotEqual (CDW3,CTRL)) {
- Or (CDW1,0x10,CDW1)
- }
- //
- // Update DWORD3 in the buffer.
- //
- Store (CTRL,CDW3)
- Return (Arg3)
- } Else {
- //
- // Unrecognized UUID
- //
- Or (CDW1,4,CDW1)
- Return (Arg3)
- }
- } // End _OSC
- //
- // Declare a _DSM method for various functions called by the OS.
- // See the APCI spec, Section 9.14.1,
- // and the PCI FW spec, Section 4.6.
- // See also:
- // http://download.microsoft.com/download/9/c/5/9c5b2167-8017-4bae-9fde-d599bac8184a/PCI-rsc.doc
- //
- Method (_DSM, 0x4, Serialized) {
- //
- // Match against the _DSM PCI GUID.
- //
- If (LEqual (Arg0,ToUUID("E5C937D0-3553-4d7a-9117-EA4D19C3434D"))) {
- Switch (ToInteger(Arg2)) {
- //
- // Function 0: Return supported functions as a bitfield
- // with one bit for each supported function.
- // Bit 0 must always be set, as that represents
- // function 0 (which is what is being called here).
- // Support for different functions may depend on
- // the revision ID of the interface, passed as Arg1.
- //
- Case (0) {
- //
- // Functions 0-7 are supported.
- //
- Return (Buffer() {0x01})
- }
- }
- }
- //
- // If not one of the function identifiers we recognize, then return a buffer
- // with bit 0 set to 0 indicating no functions supported.
- //
- Return (Buffer() {0})
- }
- //
- // Root Port 0 Device within the Root Complex.
- //
- Device (RP0) {
- //
- // Device 0, Function 0.
- //
- Name (_ADR, 0x00000000)
- }
- Method (_PXM, 0, NotSerialized) {
- // Patch by code
- Return(0xFF)
- }
- } // PCIB RCA3
- // PCIC RCA4
- Device (PCIC) {
- //
- // Hardware ID must be PNP0A08, which maps to a PCIe root complex.
- // Section 6.1.5
- //
- Name (_HID, "PNP0A08")
- Name (_CCA, ONE)
- Method (_STA, 0, NotSerialized) {
- Return (0xF) // The default value is 0x0. Unfortunately, it breaks
- // run-time patching as the representation of 0 is special
- // encoding and cannot be patched to expand with extra bytes
- // easily. As such, we default to 0xF and patch this based
- // on whether the port was enabled or not by the BIOS.
- }
- //
- // Optionally, include a compatible ID of PNP0A03, which maps to a PCI
- // root complex for use with pre-PCIe operating systems.
- // Section 6.1.2
- //
- Name (_CID, "PNP0A03")
- //
- // Declare the segment number of this root complex. Most systems only
- // have one segment, which is numbered 0.
- // Section 6.5.6
- //
- Name (_SEG, 8)
- //
- // Declare the base bus number, which is the bus number of the root
- // bus in this root complex. This is usually 0, but need not be.
- // For root complexes supporting multiple root busses, this should
- // be the lowest numbered root bus.
- // Section 6.5.5
- //
- Name (_BBN, 0)
- //
- // The _UID value provides a way of uniquely identifying a device
- // in the case where more than one instance of a specific device
- // is implemented with the same _HID/_CID. For systems with a
- // single root complex, this is usually just 0. For systems with
- // multiple root complexes, this should be different for each
- // root complex.
- // Section 6.1.12
- //
- Name (_UID, "PCIC")
- Name (_STR, Unicode("PCIe 12 Device"))
- //
- // Declare the PCI Routing Table.
- // This defines SPI mappings of the four line-based interrupts
- // associated with the root complex and hierarchy below it.
- // Section 6.2.12
- //
- Name (_PRT, Package() {
- //
- // Routing for device 0, all functions.
- // Note: ARM doesn't support LNK nodes, so the third param
- // is 0 and the fourth param is the SPI number of the interrupt
- // line. In this example, the A/B/C/D interrupts are wired to
- // SPI lines 144/145/146/147 + 320 respectively. PCIC RCA4
- //
- Package() {0x0001FFFF, 0, 0, 464},
- Package() {0x0001FFFF, 1, 0, 465},
- Package() {0x0001FFFF, 2, 0, 466},
- Package() {0x0001FFFF, 3, 0, 467},
- Package() {0x0002FFFF, 0, 0, 464},
- Package() {0x0002FFFF, 1, 0, 465},
- Package() {0x0002FFFF, 2, 0, 466},
- Package() {0x0002FFFF, 3, 0, 467},
- Package() {0x0003FFFF, 0, 0, 464},
- Package() {0x0003FFFF, 1, 0, 465},
- Package() {0x0003FFFF, 2, 0, 466},
- Package() {0x0003FFFF, 3, 0, 467},
- Package() {0x0004FFFF, 0, 0, 464},
- Package() {0x0004FFFF, 1, 0, 465},
- Package() {0x0004FFFF, 2, 0, 466},
- Package() {0x0004FFFF, 3, 0, 467},
- Package() {0x0005FFFF, 0, 0, 464},
- Package() {0x0005FFFF, 1, 0, 465},
- Package() {0x0005FFFF, 2, 0, 466},
- Package() {0x0005FFFF, 3, 0, 467},
- Package() {0x0006FFFF, 0, 0, 464},
- Package() {0x0006FFFF, 1, 0, 465},
- Package() {0x0006FFFF, 2, 0, 466},
- Package() {0x0006FFFF, 3, 0, 467},
- Package() {0x0007FFFF, 0, 0, 464},
- Package() {0x0007FFFF, 1, 0, 465},
- Package() {0x0007FFFF, 2, 0, 466},
- Package() {0x0007FFFF, 3, 0, 467},
- Package() {0x0008FFFF, 0, 0, 464},
- Package() {0x0008FFFF, 1, 0, 465},
- Package() {0x0008FFFF, 2, 0, 466},
- Package() {0x0008FFFF, 3, 0, 467},
- })
- //
- // Declare the resources assigned to this root complex.
- // Section 6.2.2
- //
- Method (_CBA, 0, Serialized) {
- Return (0x63FFF0000000)
- }
- Name (RBUF, ResourceTemplate () {
- //
- // Declare the range of bus numbers assigned to this root
- // complex. In this example, the minimum bus number will be
- // 0, the maximum bus number will be 0xFF, supporting
- // 256 busses total.
- // Section 19.5.141
- //
- WordBusNumber (
- ResourceProducer,
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- PosDecode, // Decode
- 0, // AddressGranularity
- 0, // AddressMinimum - Minimum Bus Number
- 255, // AddressMaximum - Maximum Bus Number
- 0, // AddressTranslation - Set to 0
- 256) // RangeLength - Number of Busses
- //
- // Declare the memory range to be used for BAR memory
- // windows. This declares a 4GB region starting at
- // 0x4000000000.
- // Section 19.5.80
- //
- // Memory32Fixed (ReadWrite, 0x1FE40000, 0x10000, )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000000040000000, // AddressMinimum - MIN
- 0x0000000047FFFFFF, // AddressMinimum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x0000000008000000 // RangeLength - LEN
- )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000600000000000, // AddressMinimum - MIN
- 0x000063FFDFFFFFFF, // AddressMaximum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x000003FFE0000000 // RangeLength - LEN
- )
- })
- Method (_CRS, 0, Serialized) {
- Return (RBUF)
- }
- //
- // Declare an _OSC (OS Control Handoff) method which takes 4 arguments.
- //
- // Argments:
- // Arg0 A Buffer containing a UUID
- // Arg1 An Integer containing a Revision ID of the buffer format
- // Arg2 An Integer containing a count of entries in Arg3
- // Arg3 A Buffer containing a list of DWORD capabilities
- // Return Value:
- // A Buffer containing a list of capabilities
- // See the APCI spec, Section 6.2.10,
- // and the PCI FW spec, Section 4.5.
- //
- // The following is an example, and may need modification for
- // specific implementations.
- //
- Name (SUPP,0) // PCI _OSC Support Field value
- Name (CTRL,0) // PCI _OSC Control Field value
- Method (_OSC, 4) {
- //
- // Look for the PCI Host Bridge Interface UUID.
- // Section 6.2.10.3
- //
- //
- // Create DWord-adressable fields from the Capabilities Buffer
- // Create CDW1 outside the test as it's used in the else clause.
- //
- CreateDWordField (Arg3, 0, CDW1)
- If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
- CreateDWordField (Arg3, 4, CDW2)
- CreateDWordField (Arg3, 8, CDW3)
- //
- // Save Capabilities DWord 2 & 3
- //
- Store (CDW2, SUPP)
- Store (CDW3, CTRL)
- //
- // Only allow native hot plug control if OS supports:
- // ASPM
- // Clock PM
- // MSI/MSI-X
- //
- If (LNotEqual (And (SUPP, 0x16), 0x16)) {
- //
- // Mask bit 0 (and undefined bits)
- //
- And (CTRL, 0x1E, CTRL)
- }
- //
- // Never allow native Hot plug, PME.
- // Never allow SHPC (no SHPC controller in this system).
- // Only allow PCIe AER control if PCIe AER Firmware-First is disabled
- // Allows PCI Express Capability Structure control
- //
- if (AERF) {
- And (CTRL, 0x10, CTRL)
- } Else {
- And (CTRL, 0x18, CTRL)
- }
- //
- // Check for unknown revision.
- //
- If (LNotEqual (Arg1, One)) {
- Or (CDW1, 0x08, CDW1)
- }
- //
- // Check if capabilities bits were masked.
- //
- If (LNotEqual (CDW3, CTRL)) {
- Or (CDW1, 0x10, CDW1)
- }
- //
- // Update DWORD3 in the buffer.
- //
- Store (CTRL, CDW3)
- Return (Arg3)
- } Else {
- //
- // Unrecognized UUID
- //
- Or (CDW1, 4, CDW1)
- Return (Arg3)
- }
- } // End _OSC
- //
- // Declare a _DSM method for various functions called by the OS.
- // See the APCI spec, Section 9.14.1,
- // and the PCI FW spec, Section 4.6.
- // See also:
- // http://download.microsoft.com/download/9/c/5/9c5b2167-8017-4bae-9fde-d599bac8184a/PCI-rsc.doc
- //
- Method (_DSM, 0x4, Serialized) {
- //
- // Match against the _DSM PCI GUID.
- //
- If (LEqual (Arg0, ToUUID("E5C937D0-3553-4d7a-9117-EA4D19C3434D"))) {
- Switch (ToInteger(Arg2)) {
- //
- // Function 0: Return supported functions as a bitfield
- // with one bit for each supported function.
- // Bit 0 must always be set, as that represents
- // function 0 (which is what is being called here).
- // Support for different functions may depend on
- // the revision ID of the interface, passed as Arg1.
- //
- Case (0) {
- //
- // Functions 0-7 are supported.
- //
- Return (Buffer() {0x01})
- }
- }
- }
- //
- // If not one of the function identifiers we recognize, then return a buffer
- // with bit 0 set to 0 indicating no functions supported.
- //
- Return (Buffer() {0})
- }
- //
- // Root Port 0 Device within the Root Complex.
- //
- Device (RP0) {
- //
- // Device 0, Function 0.
- //
- Name (_ADR, 0x00000000)
- }
- Method (_PXM, 0, NotSerialized) {
- // Patch by code
- Return(0xFF)
- }
- } // PCIC RCA4
- // PCID RCA5
- Device (PCID) {
- //
- // Hardware ID must be PNP0A08, which maps to a PCIe root complex.
- // Section 6.1.5
- //
- Name (_HID, "PNP0A08")
- Name (_CCA, ONE)
- Method (_STA, 0, NotSerialized) {
- Return (0xF) // The default value is 0x0. Unfortunately, it breaks
- // run-time patching as the representation of 0 is special
- // encoding and cannot be patched to expand with extra bytes
- // easily. As such, we default to 0xF and patch this based
- // on whether the port was enabled or not by the BIOS.
- }
- //
- // Optionally, include a compatible ID of PNP0A03, which maps to a PCI
- // root complex for use with pre-PCIe operating systems.
- // Section 6.1.2
- //
- Name (_CID, "PNP0A03")
- //
- // Declare the segment number of this root complex. Most systems only
- // have one segment, which is numbered 0.
- // Section 6.5.6
- //
- Name (_SEG, 9)
- //
- // Declare the base bus number, which is the bus number of the root
- // bus in this root complex. This is usually 0, but need not be.
- // For root complexes supporting multiple root busses, this should
- // be the lowest numbered root bus.
- // Section 6.5.5
- //
- Name (_BBN, 0)
- //
- // The _UID value provides a way of uniquely identifying a device
- // in the case where more than one instance of a specific device
- // is implemented with the same _HID/_CID. For systems with a
- // single root complex, this is usually just 0. For systems with
- // multiple root complexes, this should be different for each
- // root complex.
- // Section 6.1.12
- //
- Name (_UID, "PCID")
- Name (_STR, Unicode("PCIe 13 Device"))
- //
- // Declare the PCI Routing Table.
- // This defines SPI mappings of the four line-based interrupts
- // associated with the root complex and hierarchy below it.
- // Section 6.2.12
- //
- Name (_PRT, Package() {
- //
- // Routing for device 0, all functions.
- // Note: ARM doesn't support LNK nodes, so the third param
- // is 0 and the fourth param is the SPI number of the interrupt
- // line. In this example, the A/B/C/D interrupts are wired to
- // SPI lines 148/149/150/151 + 320 respectively. PCID RCA5
- //
- Package() {0x0001FFFF, 0, 0, 468},
- Package() {0x0001FFFF, 1, 0, 469},
- Package() {0x0001FFFF, 2, 0, 470},
- Package() {0x0001FFFF, 3, 0, 471},
- Package() {0x0002FFFF, 0, 0, 468},
- Package() {0x0002FFFF, 1, 0, 469},
- Package() {0x0002FFFF, 2, 0, 470},
- Package() {0x0002FFFF, 3, 0, 471},
- Package() {0x0003FFFF, 0, 0, 468},
- Package() {0x0003FFFF, 1, 0, 469},
- Package() {0x0003FFFF, 2, 0, 470},
- Package() {0x0003FFFF, 3, 0, 471},
- Package() {0x0004FFFF, 0, 0, 468},
- Package() {0x0004FFFF, 1, 0, 469},
- Package() {0x0004FFFF, 2, 0, 470},
- Package() {0x0004FFFF, 3, 0, 471},
- Package() {0x0005FFFF, 0, 0, 468},
- Package() {0x0005FFFF, 1, 0, 469},
- Package() {0x0005FFFF, 2, 0, 470},
- Package() {0x0005FFFF, 3, 0, 471},
- Package() {0x0006FFFF, 0, 0, 468},
- Package() {0x0006FFFF, 1, 0, 469},
- Package() {0x0006FFFF, 2, 0, 470},
- Package() {0x0006FFFF, 3, 0, 471},
- Package() {0x0007FFFF, 0, 0, 468},
- Package() {0x0007FFFF, 1, 0, 469},
- Package() {0x0007FFFF, 2, 0, 470},
- Package() {0x0007FFFF, 3, 0, 471},
- Package() {0x0008FFFF, 0, 0, 468},
- Package() {0x0008FFFF, 1, 0, 469},
- Package() {0x0008FFFF, 2, 0, 470},
- Package() {0x0008FFFF, 3, 0, 471},
- })
- //
- // Declare the resources assigned to this root complex.
- // Section 6.2.2
- //
- Method (_CBA, 0, Serialized) {
- Return (0x67FFF0000000)
- }
- Name (RBUF, ResourceTemplate () {
- //
- // Declare the range of bus numbers assigned to this root
- // complex. In this example, the minimum bus number will be
- // 0, the maximum bus number will be 0xFF, supporting
- // 256 busses total.
- // Section 19.5.141
- //
- WordBusNumber (
- ResourceProducer,
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- PosDecode, // Decode
- 0, // AddressGranularity
- 0, // AddressMinimum - Minimum Bus Number
- 255, // AddressMaximum - Maximum Bus Number
- 0, // AddressTranslation - Set to 0
- 256) // RangeLength - Number of Busses
- //
- // Declare the memory range to be used for BAR memory
- // windows. This declares a 4GB region starting at
- // 0x4000000000.
- // Section 19.5.80
- //
- // Memory32Fixed (ReadWrite, 0x1FE40000, 0x10000, )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000000048000000, // AddressMinimum - MIN
- 0x000000004FFFFFFF, // AddressMinimum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x0000000008000000 // RangeLength - LEN
- )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000640000000000, // AddressMinimum - MIN
- 0x000067FFDFFFFFFF, // AddressMaximum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x000003FFE0000000 // RangeLength - LEN
- )
- })
- Method (_CRS, 0, Serialized) {
- Return (RBUF)
- }
- //
- // Declare an _OSC (OS Control Handoff) method which takes 4 arguments.
- //
- // Argments:
- // Arg0 A Buffer containing a UUID
- // Arg1 An Integer containing a Revision ID of the buffer format
- // Arg2 An Integer containing a count of entries in Arg3
- // Arg3 A Buffer containing a list of DWORD capabilities
- // Return Value:
- // A Buffer containing a list of capabilities
- // See the APCI spec, Section 6.2.10,
- // and the PCI FW spec, Section 4.5.
- //
- // The following is an example, and may need modification for
- // specific implementations.
- //
- Name (SUPP,0) // PCI _OSC Support Field value
- Name (CTRL,0) // PCI _OSC Control Field value
- Method (_OSC, 4) {
- //
- // Look for the PCI Host Bridge Interface UUID.
- // Section 6.2.10.3
- //
- //
- // Create DWord-adressable fields from the Capabilities Buffer
- // Create CDW1 outside the test as it's used in the else clause.
- //
- CreateDWordField (Arg3, 0, CDW1)
- If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
- CreateDWordField (Arg3, 4, CDW2)
- CreateDWordField (Arg3, 8, CDW3)
- //
- // Save Capabilities DWord 2 & 3
- //
- Store (CDW2, SUPP)
- Store (CDW3, CTRL)
- //
- // Only allow native hot plug control if OS supports:
- // ASPM
- // Clock PM
- // MSI/MSI-X
- //
- If (LNotEqual (And (SUPP, 0x16), 0x16)) {
- //
- // Mask bit 0 (and undefined bits)
- //
- And (CTRL, 0x1E, CTRL)
- }
- //
- // Never allow native Hot plug, PME.
- // Never allow SHPC (no SHPC controller in this system).
- // Only allow PCIe AER control if PCIe AER Firmware-First is disabled
- // Allows PCI Express Capability Structure control
- //
- if (AERF) {
- And (CTRL, 0x10, CTRL)
- } Else {
- And (CTRL, 0x18, CTRL)
- }
- //
- // Check for unknown revision.
- //
- If (LNotEqual (Arg1, One)) {
- Or (CDW1, 0x08, CDW1)
- }
- //
- // Check if capabilities bits were masked.
- //
- If (LNotEqual (CDW3, CTRL)) {
- Or (CDW1, 0x10, CDW1)
- }
- //
- // Update DWORD3 in the buffer.
- //
- Store (CTRL, CDW3)
- Return (Arg3)
- } Else {
- //
- // Unrecognized UUID
- //
- Or (CDW1, 4, CDW1)
- Return (Arg3)
- }
- } // End _OSC
- //
- // Declare a _DSM method for various functions called by the OS.
- // See the APCI spec, Section 9.14.1,
- // and the PCI FW spec, Section 4.6.
- // See also:
- // http://download.microsoft.com/download/9/c/5/9c5b2167-8017-4bae-9fde-d599bac8184a/PCI-rsc.doc
- //
- Method (_DSM, 0x4, Serialized) {
- //
- // Match against the _DSM PCI GUID.
- //
- If (LEqual (Arg0, ToUUID("E5C937D0-3553-4d7a-9117-EA4D19C3434D"))) {
- Switch (ToInteger(Arg2)) {
- //
- // Function 0: Return supported functions as a bitfield
- // with one bit for each supported function.
- // Bit 0 must always be set, as that represents
- // function 0 (which is what is being called here).
- // Support for different functions may depend on
- // the revision ID of the interface, passed as Arg1.
- //
- Case (0) {
- //
- // Functions 0-7 are supported.
- //
- Return (Buffer() {0x01})
- }
- }
- }
- //
- // If not one of the function identifiers we recognize, then return a buffer
- // with bit 0 set to 0 indicating no functions supported.
- //
- Return (Buffer() {0})
- }
- //
- // Root Port 0 Device within the Root Complex.
- //
- Device (RP0) {
- //
- // Device 0, Function 0.
- //
- Name (_ADR, 0x00000000)
- }
- Method (_PXM, 0, NotSerialized) {
- // Patch by code
- Return(0xFF)
- }
- } // PCID RCA5
- // PCIE RCA6
- Device (PCIE) {
- //
- // Hardware ID must be PNP0A08, which maps to a PCIe root complex.
- // Section 6.1.5
- //
- Name (_HID, "PNP0A08")
- Name (_CCA, ONE)
- Method (_STA, 0, NotSerialized) {
- Return (0xF) // The default value is 0x0. Unfortunately, it breaks
- // run-time patching as the representation of 0 is special
- // encoding and cannot be patched to expand with extra bytes
- // easily. As such, we default to 0xF and patch this based
- // on whether the port was enabled or not by the BIOS.
- }
- //
- // Optionally, include a compatible ID of PNP0A03, which maps to a PCI
- // root complex for use with pre-PCIe operating systems.
- // Section 6.1.2
- //
- Name (_CID, "PNP0A03")
- //
- // Declare the segment number of this root complex. Most systems only
- // have one segment, which is numbered 0.
- // Section 6.5.6
- //
- Name (_SEG, 10)
- //
- // Declare the base bus number, which is the bus number of the root
- // bus in this root complex. This is usually 0, but need not be.
- // For root complexes supporting multiple root busses, this should
- // be the lowest numbered root bus.
- // Section 6.5.5
- //
- Name (_BBN, 0)
- //
- // The _UID value provides a way of uniquely identifying a device
- // in the case where more than one instance of a specific device
- // is implemented with the same _HID/_CID. For systems with a
- // single root complex, this is usually just 0. For systems with
- // multiple root complexes, this should be different for each
- // root complex.
- // Section 6.1.12
- //
- Name (_UID, "PCIE")
- Name (_STR, Unicode("PCIe 14 Device"))
- //
- // Declare the PCI Routing Table.
- // This defines SPI mappings of the four line-based interrupts
- // associated with the root complex and hierarchy below it.
- // Section 6.2.12
- //
- Name (_PRT, Package() {
- //
- // Routing for device 0, all functions.
- // Note: ARM doesn't support LNK nodes, so the third param
- // is 0 and the fourth param is the SPI number of the interrupt
- // line. In this example, the A/B/C/D interrupts are wired to
- // SPI lines 152/153/154/155 + 320 respectively. PCIE RCA6
- //
- Package() {0x0001FFFF, 0, 0, 472},
- Package() {0x0001FFFF, 1, 0, 473},
- Package() {0x0001FFFF, 2, 0, 474},
- Package() {0x0001FFFF, 3, 0, 475},
- Package() {0x0002FFFF, 0, 0, 472},
- Package() {0x0002FFFF, 1, 0, 473},
- Package() {0x0002FFFF, 2, 0, 474},
- Package() {0x0002FFFF, 3, 0, 475},
- Package() {0x0003FFFF, 0, 0, 472},
- Package() {0x0003FFFF, 1, 0, 473},
- Package() {0x0003FFFF, 2, 0, 474},
- Package() {0x0003FFFF, 3, 0, 475},
- Package() {0x0004FFFF, 0, 0, 472},
- Package() {0x0004FFFF, 1, 0, 473},
- Package() {0x0004FFFF, 2, 0, 474},
- Package() {0x0004FFFF, 3, 0, 475},
- Package() {0x0005FFFF, 0, 0, 472},
- Package() {0x0005FFFF, 1, 0, 473},
- Package() {0x0005FFFF, 2, 0, 474},
- Package() {0x0005FFFF, 3, 0, 475},
- Package() {0x0006FFFF, 0, 0, 472},
- Package() {0x0006FFFF, 1, 0, 473},
- Package() {0x0006FFFF, 2, 0, 474},
- Package() {0x0006FFFF, 3, 0, 475},
- Package() {0x0007FFFF, 0, 0, 472},
- Package() {0x0007FFFF, 1, 0, 473},
- Package() {0x0007FFFF, 2, 0, 474},
- Package() {0x0007FFFF, 3, 0, 475},
- Package() {0x0008FFFF, 0, 0, 472},
- Package() {0x0008FFFF, 1, 0, 473},
- Package() {0x0008FFFF, 2, 0, 474},
- Package() {0x0008FFFF, 3, 0, 475},
- })
- //
- // Declare the resources assigned to this root complex.
- // Section 6.2.2
- //
- Method (_CBA, 0, Serialized) {
- Return (0x6BFFF0000000)
- }
- Name (RBUF, ResourceTemplate () {
- //
- // Declare the range of bus numbers assigned to this root
- // complex. In this example, the minimum bus number will be
- // 0, the maximum bus number will be 0xFF, supporting
- // 256 busses total.
- // Section 19.5.141
- //
- WordBusNumber (
- ResourceProducer,
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- PosDecode, // Decode
- 0, // AddressGranularity
- 0, // AddressMinimum - Minimum Bus Number
- 255, // AddressMaximum - Maximum Bus Number
- 0, // AddressTranslation - Set to 0
- 256) // RangeLength - Number of Busses
- //
- // Declare the memory range to be used for BAR memory
- // windows. This declares a 4GB region starting at
- // 0x4000000000.
- // Section 19.5.80
- //
- // Memory32Fixed (ReadWrite, 0x1FE40000, 0x10000, )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000000050000000, // AddressMinimum - MIN
- 0x0000000057FFFFFF, // AddressMaximum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x0000000008000000 // RangeLength - LEN
- )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000680000000000, // AddressMinimum - MIN
- 0x00006BFFDFFFFFFF, // AddressMinimum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x000003FFE0000000 // RangeLength - LEN
- )
- })
- Method (_CRS, 0, Serialized) {
- Return (RBUF)
- }
- //
- // Declare an _OSC (OS Control Handoff) method which takes 4 arguments.
- //
- // Argments:
- // Arg0 A Buffer containing a UUID
- // Arg1 An Integer containing a Revision ID of the buffer format
- // Arg2 An Integer containing a count of entries in Arg3
- // Arg3 A Buffer containing a list of DWORD capabilities
- // Return Value:
- // A Buffer containing a list of capabilities
- // See the APCI spec, Section 6.2.10,
- // and the PCI FW spec, Section 4.5.
- //
- // The following is an example, and may need modification for
- // specific implementations.
- //
- Name (SUPP,0) // PCI _OSC Support Field value
- Name (CTRL,0) // PCI _OSC Control Field value
- Method (_OSC, 4) {
- //
- // Look for the PCI Host Bridge Interface UUID.
- // Section 6.2.10.3
- //
- //
- // Create DWord-adressable fields from the Capabilities Buffer
- // Create CDW1 outside the test as it's used in the else clause.
- //
- CreateDWordField (Arg3, 0, CDW1)
- If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
- CreateDWordField (Arg3, 4, CDW2)
- CreateDWordField (Arg3, 8, CDW3)
- //
- // Save Capabilities DWord 2 & 3
- //
- Store (CDW2, SUPP)
- Store (CDW3, CTRL)
- //
- // Only allow native hot plug control if OS supports:
- // ASPM
- // Clock PM
- // MSI/MSI-X
- //
- If (LNotEqual (And (SUPP, 0x16), 0x16)) {
- //
- // Mask bit 0 (and undefined bits)
- //
- And (CTRL, 0x1E, CTRL)
- }
- //
- // Never allow native Hot plug, PME.
- // Never allow SHPC (no SHPC controller in this system).
- // Only allow PCIe AER control if PCIe AER Firmware-First is disabled
- // Allows PCI Express Capability Structure control
- //
- if (AERF) {
- And (CTRL, 0x10, CTRL)
- } Else {
- And (CTRL, 0x18, CTRL)
- }
- //
- // Check for unknown revision.
- //
- If (LNotEqual (Arg1, One)) {
- Or (CDW1, 0x08, CDW1)
- }
- //
- // Check if capabilities bits were masked.
- //
- If (LNotEqual (CDW3, CTRL)) {
- Or (CDW1, 0x10, CDW1)
- }
- //
- // Update DWORD3 in the buffer.
- //
- Store (CTRL, CDW3)
- Return (Arg3)
- } Else {
- //
- // Unrecognized UUID
- //
- Or (CDW1, 4, CDW1)
- Return (Arg3)
- }
- } // End _OSC
- //
- // Declare a _DSM method for various functions called by the OS.
- // See the APCI spec, Section 9.14.1,
- // and the PCI FW spec, Section 4.6.
- // See also:
- // http://download.microsoft.com/download/9/c/5/9c5b2167-8017-4bae-9fde-d599bac8184a/PCI-rsc.doc
- //
- Method (_DSM, 0x4, Serialized) {
- //
- // Match against the _DSM PCI GUID.
- //
- If (LEqual (Arg0, ToUUID("E5C937D0-3553-4d7a-9117-EA4D19C3434D"))) {
- Switch (ToInteger(Arg2)) {
- //
- // Function 0: Return supported functions as a bitfield
- // with one bit for each supported function.
- // Bit 0 must always be set, as that represents
- // function 0 (which is what is being called here).
- // Support for different functions may depend on
- // the revision ID of the interface, passed as Arg1.
- //
- Case (0) {
- //
- // Functions 0-7 are supported.
- //
- Return (Buffer() {0x01})
- }
- }
- }
- //
- // If not one of the function identifiers we recognize, then return a buffer
- // with bit 0 set to 0 indicating no functions supported.
- //
- Return (Buffer() {0})
- }
- //
- // Root Port 0 Device within the Root Complex.
- //
- Device (RP0) {
- //
- // Device 0, Function 0.
- //
- Name (_ADR, 0x00000000)
- }
- Method (_PXM, 0, NotSerialized) {
- // Patch by code
- Return(0xFF)
- }
- } // PCIE RCA6
- // PCIF RCA7
- Device (PCIF) {
- //
- // Hardware ID must be PNP0A08, which maps to a PCIe root complex.
- // Section 6.1.5
- //
- Name (_HID, "PNP0A08")
- Name (_CCA, ONE)
- Method (_STA, 0, NotSerialized) {
- Return (0xF) // The default value is 0x0. Unfortunately, it breaks
- // run-time patching as the representation of 0 is special
- // encoding and cannot be patched to expand with extra bytes
- // easily. As such, we default to 0xF and patch this based
- // on whether the port was enabled or not by the BIOS.
- }
- //
- // Optionally, include a compatible ID of PNP0A03, which maps to a PCI
- // root complex for use with pre-PCIe operating systems.
- // Section 6.1.2
- //
- Name (_CID, "PNP0A03")
- //
- // Declare the segment number of this root complex. Most systems only
- // have one segment, which is numbered 0.
- // Section 6.5.6
- //
- Name (_SEG, 11)
- //
- // Declare the base bus number, which is the bus number of the root
- // bus in this root complex. This is usually 0, but need not be.
- // For root complexes supporting multiple root busses, this should
- // be the lowest numbered root bus.
- // Section 6.5.5
- //
- Name (_BBN, 0)
- //
- // The _UID value provides a way of uniquely identifying a device
- // in the case where more than one instance of a specific device
- // is implemented with the same _HID/_CID. For systems with a
- // single root complex, this is usually just 0. For systems with
- // multiple root complexes, this should be different for each
- // root complex.
- // Section 6.1.12
- //
- Name (_UID, "PCIF")
- Name (_STR, Unicode("PCIe 15 Device"))
- //
- // Declare the PCI Routing Table.
- // This defines SPI mappings of the four line-based interrupts
- // associated with the root complex and hierarchy below it.
- // Section 6.2.12
- //
- Name (_PRT, Package() {
- //
- // Routing for device 0, all functions.
- // Note: ARM doesn't support LNK nodes, so the third param
- // is 0 and the fourth param is the SPI number of the interrupt
- // line. In this example, the A/B/C/D interrupts are wired to
- // SPI lines 156/157/158/159 + 320 respectively. PCIF RCA7
- //
- Package() {0x0001FFFF, 0, 0, 476},
- Package() {0x0001FFFF, 1, 0, 477},
- Package() {0x0001FFFF, 2, 0, 478},
- Package() {0x0001FFFF, 3, 0, 479},
- Package() {0x0002FFFF, 0, 0, 476},
- Package() {0x0002FFFF, 1, 0, 477},
- Package() {0x0002FFFF, 2, 0, 478},
- Package() {0x0002FFFF, 3, 0, 479},
- Package() {0x0003FFFF, 0, 0, 476},
- Package() {0x0003FFFF, 1, 0, 477},
- Package() {0x0003FFFF, 2, 0, 478},
- Package() {0x0003FFFF, 3, 0, 479},
- Package() {0x0004FFFF, 0, 0, 476},
- Package() {0x0004FFFF, 1, 0, 477},
- Package() {0x0004FFFF, 2, 0, 478},
- Package() {0x0004FFFF, 3, 0, 479},
- Package() {0x0005FFFF, 0, 0, 476},
- Package() {0x0005FFFF, 1, 0, 477},
- Package() {0x0005FFFF, 2, 0, 478},
- Package() {0x0005FFFF, 3, 0, 479},
- Package() {0x0006FFFF, 0, 0, 476},
- Package() {0x0006FFFF, 1, 0, 477},
- Package() {0x0006FFFF, 2, 0, 478},
- Package() {0x0006FFFF, 3, 0, 479},
- Package() {0x0007FFFF, 0, 0, 476},
- Package() {0x0007FFFF, 1, 0, 477},
- Package() {0x0007FFFF, 2, 0, 478},
- Package() {0x0007FFFF, 3, 0, 479},
- Package() {0x0008FFFF, 0, 0, 476},
- Package() {0x0008FFFF, 1, 0, 477},
- Package() {0x0008FFFF, 2, 0, 478},
- Package() {0x0008FFFF, 3, 0, 479},
- })
- //
- // Declare the resources assigned to this root complex.
- // Section 6.2.2
- //
- Method (_CBA, 0, Serialized) {
- Return (0x6FFFF0000000)
- }
- Name (RBUF, ResourceTemplate () {
- //
- // Declare the range of bus numbers assigned to this root
- // complex. In this example, the minimum bus number will be
- // 0, the maximum bus number will be 0xFF, supporting
- // 256 busses total.
- // Section 19.5.141
- //
- WordBusNumber (
- ResourceProducer,
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- PosDecode, // Decode
- 0, // AddressGranularity
- 0, // AddressMinimum - Minimum Bus Number
- 255, // AddressMaximum - Maximum Bus Number
- 0, // AddressTranslation - Set to 0
- 256) // RangeLength - Number of Busses
- //
- // Declare the memory range to be used for BAR memory
- // windows. This declares a 4GB region starting at
- // 0x4000000000.
- // Section 19.5.80
- //
- // Memory32Fixed (ReadWrite, 0x1FE40000, 0x10000, )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x0000000058000000, // AddressMinimum - MIN
- 0x000000005FFFFFFF, // AddressMinimum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x0000000008000000 // RangeLength - LEN
- )
- QWordMemory (
- ResourceProducer, // ResourceUsage
- PosDecode, // Decode
- MinFixed, // IsMinFixed
- MaxFixed, // IsMaxFixed
- NonCacheable, // NonCacheable
- ReadWrite, // ReadAndWrite
- 0x0000000000000000, // AddressGranularity - GRA
- 0x00006C0000000000, // AddressMinimum - MIN
- 0x00006FFFDFFFFFFF, // AddressMinimum - MAX
- 0x0000000000000000, // AddressTranslation - TRA
- 0x000003FFE0000000 // RangeLength - LEN
- )
- })
- Method (_CRS, 0, Serialized) {
- Return (RBUF)
- }
- //
- // Declare an _OSC (OS Control Handoff) method which takes 4 arguments.
- //
- // Argments:
- // Arg0 A Buffer containing a UUID
- // Arg1 An Integer containing a Revision ID of the buffer format
- // Arg2 An Integer containing a count of entries in Arg3
- // Arg3 A Buffer containing a list of DWORD capabilities
- // Return Value:
- // A Buffer containing a list of capabilities
- // See the APCI spec, Section 6.2.10,
- // and the PCI FW spec, Section 4.5.
- //
- // The following is an example, and may need modification for
- // specific implementations.
- //
- Name (SUPP,0) // PCI _OSC Support Field value
- Name (CTRL,0) // PCI _OSC Control Field value
- Method (_OSC, 4) {
- //
- // Look for the PCI Host Bridge Interface UUID.
- // Section 6.2.10.3
- //
- //
- // Create DWord-adressable fields from the Capabilities Buffer
- // Create CDW1 outside the test as it's used in the else clause.
- //
- CreateDWordField (Arg3, 0, CDW1)
- If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
- CreateDWordField (Arg3, 4, CDW2)
- CreateDWordField (Arg3, 8, CDW3)
- //
- // Save Capabilities DWord 2 & 3
- //
- Store (CDW2, SUPP)
- Store (CDW3, CTRL)
- //
- // Only allow native hot plug control if OS supports:
- // ASPM
- // Clock PM
- // MSI/MSI-X
- //
- If (LNotEqual (And (SUPP, 0x16), 0x16)) {
- //
- // Mask bit 0 (and undefined bits)
- //
- And (CTRL, 0x1E, CTRL)
- }
- //
- // Never allow native Hot plug, PME.
- // Never allow SHPC (no SHPC controller in this system).
- // Only allow PCIe AER control if PCIe AER Firmware-First is disabled
- // Allows PCI Express Capability Structure control
- //
- if (AERF) {
- And (CTRL, 0x10, CTRL)
- } Else {
- And (CTRL, 0x18, CTRL)
- }
- //
- // Check for unknown revision.
- //
- If (LNotEqual (Arg1, One)) {
- Or (CDW1, 0x08, CDW1)
- }
- //
- // Check if capabilities bits were masked.
- //
- If (LNotEqual (CDW3, CTRL)) {
- Or (CDW1, 0x10, CDW1)
- }
- //
- // Update DWORD3 in the buffer.
- //
- Store (CTRL, CDW3)
- Return (Arg3)
- } Else {
- //
- // Unrecognized UUID
- //
- Or (CDW1, 4, CDW1)
- Return (Arg3)
- }
- } // End _OSC
- //
- // Declare a _DSM method for various functions called by the OS.
- // See the APCI spec, Section 9.14.1,
- // and the PCI FW spec, Section 4.6.
- // See also:
- // http://download.microsoft.com/download/9/c/5/9c5b2167-8017-4bae-9fde-d599bac8184a/PCI-rsc.doc
- //
- Method (_DSM, 0x4, Serialized) {
- //
- // Match against the _DSM PCI GUID.
- //
- If (LEqual (Arg0, ToUUID("E5C937D0-3553-4d7a-9117-EA4D19C3434D"))) {
- Switch (ToInteger(Arg2)) {
- //
- // Function 0: Return supported functions as a bitfield
- // with one bit for each supported function.
- // Bit 0 must always be set, as that represents
- // function 0 (which is what is being called here).
- // Support for different functions may depend on
- // the revision ID of the interface, passed as Arg1.
- //
- Case (0) {
- //
- // Functions 0-7 are supported.
- //
- Return (Buffer() {0x01})
- }
- }
- }
- //
- // If not one of the function identifiers we recognize, then return a buffer
- // with bit 0 set to 0 indicating no functions supported.
- //
- Return (Buffer() {0})
- }
- //
- // Root Port 0 Device within the Root Complex.
- //
- Device (RP0) {
- //
- // Device 0, Function 0.
- //
- Name (_ADR, 0x00000000)
- }
- Method (_PXM, 0, NotSerialized) {
- // Patch by code
- Return(0xFF)
- }
- } // PCIF RCA7
|