PeiFspMiscUpdInitLib.c 3.0 KB

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  1. /** @file
  2. Implementation of Fsp Misc UPD Initialization.
  3. Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include <PeiFspPolicyInitLib.h>
  7. #include <Library/MemoryAllocationLib.h>
  8. #include <Library/HobLib.h>
  9. #define STATUS_CODE_USE_RAM BIT0
  10. #define STATUS_CODE_USE_ISA_SERIAL BIT1
  11. #define STATUS_CODE_USE_USB BIT2
  12. #define STATUS_CODE_USE_USB3 BIT3
  13. #define STATUS_CODE_USE_SERIALIO BIT4
  14. #define STATUS_CODE_USE_TRACEHUB BIT5
  15. #define STATUS_CODE_CMOS_INVALID BIT6
  16. #define STATUS_CODE_CMOS_VALID BIT7
  17. /**
  18. Performs FSP Misc UPD initialization.
  19. @param[in][out] FspmUpd Pointer to FSPM_UPD Data.
  20. @retval EFI_SUCCESS FSP UPD Data is updated.
  21. **/
  22. EFI_STATUS
  23. EFIAPI
  24. PeiFspMiscUpdInitPreMem (
  25. IN OUT FSPM_UPD *FspmUpd
  26. )
  27. {
  28. EFI_STATUS Status;
  29. EFI_PEI_HOB_POINTERS Hob;
  30. DEBUG_CONFIG_DATA_HOB *DebugConfigData;
  31. UINT8 DebugInterfaces;
  32. FspmUpd->FspmArchUpd.StackBase = (VOID *)(UINTN)(PcdGet32(PcdTemporaryRamBase) + PcdGet32(PcdTemporaryRamSize) - (PcdGet32(PcdFspTemporaryRamSize) + PcdGet32(PcdFspReservedBufferSize)));
  33. FspmUpd->FspmArchUpd.StackSize = PcdGet32(PcdFspTemporaryRamSize);
  34. Status = PeiServicesGetBootMode (&(FspmUpd->FspmArchUpd.BootMode));
  35. if (EFI_ERROR (Status)) {
  36. FspmUpd->FspmArchUpd.BootMode = BOOT_WITH_FULL_CONFIGURATION;
  37. }
  38. FspmUpd->FspmArchUpd.BootLoaderTolumSize = 0x0;
  39. //
  40. // Initialize DebugConfigData
  41. //
  42. DebugInterfaces = 0x00;
  43. Hob.Guid = GetFirstGuidHob (&gDebugConfigHobGuid);
  44. if (Hob.Guid != NULL) {
  45. DebugConfigData = (DEBUG_CONFIG_DATA_HOB *) GET_GUID_HOB_DATA (Hob.Guid);
  46. if (DebugConfigData != NULL) {
  47. // Debug Interfaces
  48. if (DebugConfigData->RamDebugInterface) { DebugInterfaces |= STATUS_CODE_USE_RAM; }
  49. if (DebugConfigData->UartDebugInterface) { DebugInterfaces |= STATUS_CODE_USE_ISA_SERIAL; }
  50. if (DebugConfigData->Usb3DebugInterface) { DebugInterfaces |= STATUS_CODE_USE_USB3; }
  51. if (DebugConfigData->SerialIoDebugInterface) { DebugInterfaces |= STATUS_CODE_USE_SERIALIO; }
  52. if (DebugConfigData->TraceHubDebugInterface) { DebugInterfaces |= STATUS_CODE_USE_TRACEHUB; }
  53. FspmUpd->FspmConfig.PcdDebugInterfaceFlags = DebugInterfaces;
  54. // Serial debug message baud rate
  55. FspmUpd->FspmConfig.PcdSerialDebugBaudRate = DebugConfigData->SerialDebugBaudRate;
  56. //Serial debug message level
  57. FspmUpd->FspmConfig.PcdSerialDebugLevel = DebugConfigData->SerialDebug;
  58. }
  59. }
  60. DEBUG ((DEBUG_INFO, "FspmConfig.PcdDebugInterfaceFlags is 0x%X\n", FspmUpd->FspmConfig.PcdDebugInterfaceFlags));
  61. DEBUG ((DEBUG_INFO, "FspmUpd->FspmConfig.PcdSerialDebugBaudRate is 0x%X\n", FspmUpd->FspmConfig.PcdSerialDebugBaudRate));
  62. DEBUG ((DEBUG_INFO, "FspmUpd->FspmConfig.PcdSerialDebugLevel is 0x%X\n", FspmUpd->FspmConfig.PcdSerialDebugLevel));
  63. return EFI_SUCCESS;
  64. }