MinPlatformPkg.dec 23 KB

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  1. ## @file
  2. # This package provides the modules that build for a minimal platform.
  3. # This MinPlatformPkg should only depend on EDKII Core packages.
  4. #
  5. # The DEC files are used by the utilities that parse DSC and
  6. # INF files to generate AutoGen.c and AutoGen.h files
  7. # for the build infrastructure.
  8. #
  9. # Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
  10. #
  11. # SPDX-License-Identifier: BSD-2-Clause-Patent
  12. #
  13. ##
  14. [Defines]
  15. DEC_SPECIFICATION = 0x00010017
  16. PACKAGE_NAME = MinPlatformPkg
  17. PACKAGE_VERSION = 0.1
  18. PACKAGE_GUID = 463B3B00-0D18-4a5f-90C0-D5B851D2574B
  19. [Includes]
  20. Include
  21. [Ppis]
  22. gEdkiiSiliconInitializedPpiGuid = {0x82a72dc8, 0x61ec, 0x403e, {0xb1, 0x5a, 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}}
  23. gPeiBaseMemoryTestPpiGuid = {0xb6ec423c, 0x21d2, 0x490d, {0x85, 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74}}
  24. gPeiPlatformMemorySizePpiGuid = {0x9a7ef41e, 0xc140, 0x4bd1, {0xb8, 0x84, 0x1e, 0x11, 0x24, 0x0b, 0x4c, 0xe6}}
  25. gPlatformInitTempRamExitPpiGuid = {0xbae23646, 0xbd60, 0x4f8b, {0xb3, 0xf9, 0xf3, 0x91, 0xee, 0x7e, 0xe6, 0xc8}}
  26. [Guids]
  27. gMinPlatformPkgTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
  28. gAdapterInfoPlatformTestPointGuid = {0x5381e3ea, 0x0b77, 0x4580, {0xad, 0xdf, 0xa9, 0x1c, 0x08, 0x3b, 0xf2, 0x97}}
  29. gBoardDetectGuid = {0x1792429d, 0x9d94, 0x4e08, {0xa0, 0x99, 0x73, 0xa2, 0x86, 0xae, 0xb4, 0x35}}
  30. gBoardPreMemInitGuid = {0x191dcfcf, 0xe16e, 0x43bb, {0x9b, 0xc3, 0x6e, 0xee, 0x6f, 0xab, 0x3a, 0x27}}
  31. gBoardPostMemInitGuid = {0xa0e933ea, 0xa69, 0x47fb, {0xb2, 0xab, 0xa1, 0x6f, 0x71, 0x2d, 0x6f, 0x58}}
  32. gBoardNotificationInitGuid = {0x78dbcabf, 0xc544, 0x4e6f, {0xaf, 0x3a, 0x71, 0x17, 0xd9, 0x42, 0x4e, 0xd1}}
  33. gBoardAcpiTableGuid = {0xd70e9f57, 0x69f, 0x4bef, {0x96, 0xc0, 0x84, 0x74, 0xf4, 0xa2, 0x5f, 0x3a}}
  34. gBoardAcpiEnableGuid = {0x9727b610, 0xf645, 0x4429, {0x89, 0x21, 0x2c, 0x2b, 0x58, 0xdc, 0xbb, 0x0a}}
  35. gDefaultDataFileGuid = {0x1ae42876, 0x008f, 0x4161, {0xb2, 0xb7, 0x1c, 0x0d, 0x15, 0xc5, 0xef, 0x43}}
  36. gDefaultDataOptSizeFileGuid = {0x003e7b41, 0x98a2, 0x4be2, {0xb2, 0x7a, 0x6c, 0x30, 0xc7, 0x65, 0x52, 0x25}}
  37. # BDS Hook point event Guids
  38. gBdsEventBeforeConsoleAfterTrustedConsoleGuid = {0x51e49ff5, 0x28a9, 0x4159, { 0xac, 0x8a, 0xb8, 0xc4, 0x88, 0xa7, 0xfd, 0xee}}
  39. gBdsEventBeforeConsoleBeforeEndOfDxeGuid = {0xfcf26e41, 0xbda6, 0x4633, { 0xb5, 0x73, 0xd4, 0xb8, 0x0e, 0x6d, 0xd0, 0x78}}
  40. gBdsEventAfterConsoleReadyBeforeBootOptionGuid = {0x8eb3d5dc, 0xf4e7, 0x4b57, { 0xa9, 0xe7, 0x27, 0x39, 0x10, 0xf2, 0x18, 0x9f}}
  41. gFspNvsBufferVariableGuid = {0x9c7715cd, 0x8d66, 0x4d2a, { 0x90, 0x0d, 0x01, 0x45, 0x9a, 0x57, 0x59, 0x6b}}
  42. [LibraryClasses]
  43. PeiLib|Include/Library/PeiLib.h
  44. AslUpdateLib|Include/Library/AslUpdateLib.h
  45. BoardAcpiEnableLib|Include/Library/BoardAcpiEnableLib.h
  46. BoardAcpiTableLib|Include/Library/BoardAcpiTableLib.h
  47. SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h
  48. SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h
  49. BoardInitLib|Include/Library/BoardInitLib.h
  50. MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h
  51. SecBoardInitLib|Include/Library/SecBoardInitLib.h
  52. TpmPlatformHierarchyLib|Include/Library/TpmPlatformHierarchyLib.h
  53. TestPointLib|Include/Library/TestPointLib.h
  54. TestPointCheckLib|Include/Library/TestPointCheckLib.h
  55. SetCacheMtrrLib|Include/Library/SetCacheMtrrLib.h
  56. ReportCpuHobLib|Include/Library/ReportCpuHobLib.h
  57. BoardBootManagerLib|Include/Library/BoardBootManagerLib.h
  58. CompressLib|Include/Library/CompressLib.h
  59. HobVariableLib|Include/Library/HobVariableLib.h
  60. MultiBoardAcpiSupportLib|Include/Library/MultiBoardAcpiSupportLib.h
  61. ReportFvLib|Include/Library/ReportFvLib.h
  62. VariableReadLib|Include/Library/VariableReadLib.h
  63. VariableWriteLib|Include/Library/VariableWriteLib.h
  64. LargeVariableReadLib|Include/Library/LargeVariableReadLib.h
  65. LargeVariableWriteLib|Include/Library/LargeVariableWriteLib.h
  66. [PcdsFixedAtBuild, PcdsPatchableInModule]
  67. gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000
  68. gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001
  69. gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002
  70. gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000|UINT32|0x9000000B
  71. gMinPlatformPkgTokenSpaceGuid.PcdLocalApicMmioSize|0x1000|UINT32|0x9000000C
  72. gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000|UINT32|0x9000000D
  73. gMinPlatformPkgTokenSpaceGuid.PcdIoApicMmioSize|0x1000|UINT32|0x9000000E
  74. gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x02|UINT8|0x90000014
  75. gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012
  76. gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013
  77. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|0|UINT8|0x90000015
  78. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09|UINT8|0x90000016
  79. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000|UINT32|0x90000017
  80. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24|UINT32|0x90000018
  81. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2|UINT32|0x90000021
  82. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022
  83. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023
  84. gMinPlatformPkgTokenSpaceGuid.PcdFadtSmiCmd|0x000000B2|UINT32|0x9000002A
  85. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035
  86. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036
  87. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037
  88. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UINT16|0x00010038
  89. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UINT16|0x00010039
  90. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16|0x0001003A
  91. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x0001003B
  92. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x0001003C
  93. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003D
  94. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x00010040
  95. gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegisterAccessSize|0x00|UINT8|0x00010042
  96. gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize|0x00|UINT8|0x00010043
  97. gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize|0x00|UINT8|0x00010044
  98. gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize|0x00|UINT8|0x00010045
  99. gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize|0x00|UINT8|0x00010046
  100. gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize|0x00|UINT8|0x00010047
  101. gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize|0x00|UINT8|0x00010048
  102. gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize|0x00|UINT8|0x00010049
  103. gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize|0x00|UINT8|0x0001004A
  104. gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq|0x0000|UINT8|0x00010055
  105. #
  106. # FADT Duty Offset - The zero-based index of where the processor's duty cycle
  107. # setting is within the processor's P_CNT register.
  108. #
  109. gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x01|UINT8|0x90000028
  110. #
  111. # FADT Duty Width - The bit width of the processor's duty cycle setting value in the P_CNT
  112. # register. Each processor's duty cycle setting allows the software to select a nominal
  113. # processor frequency below its absolute frequency. A duty width value of zero indicates
  114. # the processor continuously runs at its base frequency.
  115. #
  116. # For more details about how the frequency is calculated, refer to the Fixed ACPI Description
  117. # Table (FADT) section of the ACPI Specification.
  118. #
  119. gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x00|UINT8|0x90000029
  120. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500
  121. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501
  122. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UINT32|0x20000502
  123. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32|0x20000503
  124. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32|0x20000504
  125. #
  126. # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
  127. #
  128. # BIT0: If set, expresses that for all synchronous SMM entries,SMM will validate that input and output buffers lie entirely within the expected fixed memory regions.
  129. # BIT1: If set, expresses that for all synchronous SMM entries, SMM will validate that input and output pointers embedded within the fixed communication buffer only refer to address ranges \
  130. # that lie entirely within the expected fixed memory regions.
  131. # BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
  132. # BIT3-31: Reserved
  133. #
  134. gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006
  135. gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x00100206
  136. #
  137. # See HstiIbvFeatureBit.h for the definition
  138. #
  139. # #define HSTI_BYTE<X>_<AAA> BIT<Y>
  140. #
  141. # It means BYTE<X> BIT<Y> is for feature <AAA>.
  142. #
  143. gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VOID*|0x00100301
  144. #
  145. # See TestPointCheckLib.h for the definition
  146. #
  147. # #define TEST_POINT_BYTE<X>_<AAA> BIT<Y>
  148. #
  149. # It means BYTE<X> BIT<Y> is for feature <AAA>.
  150. # BYTE0 BYTE1 BYTE2 BYTE3 BYTE4 BYTE5 BYTE6 BYTE7 BYTE8
  151. # Stage debug: {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  152. # Stage memory: {0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  153. # Stage UEFI boot: {0x03, 0x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  154. # Stage OS boot: {0x03, 0x07, 0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  155. # Stage Secure boot: {0x03, 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  156. # Stage Advanced: {0x03, 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  157. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00100302
  158. ##
  159. ## The Flash relevant PCD are ineffective and will be patched basing on FDF definitions during build.
  160. ## Set all of them to 0 here to prevent from confusion.
  161. ##
  162. gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
  163. gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
  164. ## Indicates the MMIO base address of the microcode FV in flash.
  165. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004
  166. ## Indicates the size of the microcode FV in flash.
  167. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005
  168. ## Indicates the offset of the microcode FV relative to the beginning of flash.
  169. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006
  170. ## Indicates the offset of the actual microcode content relative to the beginning of the microcode FV.
  171. gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv|0x90|UINT32|0x30000007
  172. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004
  173. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005
  174. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006
  175. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007
  176. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008
  177. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009
  178. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A
  179. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B
  180. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C
  181. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D
  182. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E
  183. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F
  184. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010
  185. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011
  186. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012
  187. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase|0x00000000|UINT32|0x2000002D
  188. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize|0x00000000|UINT32|0x2000002E
  189. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset|0x00000000|UINT32|0x2000002F
  190. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013
  191. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014
  192. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015
  193. gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016
  194. gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017
  195. gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018
  196. gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019
  197. gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A
  198. gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B
  199. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021
  200. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022
  201. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023
  202. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024
  203. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025
  204. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026
  205. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027
  206. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028
  207. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029
  208. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|0x00000000|UINT32|0x2000002A
  209. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize|0x00000000|UINT32|0x2000002B
  210. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|0x00000000|UINT32|0x2000002C
  211. [PcdsDynamic, PcdsDynamicEx]
  212. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019
  213. gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025
  214. gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026
  215. gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027
  216. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddressSpaceId|0x00|UINT8|0x0001004B
  217. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitWidth|0x00|UINT8|0x0001004C
  218. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitOffset|0x00|UINT8|0x0001004D
  219. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAccessSize|0x00|UINT8|0x0001004E
  220. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddress|0x0000000000000000|UINT64|0x0001004F
  221. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddressSpaceId|0x00|UINT8|0x00010050
  222. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitWidth|0x00|UINT8|0x00010051
  223. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitOffset|0x00|UINT8|0x00010052
  224. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAccessSize|0x00|UINT8|0x00010053
  225. gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddress|0x0000000000000000|UINT64|0x00010054
  226. [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
  227. ##
  228. ## Allocate 56 KB [0x2000..0xFFFF] of I/O space for Pci Devices
  229. ## If PcdPciReservedMemLimit =0 Pci Reserved default MMIO Limit is PciExpressBase else use PcdPciReservedMemLimit .
  230. ##
  231. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIobase |0x2000 |UINT16|0x40010041
  232. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIoLimit |0xFFFF |UINT16|0x40010042
  233. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase |0x90000000 |UINT32|0x40010043
  234. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit |0x00000000 |UINT32|0x40010044
  235. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010045
  236. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit |0x0000000000000000 |UINT64|0x40010046
  237. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemBase |0xFFFFFFFF |UINT32|0x40010047
  238. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemLimit |0x00000000 |UINT32|0x40010048
  239. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010049
  240. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit|0x0000000000000000 |UINT64|0x4001004A
  241. gMinPlatformPkgTokenSpaceGuid.PcdPciDmaAbove4G |FALSE|BOOLEAN|0x4001004B
  242. gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace |FALSE|BOOLEAN|0x4001004C
  243. gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned |FALSE|BOOLEAN|0x4001004D
  244. gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount |0x1 |UINT8|0x4001004E
  245. gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy |TRUE |BOOLEAN|0x4001004F
  246. gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT32|0x0010004
  247. gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|UINT32|0x30000008
  248. gMinPlatformPkgTokenSpaceGuid.PcdPlatformMemoryCheckLevel|0|UINT32|0x30000009
  249. ## This PCD is to control which device is the potential trusted console input device.<BR><BR>
  250. # For example:<BR>
  251. # USB Short Form: UsbHID(0xFFFF,0xFFFF,0x1,0x1)<BR>
  252. # //Header VendorId ProductId Class SubClass Protocol<BR>
  253. # {0x03, 0x0F, 0x0B, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x03, 0x01, 0x01,<BR>
  254. # //Header<BR>
  255. # 0x7F, 0xFF, 0x04, 0x00}<BR>
  256. gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{0x03, 0x0F, 0x0B, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x03, 0x01, 0x01, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000A
  257. ## This PCD is to control which device is the potential trusted console output device.<BR><BR>
  258. # For example:<BR>
  259. # Integrated Graphic: PciRoot(0x0)/Pci(0x2,0x0)<BR>
  260. # //Header HID UID<BR>
  261. # {0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00,<BR>
  262. # //Header Func Dev<BR>
  263. # 0x01, 0x01, 0x06, 0x00, 0x00, 0x02,
  264. # //Header<BR>
  265. # 0x7F, 0xFF, 0x04, 0x00}<BR>
  266. gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x02, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000C
  267. ## This PCD is to control which device is the potential trusted storage device.<BR><BR>
  268. # For example:<BR>
  269. # Integrated SATA: PciRoot(0x0)/Pci(0x17,0x0)<BR>
  270. # //Header HID UID<BR>
  271. # {0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00,<BR>
  272. # //Header Func Dev<BR>
  273. # 0x01, 0x01, 0x06, 0x00, 0x00, 0x17,
  274. # //Header<BR>
  275. # 0x7F, 0xFF, 0x04, 0x00}<BR>
  276. gMinPlatformPkgTokenSpaceGuid.PcdTrustedStorageDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x17, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x3000010
  277. [PcdsFixedAtBuild]
  278. ## MinPlatform Boot Stage Selector
  279. # Stage 1 - enable debug (system deadloop after debug init)
  280. # Stage 2 - mem init (system deadloop after mem init)
  281. # Stage 3 - boot to shell only
  282. # Stage 4 - boot to OS
  283. # Stage 5 - boot to OS with security boot enabled
  284. # Stage 6 - boot with advanced features enabled
  285. #
  286. gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4|UINT8|0xF00000A0
  287. ## FSP Boot Mode Selector
  288. # FALSE: The board is not a FSP wrapper (FSP binary not used)
  289. # TRUE: The board is a FSP wrapper (FSP binary is used)
  290. #
  291. gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|FALSE|BOOLEAN|0x80000008
  292. ## FSP Dispatch Mode: Use the PEI Main Binary Included in FSP-M
  293. # FALSE: The PEI Main included in FvPreMemory is used to dispatch all PEIMs
  294. # (both inside FSP and outside FSP).
  295. # Pros:
  296. # * PEI Main is re-built from source and is always the latest version
  297. # * Platform code can link any desired LibraryClass to PEI Main
  298. # (Ex: Custom DebugLib instance, SerialPortLib, etc.)
  299. # Cons:
  300. # * The PEI Main being used to execute FSP PEIMs is not the PEI Main
  301. # that the FSP PEIMs were tested with, adding risk of breakage.
  302. # * Two copies of PEI Main will exist in the final binary,
  303. # #1 in FSP-M, #2 in FvPreMemory. The copy in FSP-M is never
  304. # executed, wasting space.
  305. #
  306. # <b>TRUE</b>: The PEI Main included in FSP is used to dispatch all PEIMs
  307. # (both inside FSP and outside FSP). PEI Main will not be included in
  308. # FvPreMemory. This is the default and is the recommended choice.
  309. #
  310. gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain|TRUE|BOOLEAN|0xF00000A8
  311. [PcdsFeatureFlag]
  312. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit |FALSE|BOOLEAN|0xF00000A1
  313. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit |FALSE|BOOLEAN|0xF00000A2
  314. gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly |FALSE|BOOLEAN|0xF00000A3
  315. gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable |FALSE|BOOLEAN|0xF00000A4
  316. gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable |FALSE|BOOLEAN|0xF00000A5
  317. gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE|BOOLEAN|0xF00000A6
  318. gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable |FALSE|BOOLEAN|0xF00000A7
  319. gMinPlatformPkgTokenSpaceGuid.PcdSerialTerminalEnable |FALSE|BOOLEAN|0xF00000B0