SaPrintPolicy.c 21 KB

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  1. /** @file
  2. This file provides service for PEI phase policy printing
  3. Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include "PeiSaPolicyLibrary.h"
  7. #include <Library/GpioNativeLib.h>
  8. /**
  9. This function prints the PEI phase PreMem policy.
  10. @param[in] SiPolicyPreMemPpi - Instance of SI_PREMEM_POLICY_PPI
  11. **/
  12. VOID
  13. EFIAPI
  14. SaPrintPolicyPpiPreMem (
  15. IN SI_PREMEM_POLICY_PPI *SiPolicyPreMemPpi
  16. )
  17. {
  18. DEBUG_CODE_BEGIN ();
  19. INTN Index;
  20. INTN Index2;
  21. EFI_STATUS Status;
  22. SA_MISC_PEI_PREMEM_CONFIG *MiscPeiPreMemConfig;
  23. MEMORY_CONFIGURATION *MemConfig;
  24. MEMORY_CONFIG_NO_CRC *MemConfigNoCrc;
  25. //
  26. // Get requisite IP Config Blocks which needs to be used here
  27. //
  28. Status = GetConfigBlock ((VOID *)SiPolicyPreMemPpi, &gSaMiscPeiPreMemConfigGuid, (VOID *) &MiscPeiPreMemConfig);
  29. ASSERT_EFI_ERROR (Status);
  30. Status = GetConfigBlock ((VOID *)SiPolicyPreMemPpi, &gMemoryConfigGuid, (VOID *) &MemConfig);
  31. ASSERT_EFI_ERROR (Status);
  32. Status = GetConfigBlock ((VOID *)SiPolicyPreMemPpi, &gMemoryConfigNoCrcGuid, (VOID *) &MemConfigNoCrc);
  33. ASSERT_EFI_ERROR (Status);
  34. DEBUG ((DEBUG_INFO, "\n------------------------ SA Policy (PEI PreMem) Print BEGIN -----------------\n"));
  35. DEBUG ((DEBUG_INFO, "Revision : 0x%x\n", SiPolicyPreMemPpi->TableHeader.Header.Revision));
  36. ASSERT (SiPolicyPreMemPpi->TableHeader.Header.Revision >= SI_PREMEM_POLICY_REVISION);
  37. DEBUG ((DEBUG_INFO, "------------------------ SA_MISC_PEI_PREMEM_CONFIG -----------------\n"));
  38. DEBUG ((DEBUG_INFO, " Revision : %d\n", MiscPeiPreMemConfig->Header.Revision));
  39. ASSERT (MiscPeiPreMemConfig->Header.Revision >= SA_MISC_PEI_PREMEM_CONFIG_REVISION);
  40. DEBUG ((DEBUG_INFO, " SpdAddressTable[%d] :", SA_MC_MAX_SOCKETS));
  41. for (Index = 0; Index < SA_MC_MAX_SOCKETS; Index++) {
  42. DEBUG ((DEBUG_INFO, " 0x%x", MiscPeiPreMemConfig->SpdAddressTable[Index]));
  43. }
  44. DEBUG ((DEBUG_INFO, "\n"));
  45. DEBUG ((DEBUG_INFO, " MchBar : 0x%x\n", MiscPeiPreMemConfig->MchBar));
  46. DEBUG ((DEBUG_INFO, "------------------------ MEMORY_CONFIG ------------------------------\n"));
  47. DEBUG ((DEBUG_INFO, " Guid : %g\n", &MemConfig->Header.GuidHob.Name));
  48. DEBUG ((DEBUG_INFO, " Revision : %d\n", MemConfig->Header.Revision));
  49. ASSERT (MemConfig->Header.Revision >= MEMORY_CONFIG_REVISION);
  50. DEBUG ((DEBUG_INFO, " Size : 0x%x\n", MemConfig->Header.GuidHob.Header.HobLength));
  51. DEBUG ((DEBUG_INFO, " HobBufferSize : 0x%x\n", MemConfig->HobBufferSize));
  52. DEBUG ((DEBUG_INFO, " EccSupport : 0x%x\n", MemConfig->EccSupport));
  53. DEBUG ((DEBUG_INFO, " DdrFreqLimit: %d\n", MemConfig->DdrFreqLimit));
  54. DEBUG ((DEBUG_INFO, " SpdProfileSelected : 0x%x\n", MemConfig->SpdProfileSelected));
  55. DEBUG ((DEBUG_INFO, " tCL : 0x%x\n", MemConfig->tCL));
  56. DEBUG ((DEBUG_INFO, " tRCDtRP : 0x%x\n", MemConfig->tRCDtRP));
  57. DEBUG ((DEBUG_INFO, " tRAS : 0x%x\n", MemConfig->tRAS));
  58. DEBUG ((DEBUG_INFO, " tWR : 0x%x\n", MemConfig->tWR));
  59. DEBUG ((DEBUG_INFO, " tRFC : 0x%x\n", MemConfig->tRFC));
  60. DEBUG ((DEBUG_INFO, " tRRD : 0x%x\n", MemConfig->tRRD));
  61. DEBUG ((DEBUG_INFO, " tWTR : 0x%x\n", MemConfig->tWTR));
  62. DEBUG ((DEBUG_INFO, " tRTP : 0x%x\n", MemConfig->tRTP));
  63. DEBUG ((DEBUG_INFO, " tFAW : 0x%x\n", MemConfig->tFAW));
  64. DEBUG ((DEBUG_INFO, " tCWL : 0x%x\n", MemConfig->tCWL));
  65. DEBUG ((DEBUG_INFO, " tREFI : 0x%x\n", MemConfig->tREFI));
  66. DEBUG ((DEBUG_INFO, " NModeSupport : 0x%x\n", MemConfig->NModeSupport));
  67. DEBUG ((DEBUG_INFO, " VddVoltage : %d\n", MemConfig->VddVoltage));
  68. DEBUG ((DEBUG_INFO, " ThermalManagement : 0x%x\n", MemConfig->ThermalManagement));
  69. DEBUG ((DEBUG_INFO, " PeciInjectedTemp : 0x%x\n", MemConfig->PeciInjectedTemp));
  70. DEBUG ((DEBUG_INFO, " ExttsViaTsOnBoard : 0x%x\n", MemConfig->ExttsViaTsOnBoard));
  71. DEBUG ((DEBUG_INFO, " ExttsViaTsOnDimm : 0x%x\n", MemConfig->ExttsViaTsOnDimm));
  72. DEBUG ((DEBUG_INFO, " VirtualTempSensor : 0x%x\n", MemConfig->VirtualTempSensor));
  73. DEBUG ((DEBUG_INFO, " DisableDimmChannel[%d] :", SA_MC_MAX_CHANNELS));
  74. for (Index = 0; Index < SA_MC_MAX_CHANNELS; Index++) {
  75. DEBUG ((DEBUG_INFO, " 0x%x", MemConfig->DisableDimmChannel[Index]));
  76. }
  77. DEBUG ((DEBUG_INFO, "\n"));
  78. DEBUG ((DEBUG_INFO, " RemapEnable : 0x%x\n", MemConfig->RemapEnable));
  79. DEBUG ((DEBUG_INFO, " ScramblerSupport : 0x%x\n", MemConfig->ScramblerSupport));
  80. DEBUG ((DEBUG_INFO, " SerialDebug : 0x%x\n", MemConfigNoCrc->SerialDebugLevel));
  81. DEBUG ((DEBUG_INFO, " McLock : 0x%x\n", MemConfig->McLock));
  82. DEBUG ((DEBUG_INFO, " ProbelessTrace : 0x%x\n", MemConfig->ProbelessTrace));
  83. DEBUG ((DEBUG_INFO, " GdxcIotSize : 0x%x\n", MemConfig->GdxcIotSize));
  84. DEBUG ((DEBUG_INFO, " GdxcMotSize : 0x%x\n", MemConfig->GdxcMotSize));
  85. DEBUG ((DEBUG_INFO, " ECT : 0x%x\n", MemConfig->ECT));
  86. DEBUG ((DEBUG_INFO, " SOT : 0x%x\n", MemConfig->SOT));
  87. DEBUG ((DEBUG_INFO, " ERDMPRTC2D : 0x%x\n", MemConfig->ERDMPRTC2D));
  88. DEBUG ((DEBUG_INFO, " RDMPRT : 0x%x\n", MemConfig->RDMPRT));
  89. DEBUG ((DEBUG_INFO, " RCVET : 0x%x\n", MemConfig->RCVET));
  90. DEBUG ((DEBUG_INFO, " JWRL : 0x%x\n", MemConfig->JWRL));
  91. DEBUG ((DEBUG_INFO, " EWRDSEQ : 0x%x\n", MemConfig->EWRDSEQ));
  92. DEBUG ((DEBUG_INFO, " EWRTC2D : 0x%x\n", MemConfig->EWRTC2D));
  93. DEBUG ((DEBUG_INFO, " ERDTC2D : 0x%x\n", MemConfig->ERDTC2D));
  94. DEBUG ((DEBUG_INFO, " WRTC1D : 0x%x\n", MemConfig->WRTC1D));
  95. DEBUG ((DEBUG_INFO, " WRVC1D : 0x%x\n", MemConfig->WRVC1D));
  96. DEBUG ((DEBUG_INFO, " RDTC1D : 0x%x\n", MemConfig->RDTC1D));
  97. DEBUG ((DEBUG_INFO, " DIMMODTT : 0x%x\n", MemConfig->DIMMODTT));
  98. DEBUG ((DEBUG_INFO, " DIMMRONT : 0x%x\n", MemConfig->DIMMRONT));
  99. DEBUG ((DEBUG_INFO, " WRDSEQT : 0x%x\n", MemConfig->WRDSEQT));
  100. DEBUG ((DEBUG_INFO, " WRSRT : 0x%x\n", MemConfig->WRSRT));
  101. DEBUG ((DEBUG_INFO, " RDODTT : 0x%x\n", MemConfig->RDODTT));
  102. DEBUG ((DEBUG_INFO, " RDEQT : 0x%x\n", MemConfig->RDEQT));
  103. DEBUG ((DEBUG_INFO, " RDAPT : 0x%x\n", MemConfig->RDAPT));
  104. DEBUG ((DEBUG_INFO, " WRTC2D : 0x%x\n", MemConfig->WRTC2D));
  105. DEBUG ((DEBUG_INFO, " RDTC2D : 0x%x\n", MemConfig->RDTC2D));
  106. DEBUG ((DEBUG_INFO, " WRVC2D : 0x%x\n", MemConfig->WRVC2D));
  107. DEBUG ((DEBUG_INFO, " RDVC2D : 0x%x\n", MemConfig->RDVC2D));
  108. DEBUG ((DEBUG_INFO, " CMDVC : 0x%x\n", MemConfig->CMDVC));
  109. DEBUG ((DEBUG_INFO, " LCT : 0x%x\n", MemConfig->LCT));
  110. DEBUG ((DEBUG_INFO, " RTL : 0x%x\n", MemConfig->RTL));
  111. DEBUG ((DEBUG_INFO, " TAT : 0x%x\n", MemConfig->TAT));
  112. DEBUG ((DEBUG_INFO, " RMT : 0x%x\n", MemConfig->RMT));
  113. DEBUG ((DEBUG_INFO, " MEMTST : 0x%x\n", MemConfig->MEMTST));
  114. DEBUG ((DEBUG_INFO, " ALIASCHK : 0x%x\n", MemConfig->ALIASCHK));
  115. DEBUG ((DEBUG_INFO, " RCVENC1D : 0x%x\n", MemConfig->RCVENC1D));
  116. DEBUG ((DEBUG_INFO, " RMC : 0x%x\n", MemConfig->RMC));
  117. DEBUG ((DEBUG_INFO, " WRDSUDT : 0x%x\n", MemConfig->WRDSUDT));
  118. DEBUG ((DEBUG_INFO, " CMDSR: %d\n CMDDSEQ: %d\n CMDNORM: %d\n",
  119. MemConfig->CMDSR, MemConfig->CMDDSEQ, MemConfig->CMDNORM));
  120. DEBUG ((DEBUG_INFO, " VddSettleWaitTime : 0x%x\n", MemConfig->VddSettleWaitTime));
  121. DEBUG ((DEBUG_INFO, " RefClk : 0x%x\n", MemConfig->RefClk));
  122. DEBUG ((DEBUG_INFO, " Ratio : 0x%x\n", MemConfig->Ratio));
  123. DEBUG ((DEBUG_INFO, " OddRatioMode : 0x%x\n", MemConfig->OddRatioMode));
  124. DEBUG ((DEBUG_INFO, " MrcTimeMeasure : 0x%x\n", MemConfig->MrcTimeMeasure));
  125. DEBUG ((DEBUG_INFO, " MrcFastBoot : 0x%x\n", MemConfig->MrcFastBoot));
  126. DEBUG ((DEBUG_INFO, " DqPinsInterleaved : 0x%x\n", MemConfig->DqPinsInterleaved));
  127. DEBUG ((DEBUG_INFO, " MrcSafeConfig : 0x%x\n", MemConfig->MrcSafeConfig));
  128. DEBUG ((DEBUG_INFO, " PowerDownMode : 0x%x\n", MemConfig->PowerDownMode));
  129. DEBUG ((DEBUG_INFO, " PwdwnIdleCounter : 0x%x\n", MemConfig->PwdwnIdleCounter));
  130. DEBUG ((DEBUG_INFO, " RankInterleave : 0x%x\n", MemConfig->RankInterleave));
  131. DEBUG ((DEBUG_INFO, " EnhancedInterleave : 0x%x\n", MemConfig->EnhancedInterleave));
  132. DEBUG ((DEBUG_INFO, " WeaklockEn : 0x%x\n", MemConfig->WeaklockEn));
  133. DEBUG ((DEBUG_INFO, " EnCmdRate : 0x%x\n", MemConfig->EnCmdRate));
  134. DEBUG ((DEBUG_INFO, " CmdTriStateDis : 0x%x\n", MemConfig->CmdTriStateDis));
  135. DEBUG ((DEBUG_INFO, " BClkFrequency: %d Hz\n", MemConfig->BClkFrequency));
  136. DEBUG ((DEBUG_INFO, " MemoryTrace : 0x%x\n", MemConfig->MemoryTrace));
  137. DEBUG ((DEBUG_INFO, " ChHashEnable : 0x%x\n", MemConfig->ChHashEnable));
  138. DEBUG ((DEBUG_INFO, " ChHashMask : 0x%x\n", MemConfig->ChHashMask));
  139. DEBUG ((DEBUG_INFO, " ChHashInterleaveBit : 0x%x\n", MemConfig->ChHashInterleaveBit));
  140. DEBUG ((DEBUG_INFO, " EnableExtts : 0x%x\n", MemConfig->EnableExtts));
  141. DEBUG ((DEBUG_INFO, " EnableCltm : 0x%x\n", MemConfig->EnableCltm));
  142. DEBUG ((DEBUG_INFO, " EnableOltm : 0x%x\n", MemConfig->EnableOltm));
  143. DEBUG ((DEBUG_INFO, " EnablePwrDn : 0x%x\n", MemConfig->EnablePwrDn));
  144. DEBUG ((DEBUG_INFO, " EnablePwrDnLpddr : 0x%x\n", MemConfig->EnablePwrDnLpddr));
  145. DEBUG ((DEBUG_INFO, " Refresh2X : 0x%x\n", MemConfig->Refresh2X));
  146. DEBUG ((DEBUG_INFO, " DdrThermalSensor : 0x%x\n", MemConfig->DdrThermalSensor));
  147. DEBUG ((DEBUG_INFO, " LockPTMregs : 0x%x\n", MemConfig->LockPTMregs));
  148. DEBUG ((DEBUG_INFO, " UserPowerWeightsEn : 0x%x\n", MemConfig->UserPowerWeightsEn));
  149. DEBUG ((DEBUG_INFO, " EnergyScaleFact : 0x%x\n", MemConfig->EnergyScaleFact));
  150. DEBUG ((DEBUG_INFO, " RaplPwrFlCh1 : 0x%x\n", MemConfig->RaplPwrFlCh1));
  151. DEBUG ((DEBUG_INFO, " RaplPwrFlCh0 : 0x%x\n", MemConfig->RaplPwrFlCh0));
  152. DEBUG ((DEBUG_INFO, " RaplLim2Lock : 0x%x\n", MemConfig->RaplLim2Lock));
  153. DEBUG ((DEBUG_INFO, " RaplLim2WindX : 0x%x\n", MemConfig->RaplLim2WindX));
  154. DEBUG ((DEBUG_INFO, " RaplLim2WindY : 0x%x\n", MemConfig->RaplLim2WindY));
  155. DEBUG ((DEBUG_INFO, " RaplLim2Ena : 0x%x\n", MemConfig->RaplLim2Ena));
  156. DEBUG ((DEBUG_INFO, " RaplLim2Pwr : 0x%x\n", MemConfig->RaplLim2Pwr));
  157. DEBUG ((DEBUG_INFO, " RaplLim1WindX : 0x%x\n", MemConfig->RaplLim1WindX));
  158. DEBUG ((DEBUG_INFO, " RaplLim1WindY : 0x%x\n", MemConfig->RaplLim1WindY));
  159. DEBUG ((DEBUG_INFO, " RaplLim1Ena : 0x%x\n", MemConfig->RaplLim1Ena));
  160. DEBUG ((DEBUG_INFO, " RaplLim1Pwr : 0x%x\n", MemConfig->RaplLim1Pwr));
  161. DEBUG ((DEBUG_INFO, " WarmThresholdCh0Dimm0 : 0x%x\n", MemConfig->WarmThresholdCh0Dimm0));
  162. DEBUG ((DEBUG_INFO, " WarmThresholdCh0Dimm1 : 0x%x\n", MemConfig->WarmThresholdCh0Dimm1));
  163. DEBUG ((DEBUG_INFO, " WarmThresholdCh1Dimm0 : 0x%x\n", MemConfig->WarmThresholdCh1Dimm0));
  164. DEBUG ((DEBUG_INFO, " WarmThresholdCh1Dimm1 : 0x%x\n", MemConfig->WarmThresholdCh1Dimm1));
  165. DEBUG ((DEBUG_INFO, " HotThresholdCh0Dimm0 : 0x%x\n", MemConfig->HotThresholdCh0Dimm0));
  166. DEBUG ((DEBUG_INFO, " HotThresholdCh0Dimm1 : 0x%x\n", MemConfig->HotThresholdCh0Dimm1));
  167. DEBUG ((DEBUG_INFO, " HotThresholdCh1Dimm0 : 0x%x\n", MemConfig->HotThresholdCh1Dimm0));
  168. DEBUG ((DEBUG_INFO, " HotThresholdCh1Dimm1 : 0x%x\n", MemConfig->HotThresholdCh1Dimm1));
  169. DEBUG ((DEBUG_INFO, " WarmBudgetCh0Dimm0 : 0x%x\n", MemConfig->WarmBudgetCh0Dimm0));
  170. DEBUG ((DEBUG_INFO, " WarmBudgetCh0Dimm1 : 0x%x\n", MemConfig->WarmBudgetCh0Dimm1));
  171. DEBUG ((DEBUG_INFO, " WarmBudgetCh1Dimm0 : 0x%x\n", MemConfig->WarmBudgetCh1Dimm0));
  172. DEBUG ((DEBUG_INFO, " WarmBudgetCh1Dimm1 : 0x%x\n", MemConfig->WarmBudgetCh1Dimm1));
  173. DEBUG ((DEBUG_INFO, " HotBudgetCh0Dimm0 : 0x%x\n", MemConfig->HotBudgetCh0Dimm0));
  174. DEBUG ((DEBUG_INFO, " HotBudgetCh0Dimm1 : 0x%x\n", MemConfig->HotBudgetCh0Dimm1));
  175. DEBUG ((DEBUG_INFO, " HotBudgetCh1Dimm0 : 0x%x\n", MemConfig->HotBudgetCh1Dimm0));
  176. DEBUG ((DEBUG_INFO, " HotBudgetCh1Dimm1 : 0x%x\n", MemConfig->HotBudgetCh1Dimm1));
  177. DEBUG ((DEBUG_INFO, " IdleEnergyCh0Dimm0 : 0x%x\n", MemConfig->IdleEnergyCh0Dimm0));
  178. DEBUG ((DEBUG_INFO, " IdleEnergyCh0Dimm1 : 0x%x\n", MemConfig->IdleEnergyCh0Dimm1));
  179. DEBUG ((DEBUG_INFO, " IdleEnergyCh1Dimm0 : 0x%x\n", MemConfig->IdleEnergyCh1Dimm0));
  180. DEBUG ((DEBUG_INFO, " IdleEnergyCh1Dimm1 : 0x%x\n", MemConfig->IdleEnergyCh1Dimm1));
  181. DEBUG ((DEBUG_INFO, " PdEnergyCh0Dimm0 : 0x%x\n", MemConfig->PdEnergyCh0Dimm0));
  182. DEBUG ((DEBUG_INFO, " PdEnergyCh0Dimm1 : 0x%x\n", MemConfig->PdEnergyCh0Dimm1));
  183. DEBUG ((DEBUG_INFO, " PdEnergyCh1Dimm0 : 0x%x\n", MemConfig->PdEnergyCh1Dimm0));
  184. DEBUG ((DEBUG_INFO, " PdEnergyCh1Dimm1 : 0x%x\n", MemConfig->PdEnergyCh1Dimm1));
  185. DEBUG ((DEBUG_INFO, " ActEnergyCh0Dimm0 : 0x%x\n", MemConfig->ActEnergyCh0Dimm0));
  186. DEBUG ((DEBUG_INFO, " ActEnergyCh0Dimm1 : 0x%x\n", MemConfig->ActEnergyCh0Dimm1));
  187. DEBUG ((DEBUG_INFO, " ActEnergyCh1Dimm0 : 0x%x\n", MemConfig->ActEnergyCh1Dimm0));
  188. DEBUG ((DEBUG_INFO, " ActEnergyCh1Dimm1 : 0x%x\n", MemConfig->ActEnergyCh1Dimm1));
  189. DEBUG ((DEBUG_INFO, " RdEnergyCh0Dimm0 : 0x%x\n", MemConfig->RdEnergyCh0Dimm0));
  190. DEBUG ((DEBUG_INFO, " RdEnergyCh0Dimm1 : 0x%x\n", MemConfig->RdEnergyCh0Dimm1));
  191. DEBUG ((DEBUG_INFO, " RdEnergyCh1Dimm0 : 0x%x\n", MemConfig->RdEnergyCh1Dimm0));
  192. DEBUG ((DEBUG_INFO, " RdEnergyCh1Dimm1 : 0x%x\n", MemConfig->RdEnergyCh1Dimm1));
  193. DEBUG ((DEBUG_INFO, " WrEnergyCh0Dimm0 : 0x%x\n", MemConfig->WrEnergyCh0Dimm0));
  194. DEBUG ((DEBUG_INFO, " WrEnergyCh0Dimm1 : 0x%x\n", MemConfig->WrEnergyCh0Dimm1));
  195. DEBUG ((DEBUG_INFO, " WrEnergyCh1Dimm0 : 0x%x\n", MemConfig->WrEnergyCh1Dimm0));
  196. DEBUG ((DEBUG_INFO, " WrEnergyCh1Dimm1 : 0x%x\n", MemConfig->WrEnergyCh1Dimm1));
  197. DEBUG ((DEBUG_INFO, " SrefCfgEna : 0x%x\n", MemConfig->SrefCfgEna));
  198. DEBUG ((DEBUG_INFO, " SrefCfgIdleTmr : 0x%x\n", MemConfig->SrefCfgIdleTmr));
  199. DEBUG ((DEBUG_INFO, " ThrtCkeMinDefeat : 0x%x\n", MemConfig->ThrtCkeMinDefeat));
  200. DEBUG ((DEBUG_INFO, " ThrtCkeMinTmr : 0x%x\n", MemConfig->ThrtCkeMinTmr));
  201. DEBUG ((DEBUG_INFO, " ThrtCkeMinDefeatLpddr : 0x%x\n", MemConfig->ThrtCkeMinDefeatLpddr));
  202. DEBUG ((DEBUG_INFO, " ThrtCkeMinTmrLpddr : 0x%x\n", MemConfig->ThrtCkeMinTmrLpddr));
  203. DEBUG ((DEBUG_INFO, " AutoSelfRefreshSupport : 0x%x\n", MemConfig->AutoSelfRefreshSupport));
  204. DEBUG ((DEBUG_INFO, " ExtTemperatureSupport : 0x%x\n", MemConfig->ExtTemperatureSupport));
  205. DEBUG ((DEBUG_INFO, " MaxRttWr : 0x%x\n", MemConfig->MaxRttWr));
  206. DEBUG ((DEBUG_INFO, " MobilePlatform : 0x%x\n", MemConfig->MobilePlatform));
  207. DEBUG ((DEBUG_INFO, " Force1Dpc : 0x%x\n", MemConfig->Force1Dpc));
  208. DEBUG ((DEBUG_INFO, " ForceSingleRank : 0x%x\n", MemConfig->ForceSingleRank));
  209. DEBUG ((DEBUG_INFO, " PciIndex : 0x%x\n", MemConfig->PciIndex));
  210. DEBUG ((DEBUG_INFO, " PciData : 0x%x\n", MemConfig->PciData));
  211. DEBUG ((DEBUG_INFO, " CkeRankMapping : 0x%x\n", MemConfig->CkeRankMapping));
  212. DEBUG ((DEBUG_INFO, " RhPrevention : 0x%x\n", MemConfig->RhPrevention));
  213. DEBUG ((DEBUG_INFO, " RhSolution : 0x%x\n", MemConfig->RhSolution));
  214. DEBUG ((DEBUG_INFO, " RhActProbability : 0x%x\n", MemConfig->RhActProbability));
  215. DEBUG ((DEBUG_INFO, " VttTermination : 0x%x\n", MemConfig->VttTermination));
  216. DEBUG ((DEBUG_INFO, " VttCompForVsshi : 0x%x\n", MemConfig->VttCompForVsshi));
  217. DEBUG ((DEBUG_INFO, " BerEnable : 0x%x\n", MemConfig->BerEnable));
  218. for (Index = 0; Index < 4; Index++) {
  219. DEBUG ((DEBUG_INFO, " BerAddress[%d] : 0x%x\n",Index , MemConfig->BerAddress[Index]));
  220. }
  221. DEBUG ((DEBUG_INFO, " CleanMemory : 0x%x\n", MemConfigNoCrc->CleanMemory));
  222. DEBUG ((DEBUG_INFO, " ExitOnFailure : 0x%x\n", MemConfig->ExitOnFailure));
  223. DEBUG ((DEBUG_INFO, " Vc1ReadMeter : 0x%x\n", MemConfig->Vc1ReadMeter));
  224. DEBUG ((DEBUG_INFO, " Vc1ReadMeterTimeWindow : 0x%x\n", MemConfig->Vc1ReadMeterTimeWindow));
  225. DEBUG ((DEBUG_INFO, " Vc1ReadMeterThreshold : 0x%x\n", MemConfig->Vc1ReadMeterThreshold));
  226. DEBUG ((DEBUG_INFO, " SaGv : 0x%x\n", MemConfig->SaGv));
  227. DEBUG ((DEBUG_INFO, " FreqSaGvLow : 0x%x\n", MemConfig->FreqSaGvLow));
  228. DEBUG ((DEBUG_INFO, " StrongWkLeaker : 0x%x\n", MemConfig->StrongWkLeaker));
  229. DEBUG ((DEBUG_INFO, " CaVrefConfig : 0x%x\n", MemConfig->CaVrefConfig));
  230. DEBUG ((DEBUG_INFO, " EvLoader : 0x%x\n", MemConfig->EvLoader));
  231. DEBUG ((DEBUG_INFO, " EvLoaderDelay : 0x%x\n", MemConfig->EvLoaderDelay));
  232. DEBUG ((DEBUG_INFO, " PlatformMemorySize : 0x%x\n", MemConfigNoCrc->PlatformMemorySize));
  233. DEBUG ((DEBUG_INFO, " SmramMask : 0x%x\n", MemConfig->SmramMask));
  234. DEBUG ((DEBUG_INFO, " DllBwEn0: %d\n DllBwEn1: %d\n DllBwEn2: %d\n DllBwEn3: %d\n",
  235. MemConfig->DllBwEn0, MemConfig->DllBwEn1, MemConfig->DllBwEn2, MemConfig->DllBwEn3));
  236. DEBUG ((DEBUG_INFO, " RetrainOnFastFail: %d\n ForceOltmOrRefresh2x: %d\n",
  237. MemConfig->RetrainOnFastFail, MemConfig->ForceOltmOrRefresh2x));
  238. for (Index = 0; Index < SA_MC_MAX_CHANNELS; Index++) {
  239. DEBUG ((DEBUG_INFO, " DqByteMapCh%d : ", Index));
  240. for (Index2 = 0; Index2 < SA_MRC_ITERATION_MAX; Index2++) {
  241. DEBUG ((DEBUG_INFO, "0x%02x ", MemConfigNoCrc->DqByteMap->DqByteMap[Index][Index2][0]));
  242. DEBUG ((DEBUG_INFO, "0x%02x ", MemConfigNoCrc->DqByteMap->DqByteMap[Index][Index2][1]));
  243. }
  244. DEBUG ((DEBUG_INFO, "\n"));
  245. }
  246. for (Index = 0; Index < SA_MC_MAX_CHANNELS; Index++) {
  247. DEBUG ((DEBUG_INFO, " DqsMapCpu2DramCh%d : ", Index));
  248. for (Index2 = 0; Index2 < SA_MC_MAX_BYTES_NO_ECC; Index2++) {
  249. DEBUG ((DEBUG_INFO, "%d ", MemConfigNoCrc->DqsMap->DqsMapCpu2Dram[Index][Index2]));
  250. }
  251. DEBUG ((DEBUG_INFO, "\n"));
  252. }
  253. DEBUG ((DEBUG_INFO, "\n------------------------ SA Policy (PEI PreMem) Print END -----------------\n"));
  254. DEBUG_CODE_END ();
  255. return;
  256. }
  257. /**
  258. This function prints the PEI phase policy.
  259. @param[in] SiPolicyPpi - Instance of SI_POLICY_PPI
  260. **/
  261. VOID
  262. EFIAPI
  263. SaPrintPolicyPpi (
  264. IN SI_POLICY_PPI *SiPolicyPpi
  265. )
  266. {
  267. DEBUG_CODE_BEGIN ();
  268. EFI_STATUS Status;
  269. GRAPHICS_PEI_CONFIG *GtConfig;
  270. INTN Index;
  271. VTD_CONFIG *Vtd;
  272. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gVtdConfigGuid, (VOID *) &Vtd);
  273. ASSERT_EFI_ERROR (Status);
  274. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gGraphicsPeiConfigGuid, (VOID *) &GtConfig);
  275. ASSERT_EFI_ERROR (Status);
  276. DEBUG ((DEBUG_INFO, "\n------------------------ SA Policy (PEI) Print BEGIN -----------------\n"));
  277. DEBUG ((DEBUG_INFO, "Revision : 0x%x\n", SiPolicyPpi->TableHeader.Header.Revision));
  278. ASSERT (SiPolicyPpi->TableHeader.Header.Revision >= SI_POLICY_REVISION);
  279. DEBUG ((DEBUG_INFO, "------------------------ GRAPHICS_PEI_CONFIG -----------------\n"));
  280. DEBUG ((DEBUG_INFO, " Revision : %d\n", GtConfig->Header.Revision));
  281. ASSERT (GtConfig->Header.Revision >= GRAPHICS_PEI_CONFIG_REVISION);
  282. DEBUG ((DEBUG_INFO, " PeiGraphicsPeimInit : 0x%x\n", GtConfig->PeiGraphicsPeimInit));
  283. DEBUG ((DEBUG_INFO, " LogoPtr : 0x%x\n", GtConfig->LogoPtr));
  284. DEBUG ((DEBUG_INFO, " LogoSize : 0x%x\n", GtConfig->LogoSize));
  285. DEBUG ((DEBUG_INFO, " GraphicsConfigPtr : 0x%x\n", GtConfig->GraphicsConfigPtr));
  286. DEBUG ((DEBUG_INFO, "------------------------ VTD_CONFIG -----------------\n"));
  287. DEBUG ((DEBUG_INFO, " Revision : %d\n", Vtd->Header.Revision));
  288. ASSERT (Vtd->Header.Revision >= VTD_CONFIG_REVISION);
  289. DEBUG ((DEBUG_INFO, " VtdDisable : 0x%x\n", Vtd->VtdDisable));
  290. DEBUG ((DEBUG_INFO, " X2ApicOptOut : 0x%x\n", Vtd->X2ApicOptOut));
  291. DEBUG ((DEBUG_INFO, " VtdBaseAddress[%d] :", SA_VTD_ENGINE_NUMBER));
  292. for (Index = 0; Index < SA_VTD_ENGINE_NUMBER; Index++) {
  293. DEBUG ((DEBUG_INFO, " 0x%x", Vtd->BaseAddress[Index]));
  294. }
  295. DEBUG ((DEBUG_INFO, "\n"));
  296. DEBUG ((DEBUG_INFO, "\n------------------------ SA Policy (PEI) Print END -----------------\n"));
  297. DEBUG_CODE_END ();
  298. return;
  299. }