OpenBoardPkgPcd.dsc 19 KB

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  1. ## @file
  2. # PCD configuration build description file for the KabylakeRvp3 board.
  3. #
  4. # Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
  5. #
  6. # SPDX-License-Identifier: BSD-2-Clause-Patent
  7. #
  8. ##
  9. ################################################################################
  10. #
  11. # Pcd Section - list of all PCD Entries used by this board.
  12. #
  13. ################################################################################
  14. [PcdsFixedAtBuild.common]
  15. ######################################
  16. # Key Boot Stage and FSP configuration
  17. ######################################
  18. #
  19. # Please select the Boot Stage here.
  20. # Stage 1 - enable debug (system deadloop after debug init)
  21. # Stage 2 - mem init (system deadloop after mem init)
  22. # Stage 3 - boot to shell only
  23. # Stage 4 - boot to OS
  24. # Stage 5 - boot to OS with security boot enabled
  25. # Stage 6 - boot with advanced features enabled
  26. #
  27. gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
  28. #
  29. # 0: FSP Wrapper is running in Dispatch mode.
  30. # 1: FSP Wrapper is running in API mode.
  31. #
  32. gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0
  33. #
  34. # FALSE: The board is not a FSP wrapper (FSP binary not used)
  35. # TRUE: The board is a FSP wrapper (FSP binary is used)
  36. #
  37. gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
  38. #
  39. # FALSE: The PEI Main included in FvPreMemory is used to dispatch all PEIMs
  40. # (both inside FSP and outside FSP).
  41. # Pros:
  42. # * PEI Main is re-built from source and is always the latest version
  43. # * Platform code can link any desired LibraryClass to PEI Main
  44. # (Ex: Custom DebugLib instance, SerialPortLib, etc.)
  45. # Cons:
  46. # * The PEI Main being used to execute FSP PEIMs is not the PEI Main
  47. # that the FSP PEIMs were tested with, adding risk of breakage.
  48. # * Two copies of PEI Main will exist in the final binary,
  49. # #1 in FSP-M, #2 in FvPreMemory. The copy in FSP-M is never
  50. # executed, wasting space.
  51. #
  52. # <b>TRUE</b>: The PEI Main included in FSP is used to dispatch all PEIMs
  53. # (both inside FSP and outside FSP). PEI Main will not be included in
  54. # FvPreMemory. This is the default and is the recommended choice.
  55. #
  56. gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain|TRUE
  57. #
  58. # FSP Base address PCD will be updated in FDF basing on flash map.
  59. #
  60. gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0
  61. gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0
  62. gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000
  63. gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
  64. gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000
  65. gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
  66. gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000
  67. !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
  68. #
  69. # FSP API mode does not share stack with the boot loader,
  70. # so FSP needs more temporary memory for FSP heap + stack size.
  71. #
  72. gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x26000
  73. #
  74. # FSP API mode does not need to enlarge the boot loader stack size
  75. # since the stacks are separate.
  76. #
  77. gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000
  78. !else
  79. #
  80. # In FSP Dispatch mode boot loader stack size must be large
  81. # enough for executing both boot loader and FSP.
  82. #
  83. gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000
  84. !endif
  85. !if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1)
  86. gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
  87. gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
  88. !else
  89. #
  90. # FSP Dispatch mode requires more platform memory as boot loader and FSP sharing the same
  91. # platform memory.
  92. #
  93. gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize|0x5500000
  94. !endif
  95. [PcdsFeatureFlag.common]
  96. ######################################
  97. # Edk2 Configuration
  98. ######################################
  99. gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst|FALSE
  100. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
  101. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE
  102. gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
  103. ######################################
  104. # Silicon Configuration
  105. ######################################
  106. # Build switches
  107. gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE
  108. # CPU
  109. gSiPkgTokenSpaceGuid.PcdBiosGuardEnable|TRUE
  110. gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE
  111. gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE
  112. # SA
  113. gSiPkgTokenSpaceGuid.PcdIgdEnable|TRUE
  114. gSiPkgTokenSpaceGuid.PcdPegEnable|TRUE
  115. gSiPkgTokenSpaceGuid.PcdSgEnable|TRUE
  116. gSiPkgTokenSpaceGuid.PcdSaDmiEnable|TRUE
  117. gSiPkgTokenSpaceGuid.PcdSkycamEnable|TRUE
  118. gSiPkgTokenSpaceGuid.PcdGmmEnable|TRUE
  119. gSiPkgTokenSpaceGuid.PcdSaOcEnable|TRUE
  120. gSiPkgTokenSpaceGuid.PcdVtdEnable|TRUE
  121. gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|TRUE
  122. # ME
  123. gSiPkgTokenSpaceGuid.PcdAmtEnable|TRUE
  124. gSiPkgTokenSpaceGuid.PcdAtaEnable|TRUE
  125. gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE
  126. gSiPkgTokenSpaceGuid.PcdJhiEnable|TRUE
  127. # Others
  128. gSiPkgTokenSpaceGuid.PcdAcpiEnable|TRUE
  129. gSiPkgTokenSpaceGuid.PcdBdatEnable|TRUE
  130. gSiPkgTokenSpaceGuid.PcdBootGuardEnable|TRUE
  131. gSiPkgTokenSpaceGuid.PcdCpuPowerOnConfigEnable|TRUE
  132. gSiPkgTokenSpaceGuid.PcdEvLoaderEnable|FALSE
  133. gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE
  134. gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE
  135. gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE
  136. gSiPkgTokenSpaceGuid.PcdPpmEnable|TRUE
  137. gSiPkgTokenSpaceGuid.PcdS3Enable|TRUE
  138. gSiPkgTokenSpaceGuid.PcdSerialGpioEnable|TRUE
  139. gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE
  140. gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE
  141. gSiPkgTokenSpaceGuid.PcdSmbiosEnable|TRUE
  142. gSiPkgTokenSpaceGuid.PcdSmmVariableEnable|TRUE
  143. gSiPkgTokenSpaceGuid.PcdSoftwareGuardEnable|TRUE
  144. gSiPkgTokenSpaceGuid.PcdSsaFlagEnable|FALSE
  145. gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE
  146. ######################################
  147. # Platform Configuration
  148. ######################################
  149. #
  150. # MinPlatform common include for required feature PCD
  151. # These PCD must be set before the core include files, CoreCommonLib,
  152. # CorePeiLib, and CoreDxeLib.
  153. # Optional MinPlatformPkg features should be enabled after this
  154. #
  155. !include MinPlatformPkg/Include/Dsc/MinPlatformFeaturesPcd.dsc.inc
  156. #
  157. # Commonly used MinPlatform feature configuration logic that maps functionity to stage
  158. #
  159. !include BoardModulePkg/Include/Dsc/CommonStageConfig.dsc.inc
  160. ######################################
  161. # Board Configuration
  162. ######################################
  163. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMultiBoardSupport|TRUE
  164. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdTbtEnable|FALSE
  165. [PcdsFixedAtBuild.common]
  166. ######################################
  167. # Edk2 Configuration
  168. ######################################
  169. !if $(TARGET) == RELEASE
  170. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
  171. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
  172. !else
  173. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
  174. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
  175. !endif
  176. gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
  177. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  178. gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
  179. !endif
  180. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
  181. gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
  182. gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
  183. gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
  184. gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
  185. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
  186. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  187. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140
  188. !endif
  189. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000
  190. gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|TRUE
  191. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
  192. !if $(TARGET) == DEBUG
  193. gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
  194. !endif
  195. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
  196. !if $(TARGET) == RELEASE
  197. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
  198. !else
  199. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
  200. !endif
  201. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80
  202. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x40
  203. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber|0x0
  204. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber|0x1F
  205. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset|0x44
  206. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2
  207. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress|0x1800
  208. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC
  209. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08
  210. # Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
  211. gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000
  212. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
  213. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000
  214. !if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1)
  215. #
  216. # In non-FSP build (EDK2 build) or FSP API mode below PCD are FixedAtBuild
  217. # (They will be DynamicEx in FSP Dispatch mode)
  218. #
  219. ## Specifies max supported number of Logical Processors.
  220. # @Prompt Configure max supported number of Logical Processors
  221. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|12
  222. ## Specifies the size of the microcode Region.
  223. # @Prompt Microcode Region size.
  224. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0
  225. ## Specifies the AP wait loop state during POST phase.
  226. # The value is defined as below.
  227. # 1: Place AP in the Hlt-Loop state.
  228. # 2: Place AP in the Mwait-Loop state.
  229. # 3: Place AP in the Run-Loop state.
  230. # @Prompt The AP wait loop state.
  231. gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2
  232. !endif
  233. ######################################
  234. # Silicon Configuration
  235. ######################################
  236. # Refer to HstiFeatureBit.h for bit definitions
  237. gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2
  238. gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
  239. #
  240. # Set the location of the DUTY_CYCLE field in the P_CNT register
  241. # and indicate the width of the clock duty cycle to OS power management
  242. #
  243. gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
  244. gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
  245. ######################################
  246. # Platform Configuration
  247. ######################################
  248. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1
  249. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8
  250. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2
  251. gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
  252. #
  253. # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
  254. #
  255. # BIT0: If set, expresses that for all synchronous SMM entries,SMM will validate that input and output buffers lie entirely within the expected fixed memory regions.
  256. # BIT1: If set, expresses that for all synchronous SMM entries, SMM will validate that input and output pointers embedded within the fixed communication buffer only refer to address ranges \
  257. # that lie entirely within the expected fixed memory regions.
  258. # BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
  259. # BIT3-31: Reserved
  260. #
  261. gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
  262. !if $(TARGET) == RELEASE
  263. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402
  264. !else
  265. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B
  266. !endif
  267. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b
  268. !if $(TARGET) == RELEASE
  269. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70
  270. !else
  271. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0
  272. !endif
  273. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 1
  274. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  275. !endif
  276. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 2
  277. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  278. !endif
  279. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 3
  280. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  281. !endif
  282. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 4
  283. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x1F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  284. !endif
  285. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 5
  286. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  287. !endif
  288. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 6
  289. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  290. !endif
  291. ######################################
  292. # Board Configuration
  293. ######################################
  294. gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|1
  295. gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x00, 0x00, 0x1F, 0x00}
  296. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGttMmAddress|0xDF000000
  297. ## Specifies the DDC I2C channel to claim as the HDMI debug port
  298. # The value is defined as below.
  299. # 2: DDC channel B
  300. # 3: DDC channel C
  301. # 4: DDC channel D
  302. # @Prompt DDC I2C channel to claim as the HDMI debug port
  303. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdI2cHdmiDebugPortDdcI2cChannel|0x00
  304. [PcdsFixedAtBuild.IA32]
  305. ######################################
  306. # Edk2 Configuration
  307. ######################################
  308. gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
  309. gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
  310. gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000
  311. ######################################
  312. # Platform Configuration
  313. ######################################
  314. gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
  315. [PcdsFixedAtBuild.X64]
  316. ######################################
  317. # Edk2 Configuration
  318. ######################################
  319. # Default platform supported RFC 4646 languages: (American) English
  320. gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US"
  321. [PcdsPatchableInModule.common]
  322. ######################################
  323. # Edk2 Configuration
  324. ######################################
  325. gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0208
  326. gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
  327. ######################################
  328. # Silicon Configuration
  329. ######################################
  330. !if $(TARGET) == DEBUG
  331. gSiPkgTokenSpaceGuid.PcdSerialIoUartDebugEnable|1
  332. !endif
  333. [PcdsDynamicDefault]
  334. ######################################
  335. # Edk2 Configuration
  336. ######################################
  337. gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE
  338. gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|FALSE
  339. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0
  340. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0
  341. gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0
  342. #
  343. # Set video to native resolution as Windows 8 WHCK requirement.
  344. #
  345. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0x0
  346. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0x0
  347. gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap|0
  348. gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0x0000001F
  349. gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
  350. gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
  351. #
  352. # FSP Base address PCD will be updated in FDF basing on flash map.
  353. #
  354. gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0
  355. # Platform will pre-allocate UPD buffer and pass it to FspWrapper
  356. # Those dummy address will be patched before FspWrapper executing
  357. gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF
  358. gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0xFFFFFFFF
  359. ######################################
  360. # Board Configuration
  361. ######################################
  362. # Thunderbolt Configuration
  363. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcDcSwitch|0x0
  364. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcpiGpeSignature|0
  365. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcpiGpeSignaturePorting|0
  366. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAspm|0x0
  367. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad|0x02010011
  368. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtControllerEn|0x1
  369. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtControllerType|0x1
  370. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtForcepowerGpioPad|13
  371. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtGpioAccessType|0x2
  372. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtGpioLevel|0x1
  373. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtHotNotify|0x1
  374. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtHotSMI|0x1
  375. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieExtraBusRsvd|56
  376. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax|26
  377. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieMemRsvd|100
  378. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax|28
  379. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPciePMemRsvd|100
  380. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieRpNumber|0x1
  381. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtSecurityMode|0x1
  382. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtSetClkReq|0x1
  383. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtWakeupSupport|0x0
  384. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtWin10Support|0x0
  385. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdExpander|0x0
  386. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPchPcieRootPortHpe|0x00000001
  387. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3Tbt|0x1
  388. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtClkReq|0x1
  389. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtClkReqDelay|0x0
  390. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtOffDelay|5000
  391. [PcdsDynamicHii.X64.DEFAULT]
  392. ######################################
  393. # Edk2 Configuration
  394. ######################################
  395. gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
  396. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  397. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"Timeout"
  398. !else
  399. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
  400. !endif