ConfigVars.h 3.1 KB

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  1. /** @file
  2. *
  3. * Copyright (c) 2020, Andrei Warkentin <andrey.warkentin@gmail.com>
  4. * Copyright (c) 2020, ARM Limited. All rights reserved.
  5. *
  6. * SPDX-License-Identifier: BSD-2-Clause-Patent
  7. *
  8. **/
  9. #ifndef CONFIG_VARS_H
  10. #define CONFIG_VARS_H
  11. #pragma pack(1)
  12. typedef struct {
  13. /*
  14. * One bit for each scaled resolution supported,
  15. * these are ordered exactly like mGopModeData
  16. * in DisplayDxe.
  17. *
  18. * 800x600, 640x480, 1024x768, 720p, 1080p, native.
  19. */
  20. UINT8 v800 : 1;
  21. UINT8 v640 : 1;
  22. UINT8 v1024 : 1;
  23. UINT8 v720p : 1;
  24. UINT8 v1080p : 1;
  25. UINT8 Physical : 1;
  26. } DISPLAY_ENABLE_SCALED_VMODES_VARSTORE_DATA;
  27. #pragma pack()
  28. typedef struct {
  29. /*
  30. * 0 - No screenshot support.
  31. * 1 - Screenshot support via hotkey.
  32. */
  33. UINT32 Enable;
  34. } DISPLAY_ENABLE_SSHOT_VARSTORE_DATA;
  35. typedef struct {
  36. /*
  37. * 0 - No JTAG.
  38. * 1 - JTAG mode.
  39. */
  40. UINT32 Enable;
  41. } DEBUG_ENABLE_JTAG_VARSTORE_DATA;
  42. typedef struct {
  43. #define CHIPSET_CPU_CLOCK_LOW 0
  44. #define CHIPSET_CPU_CLOCK_DEFAULT 1
  45. #define CHIPSET_CPU_CLOCK_MAX 2
  46. #define CHIPSET_CPU_CLOCK_CUSTOM 3
  47. UINT32 Clock;
  48. } CHIPSET_CPU_CLOCK_VARSTORE_DATA;
  49. typedef struct {
  50. UINT32 Clock;
  51. } CHIPSET_CUSTOM_CPU_CLOCK_VARSTORE_DATA;
  52. typedef struct {
  53. /*
  54. * Always set by ConfigDxe prior to HII init to reflect
  55. * platform capability.
  56. */
  57. UINT32 Supported;
  58. } ADVANCED_RAM_MORE_THAN_3GB_VARSTORE_DATA;
  59. typedef struct {
  60. UINT32 Enabled;
  61. } ADVANCED_RAM_LIMIT_TO_3GB_VARSTORE_DATA;
  62. typedef struct {
  63. UINT32 Enabled;
  64. } ADVANCED_FAN_ON_GPIO_VARSTORE_DATA;
  65. typedef struct {
  66. UINT32 Value;
  67. } ADVANCED_FANTEMP_VARSTORE_DATA;
  68. typedef struct {
  69. UINT32 Value;
  70. } ADVANCED_XHCIPCI_VARSTORE_DATA;
  71. typedef struct {
  72. #define SYSTEM_TABLE_MODE_ACPI 0
  73. #define SYSTEM_TABLE_MODE_BOTH 1
  74. #define SYSTEM_TABLE_MODE_DT 2
  75. UINT32 Mode;
  76. } SYSTEM_TABLE_MODE_VARSTORE_DATA;
  77. #define ASSET_TAG_STR_MAX_LEN 32
  78. #define ASSET_TAG_STR_STORAGE_SIZE 33
  79. typedef struct {
  80. CHAR16 AssetTag[ASSET_TAG_STR_STORAGE_SIZE];
  81. } ADVANCED_ASSET_TAG_VARSTORE_DATA;
  82. typedef struct {
  83. /*
  84. * 0 - uSD slot routed to Broadcom SDHOST on Pi 3 or eMMC2 on Pi 4.
  85. * 1 - uSD slot routed to Arasan SDHCI.
  86. */
  87. UINT32 Routing;
  88. } MMC_SD_VARSTORE_DATA;
  89. typedef struct {
  90. /*
  91. * 0 - Don't disable multi-block.
  92. * 1 - Disable multi-block commands.
  93. */
  94. UINT32 DisableMulti;
  95. } MMC_DISMULTI_VARSTORE_DATA;
  96. typedef struct {
  97. /*
  98. * 0 - Don't force 1 bit mode.
  99. * 1 - Force 1 bit mode.
  100. */
  101. UINT32 Force1Bit;
  102. } MMC_FORCE1BIT_VARSTORE_DATA;
  103. typedef struct {
  104. /*
  105. * 0 - Don't force default speed.
  106. * 1 - Force default speed.
  107. */
  108. UINT32 ForceDS;
  109. } MMC_FORCEDS_VARSTORE_DATA;
  110. typedef struct {
  111. /*
  112. * Default Speed MHz override (25MHz default).
  113. */
  114. UINT32 MHz;
  115. } MMC_SD_DS_MHZ_VARSTORE_DATA;
  116. typedef struct {
  117. /*
  118. * High Speed MHz override (50MHz default).
  119. */
  120. UINT32 MHz;
  121. } MMC_SD_HS_MHZ_VARSTORE_DATA;
  122. typedef struct {
  123. /*
  124. * 0 - eMMC PIO mode
  125. * 1 - eMMC DMA mode
  126. */
  127. UINT32 EnableDma;
  128. } MMC_EMMC_DMA_VARSTORE_DATA;
  129. #endif /* CONFIG_VARS_H */