BoardFeatureD05.c 7.6 KB

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  1. /** @file
  2. *
  3. * Copyright (c) 2016, Hisilicon Limited. All rights reserved.
  4. * Copyright (c) 2016, Linaro Limited. All rights reserved.
  5. *
  6. * This program and the accompanying materials
  7. * are licensed and made available under the terms and conditions of the BSD License
  8. * which accompanies this distribution. The full text of the license may be found at
  9. * http://opensource.org/licenses/bsd-license.php
  10. *
  11. * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13. *
  14. **/
  15. #include <PlatformArch.h>
  16. #include <Uefi.h>
  17. #include <IndustryStandard/SmBios.h>
  18. #include <Library/BaseMemoryLib.h>
  19. #include <Library/DebugLib.h>
  20. #include <Library/HiiLib.h>
  21. #include <Library/I2CLib.h>
  22. #include <Library/IoLib.h>
  23. #include <Library/OemMiscLib.h>
  24. #include <Library/SerdesLib.h>
  25. #include <Protocol/Smbios.h>
  26. I2C_DEVICE gDS3231RtcDevice = {
  27. .Socket = 0,
  28. .Port = 4,
  29. .DeviceType = DEVICE_TYPE_SPD,
  30. .SlaveDeviceAddress = 0x68
  31. };
  32. SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[] = {
  33. {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM}
  34. };
  35. SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[] = {
  36. {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM}
  37. };
  38. SERDES_PARAM gSerdesParamNA = {
  39. .Hilink0Mode = EmHilink0Hccs1X8Width16,
  40. .Hilink1Mode = EmHilink1Hccs0X8Width16,
  41. .Hilink2Mode = EmHilink2Pcie2X8,
  42. .Hilink3Mode = 0x0,
  43. .Hilink4Mode = 0xF,
  44. .Hilink5Mode = EmHilink5Sas1X4,
  45. .Hilink6Mode = 0x0,
  46. .UseSsc = 0,
  47. };
  48. SERDES_PARAM gSerdesParamNB = {
  49. .Hilink0Mode = EmHilink0Pcie1X8,
  50. .Hilink1Mode = EmHilink1Pcie0X8,
  51. .Hilink2Mode = EmHilink2Sas0X8,
  52. .Hilink3Mode = 0x0,
  53. .Hilink4Mode = 0xF,
  54. .Hilink5Mode = EmHilink5Pcie2X2Pcie3X2,
  55. .Hilink6Mode = 0xF,
  56. .UseSsc = 0,
  57. };
  58. SERDES_PARAM gSerdesParamS1NA = {
  59. .Hilink0Mode = EmHilink0Hccs1X8Width16,
  60. .Hilink1Mode = EmHilink1Hccs0X8Width16,
  61. .Hilink2Mode = EmHilink2Pcie2X8,
  62. .Hilink3Mode = 0x0,
  63. .Hilink4Mode = 0xF,
  64. .Hilink5Mode = EmHilink5Sas1X4,
  65. .Hilink6Mode = 0x0,
  66. .UseSsc = 0,
  67. };
  68. SERDES_PARAM gSerdesParamS1NB = {
  69. .Hilink0Mode = EmHilink0Pcie1X8,
  70. .Hilink1Mode = EmHilink1Pcie0X8,
  71. .Hilink2Mode = EmHilink2Sas0X8,
  72. .Hilink3Mode = 0x0,
  73. .Hilink4Mode = 0xF,
  74. .Hilink5Mode = EmHilink5Pcie2X2Pcie3X2,
  75. .Hilink6Mode = 0xF,
  76. .UseSsc = 0,
  77. };
  78. EFI_STATUS
  79. OemGetSerdesParam (
  80. OUT SERDES_PARAM *ParamA,
  81. OUT SERDES_PARAM *ParamB,
  82. IN UINT32 SocketId
  83. )
  84. {
  85. if (ParamA == NULL || ParamB == NULL) {
  86. DEBUG((DEBUG_ERROR, "[%a]:[%dL] Param == NULL!\n", __FUNCTION__, __LINE__));
  87. return EFI_INVALID_PARAMETER;
  88. }
  89. if (SocketId == 0) {
  90. (VOID) CopyMem(ParamA, &gSerdesParamNA, sizeof(*ParamA));
  91. (VOID) CopyMem(ParamB, &gSerdesParamNB, sizeof(*ParamB));
  92. } else {
  93. (VOID) CopyMem(ParamA, &gSerdesParamS1NA, sizeof(*ParamA));
  94. (VOID) CopyMem(ParamB, &gSerdesParamS1NB, sizeof(*ParamB));
  95. }
  96. return EFI_SUCCESS;
  97. }
  98. VOID
  99. OemPcieResetAndOffReset (
  100. VOID
  101. )
  102. {
  103. return;
  104. }
  105. SMBIOS_TABLE_TYPE9 gPcieSlotInfo[] = {
  106. // PCIe0 Slot 1
  107. {
  108. { // Hdr
  109. EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
  110. 0, // Length,
  111. 0 // Handle
  112. },
  113. 1, // SlotDesignation
  114. SlotTypePciExpressX8, // SlotType
  115. SlotDataBusWidth8X, // SlotDataBusWidth
  116. SlotUsageAvailable, // SlotUsage
  117. SlotLengthOther, // SlotLength
  118. 0x0001, // SlotId
  119. { // SlotCharacteristics1
  120. 0, // CharacteristicsUnknown :1;
  121. 0, // Provides50Volts :1;
  122. 0, // Provides33Volts :1;
  123. 0, // SharedSlot :1;
  124. 0, // PcCard16Supported :1;
  125. 0, // CardBusSupported :1;
  126. 0, // ZoomVideoSupported :1;
  127. 0 // ModemRingResumeSupported:1;
  128. },
  129. { // SlotCharacteristics2
  130. 0, // PmeSignalSupported :1;
  131. 0, // HotPlugDevicesSupported :1;
  132. 0, // SmbusSignalSupported :1;
  133. 0 // Reserved :5;
  134. },
  135. 0x00, // SegmentGroupNum
  136. 0x00, // BusNum
  137. 0 // DevFuncNum
  138. },
  139. // PCIe0 Slot 4
  140. {
  141. { // Hdr
  142. EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // Type,
  143. 0, // Length,
  144. 0 // Handle
  145. },
  146. 1, // SlotDesignation
  147. SlotTypePciExpressX8, // SlotType
  148. SlotDataBusWidth8X, // SlotDataBusWidth
  149. SlotUsageAvailable, // SlotUsage
  150. SlotLengthOther, // SlotLength
  151. 0x0004, // SlotId
  152. { // SlotCharacteristics1
  153. 0, // CharacteristicsUnknown :1;
  154. 0, // Provides50Volts :1;
  155. 0, // Provides33Volts :1;
  156. 0, // SharedSlot :1;
  157. 0, // PcCard16Supported :1;
  158. 0, // CardBusSupported :1;
  159. 0, // ZoomVideoSupported :1;
  160. 0 // ModemRingResumeSupported:1;
  161. },
  162. { // SlotCharacteristics2
  163. 0, // PmeSignalSupported :1;
  164. 0, // HotPlugDevicesSupported :1;
  165. 0, // SmbusSignalSupported :1;
  166. 0 // Reserved :5;
  167. },
  168. 0x00, // SegmentGroupNum
  169. 0x00, // BusNum
  170. 0 // DevFuncNum
  171. }
  172. };
  173. UINT8
  174. OemGetPcieSlotNumber (
  175. VOID
  176. )
  177. {
  178. return sizeof (gPcieSlotInfo) / sizeof (SMBIOS_TABLE_TYPE9);
  179. }
  180. EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM] = {
  181. {{STRING_TOKEN(STR_LEMON_C10_DIMM_000), STRING_TOKEN(STR_LEMON_C10_DIMM_001), STRING_TOKEN(STR_LEMON_C10_DIMM_002)},
  182. {STRING_TOKEN(STR_LEMON_C10_DIMM_010), STRING_TOKEN(STR_LEMON_C10_DIMM_011), STRING_TOKEN(STR_LEMON_C10_DIMM_012)},
  183. {STRING_TOKEN(STR_LEMON_C10_DIMM_020), STRING_TOKEN(STR_LEMON_C10_DIMM_021), STRING_TOKEN(STR_LEMON_C10_DIMM_022)},
  184. {STRING_TOKEN(STR_LEMON_C10_DIMM_030), STRING_TOKEN(STR_LEMON_C10_DIMM_031), STRING_TOKEN(STR_LEMON_C10_DIMM_032)}},
  185. {{STRING_TOKEN(STR_LEMON_C10_DIMM_100), STRING_TOKEN(STR_LEMON_C10_DIMM_101), STRING_TOKEN(STR_LEMON_C10_DIMM_102)},
  186. {STRING_TOKEN(STR_LEMON_C10_DIMM_110), STRING_TOKEN(STR_LEMON_C10_DIMM_111), STRING_TOKEN(STR_LEMON_C10_DIMM_112)},
  187. {STRING_TOKEN(STR_LEMON_C10_DIMM_120), STRING_TOKEN(STR_LEMON_C10_DIMM_121), STRING_TOKEN(STR_LEMON_C10_DIMM_122)},
  188. {STRING_TOKEN(STR_LEMON_C10_DIMM_130), STRING_TOKEN(STR_LEMON_C10_DIMM_131), STRING_TOKEN(STR_LEMON_C10_DIMM_132)}}
  189. };
  190. EFI_HII_HANDLE
  191. EFIAPI
  192. OemGetPackages (
  193. )
  194. {
  195. return HiiAddPackages (
  196. &gEfiCallerIdGuid,
  197. NULL,
  198. OemMiscLibHi1616EvbStrings,
  199. NULL,
  200. NULL
  201. );
  202. }