Pv660D02.fdf 12 KB

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  1. #
  2. # Copyright (c) 2011, 2012, ARM Limited. All rights reserved.
  3. # Copyright (c) 2015, Hisilicon Limited. All rights reserved.
  4. # Copyright (c) 2015, Linaro Limited. All rights reserved.
  5. #
  6. # This program and the accompanying materials
  7. # are licensed and made available under the terms and conditions of the BSD License
  8. # which accompanies this distribution. The full text of the license may be found at
  9. # http://opensource.org/licenses/bsd-license.php
  10. #
  11. # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12. # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13. #
  14. [DEFINES]
  15. ################################################################################
  16. #
  17. # FD Section
  18. # The [FD] Section is made up of the definition statements and a
  19. # description of what goes into the Flash Device Image. Each FD section
  20. # defines one flash "device" image. A flash device image may be one of
  21. # the following: Removable media bootable image (like a boot floppy
  22. # image,) an Option ROM image (that would be "flashed" into an add-in
  23. # card,) a System "Flash" image (that would be burned into a system's
  24. # flash) or an Update ("Capsule") image that will be used to update and
  25. # existing system flash.
  26. #
  27. ################################################################################
  28. [FD.PV660D02]
  29. BaseAddress = 0xA4800000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
  30. Size = 0x00300000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
  31. ErasePolarity = 1
  32. # This one is tricky, it must be: BlockSize * NumBlocks = Size
  33. BlockSize = 0x00010000
  34. NumBlocks = 0x30
  35. ################################################################################
  36. #
  37. # Following are lists of FD Region layout which correspond to the locations of different
  38. # images within the flash device.
  39. #
  40. # Regions must be defined in ascending order and may not overlap.
  41. #
  42. # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
  43. # the pipe "|" character, followed by the size of the region, also in hex with the leading
  44. # "0x" characters. Like:
  45. # Offset|Size
  46. # PcdOffsetCName|PcdSizeCName
  47. # RegionType <FV, DATA, or FILE>
  48. #
  49. ################################################################################
  50. 0x00000000|0x00040000
  51. gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
  52. FILE = Platform/Hisilicon/D02/Sec/FVMAIN_SEC.Fv
  53. 0x00040000|0x00240000
  54. gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
  55. FV = FVMAIN_COMPACT
  56. ## Place for Trusted Firmware
  57. 0x00280000|0x00020000
  58. gHisiTokenSpaceGuid.PcdTrustedFirmwareBL1Base
  59. FILE = Platform/Hisilicon/D02/bl1.bin
  60. 0x002a0000|0x00020000
  61. FILE = Platform/Hisilicon/D02/fip.bin
  62. 0x002e0000|0x0000e000
  63. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
  64. DATA = {
  65. ## This is the EFI_FIRMWARE_VOLUME_HEADER
  66. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  67. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  68. # FileSystemGuid: gEfiSystemNvDataFvGuid =
  69. 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
  70. 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
  71. # FvLength: 0x20000
  72. 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
  73. #Signature "_FVH" #Attributes
  74. 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
  75. #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
  76. 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02,
  77. #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block
  78. 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
  79. #Blockmap[1]: End
  80. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  81. ## This is the VARIABLE_STORE_HEADER gEfiVariableGuid
  82. 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
  83. 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
  84. #Size: 0xe000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xdFB8
  85. 0xB8, 0xdF, 0x00, 0x00,
  86. #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
  87. 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  88. }
  89. 0x002ee000|0x00002000
  90. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
  91. #NV_FTW_WORKING
  92. DATA = {
  93. # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
  94. 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
  95. 0xA0, 0xCE, 0x65, 0x0 , 0xFD, 0x9F, 0x1B, 0x95,
  96. # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
  97. 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
  98. # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
  99. 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  100. }
  101. 0x002f0000|0x00010000
  102. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
  103. ################################################################################
  104. #
  105. # FV Section
  106. #
  107. # [FV] section is used to define what components or modules are placed within a flash
  108. # device file. This section also defines order the components and modules are positioned
  109. # within the image. The [FV] section consists of define statements, set statements and
  110. # module statements.
  111. #
  112. ################################################################################
  113. [FV.FvMain]
  114. BlockSize = 0x40
  115. NumBlocks = 0 # This FV gets compressed so make it just big enough
  116. FvAlignment = 16 # FV alignment and FV attributes setting.
  117. ERASE_POLARITY = 1
  118. MEMORY_MAPPED = TRUE
  119. STICKY_WRITE = TRUE
  120. LOCK_CAP = TRUE
  121. LOCK_STATUS = TRUE
  122. WRITE_DISABLED_CAP = TRUE
  123. WRITE_ENABLED_CAP = TRUE
  124. WRITE_STATUS = TRUE
  125. WRITE_LOCK_CAP = TRUE
  126. WRITE_LOCK_STATUS = TRUE
  127. READ_DISABLED_CAP = TRUE
  128. READ_ENABLED_CAP = TRUE
  129. READ_STATUS = TRUE
  130. READ_LOCK_CAP = TRUE
  131. READ_LOCK_STATUS = TRUE
  132. INF MdeModulePkg/Core/Dxe/DxeMain.inf
  133. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  134. INF Silicon/Hisilicon/Pv660/Drivers/IoInitDxe/IoInitDxe.inf
  135. #
  136. # PI DXE Drivers producing Architectural Protocols (EFI Services)
  137. #
  138. INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
  139. INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
  140. INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
  141. INF Silicon/Hisilicon/Drivers/NorFlashDxe/NorFlashDxe.inf
  142. INF Platform/Hisilicon/D02/Drivers/SFC/SfcDxeDriver.inf
  143. INF Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf
  144. # PCI Express
  145. INF Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInitDxe.inf
  146. INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
  147. INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
  148. INF Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
  149. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
  150. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
  151. ## Sometimes we need to switch to emulated variable store for debug reason
  152. #INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
  153. INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
  154. INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
  155. INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
  156. INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
  157. INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
  158. INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
  159. #
  160. # Multiple Console IO support
  161. #
  162. INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
  163. INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
  164. INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
  165. INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
  166. INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
  167. # Simple TextIn/TextOut for UEFI Terminal
  168. # This is simpler than generic serial console and may be used for debug
  169. #INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
  170. INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
  171. INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
  172. INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
  173. #
  174. # FAT filesystem + GPT/MBR partitioning
  175. #
  176. INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
  177. INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
  178. INF FatBinPkg/EnhancedFatDxe/Fat.inf
  179. INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
  180. INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
  181. INF Silicon/Hisilicon/Drivers/SasV1Dxe/SasV1Dxe.inf
  182. INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
  183. INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
  184. INF Silicon/Hisilicon/Pv660/Drivers/SasInitDxe/SasV1Init.inf
  185. INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
  186. INF Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
  187. INF Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
  188. INF Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
  189. #
  190. #ACPI
  191. #
  192. INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
  193. INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
  194. INF RuleOverride=ACPITABLE Silicon/Hisilicon/Pv660/Pv660AcpiTables/AcpiTables.inf
  195. INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
  196. #
  197. #Network
  198. #
  199. INF Platform/Hisilicon/D02/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
  200. INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
  201. INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
  202. INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
  203. INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
  204. INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
  205. INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
  206. INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
  207. INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
  208. INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
  209. !ifdef $(FDT_ENABLE)
  210. INF Silicon/Hisilicon/Drivers/UpdateFdtDxe/UpdateFdtDxe.inf
  211. !endif #$(FDT_ENABLE)
  212. INF Silicon/Hisilicon/Pv660/Drivers/UnInstallAcpiTableDxe/UnInstallAcpiTable.inf
  213. #
  214. #Sata
  215. #
  216. INF Platform/Hisilicon/D02/Drivers/AtaAtapiPassThru/AtaAtapiPassThru.inf
  217. INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
  218. #
  219. # USB Support
  220. #
  221. INF Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf
  222. INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
  223. INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
  224. INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
  225. #
  226. # Build Shell from latest source code instead of prebuilt binary
  227. #
  228. INF ShellPkg/Application/Shell/Shell.inf
  229. #
  230. # Bds
  231. #
  232. INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
  233. INF MdeModulePkg/Universal/MemoryTest/GenericMemoryTestDxe/GenericMemoryTestDxe.inf
  234. INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
  235. INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
  236. INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
  237. [FV.FVMAIN_COMPACT]
  238. FvAlignment = 16
  239. ERASE_POLARITY = 1
  240. MEMORY_MAPPED = TRUE
  241. STICKY_WRITE = TRUE
  242. LOCK_CAP = TRUE
  243. LOCK_STATUS = TRUE
  244. WRITE_DISABLED_CAP = TRUE
  245. WRITE_ENABLED_CAP = TRUE
  246. WRITE_STATUS = TRUE
  247. WRITE_LOCK_CAP = TRUE
  248. WRITE_LOCK_STATUS = TRUE
  249. READ_DISABLED_CAP = TRUE
  250. READ_ENABLED_CAP = TRUE
  251. READ_STATUS = TRUE
  252. READ_LOCK_CAP = TRUE
  253. READ_LOCK_STATUS = TRUE
  254. INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
  255. INF MdeModulePkg/Core/Pei/PeiMain.inf
  256. INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
  257. INF Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
  258. INF Platform/Hisilicon/D02/MemoryInitPei/MemoryInitPeim.inf
  259. INF ArmPkg/Drivers/CpuPei/CpuPei.inf
  260. INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  261. INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
  262. INF Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf
  263. INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
  264. FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
  265. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
  266. SECTION FV_IMAGE = FVMAIN
  267. }
  268. }
  269. !include Silicon/Hisilicon/Hisilicon.fdf.inc