BoardFeatureD02.c 3.1 KB

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  1. /** @file
  2. *
  3. * Copyright (c) 2015, Hisilicon Limited. All rights reserved.
  4. * Copyright (c) 2015, Linaro Limited. All rights reserved.
  5. *
  6. * This program and the accompanying materials
  7. * are licensed and made available under the terms and conditions of the BSD License
  8. * which accompanies this distribution. The full text of the license may be found at
  9. * http://opensource.org/licenses/bsd-license.php
  10. *
  11. * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13. *
  14. **/
  15. #include <Uefi.h>
  16. #include <Library/DebugLib.h>
  17. #include <Library/BaseMemoryLib.h>
  18. #include <PlatformArch.h>
  19. #include <Library/OemMiscLib.h>
  20. #include <Library/SerdesLib.h>
  21. #include <Library/CpldIoLib.h>
  22. #include <Library/CpldD02.h>
  23. #include <Library/TimerLib.h>
  24. #include <Library/I2CLib.h>
  25. #include <Library/HiiLib.h>
  26. I2C_DEVICE gDS3231RtcDevice = {
  27. .Socket = 0,
  28. .Port = 7,
  29. .DeviceType = DEVICE_TYPE_SPD,
  30. .SlaveDeviceAddress = 0x68
  31. };
  32. // Set Tx output polarity. Not inverting data is default. For Phosphor660 D02 Board
  33. //if((1 == ulMacroId) && ((7 == ulDsNum)||(0 == ulDsNum)))
  34. SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[] =
  35. {
  36. {1, 7},
  37. {1, 0},
  38. {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM}
  39. };
  40. // Set Rx data polarity. Not inverting data is default. For Phosphor660 D02 Board
  41. //if((1 == ulMacroId) && ((0 == ulDsNum) || (1 == ulDsNum)))
  42. SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[] =
  43. {
  44. {1, 0},
  45. {1, 1},
  46. {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM}
  47. };
  48. SERDES_PARAM gSerdesParam = {
  49. .Hilink0Mode = EmHilink0Pcie1X8,
  50. .Hilink1Mode = EmHilink1Pcie0X8,
  51. .Hilink2Mode = EmHilink2Pcie2X8,
  52. .Hilink3Mode = EmHilink3GeX4,
  53. .Hilink4Mode = EmHilink4XgeX4,
  54. .Hilink5Mode = EmHilink5Sas1X4,
  55. };
  56. EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId)
  57. {
  58. if (ParamA == NULL) {
  59. DEBUG((DEBUG_ERROR, "[%a]:[%dL] ParamA == NULL!\n", __FUNCTION__, __LINE__));
  60. return EFI_INVALID_PARAMETER;
  61. }
  62. (VOID) CopyMem(ParamA, &gSerdesParam, sizeof(*ParamA));
  63. return EFI_SUCCESS;
  64. }
  65. VOID OemPcieResetAndOffReset(void)
  66. {
  67. WriteCpldReg(CPU0_PCIE1_RESET_REG,0x0);
  68. WriteCpldReg(CPU0_PCIE2_RESET_REG,0x0);
  69. WriteCpldReg(CPU1_PCIE1_RESET_REG,0x0);
  70. WriteCpldReg(CPU1_PCIE2_RESET_REG,0x0);
  71. MicroSecondDelay(100000);
  72. WriteCpldReg(CPU0_PCIE1_RESET_REG,0x55);
  73. WriteCpldReg(CPU0_PCIE2_RESET_REG,0x55);
  74. WriteCpldReg(CPU1_PCIE1_RESET_REG,0x55);
  75. WriteCpldReg(CPU1_PCIE2_RESET_REG,0x55);
  76. return;
  77. }
  78. EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM] = {
  79. {{STRING_TOKEN(STR_D02_DIMM_000), STRING_TOKEN(STR_D02_DIMM_001), 0xFFFF},
  80. {STRING_TOKEN(STR_D02_DIMM_010), STRING_TOKEN(STR_D02_DIMM_011), 0xFFFF}}
  81. };
  82. EFI_HII_HANDLE
  83. EFIAPI
  84. OemGetPackages (
  85. )
  86. {
  87. return HiiAddPackages (
  88. &gEfiCallerIdGuid,
  89. NULL,
  90. OemMiscLibD02Strings,
  91. NULL,
  92. NULL
  93. );
  94. }