EarlyConfigPeim.c 3.1 KB

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  1. /** @file
  2. *
  3. * Copyright (c) 2015, Hisilicon Limited. All rights reserved.
  4. * Copyright (c) 2015, Linaro Limited. All rights reserved.
  5. *
  6. * This program and the accompanying materials
  7. * are licensed and made available under the terms and conditions of the BSD License
  8. * which accompanies this distribution. The full text of the license may be found at
  9. * http://opensource.org/licenses/bsd-license.php
  10. *
  11. * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13. *
  14. **/
  15. #include <Uefi.h>
  16. #include <PiPei.h>
  17. #include <Library/DebugLib.h>
  18. #include <Library/PcdLib.h>
  19. #include <Library/IoLib.h>
  20. #include <Library/CacheMaintenanceLib.h>
  21. #include <Library/ArmLib.h>
  22. #include <PlatformArch.h>
  23. #include <Library/PlatformSysCtrlLib.h>
  24. #include <Library/OemMiscLib.h>
  25. #define TIMER_SUBCTRL_BASE PcdGet64(PcdPeriSubctrlAddress)
  26. #define ALG_BASE (0xA0000000)
  27. #define PERI_SUB_CTRL_BASE (0x80000000)
  28. #define SC_TM_CLKEN0_REG (0x2050)
  29. #define SYS_APB_IF_BASE (0x10000)
  30. #define TSENSOR_REG (0x5000)
  31. #define SC_ITS_M3_INT_MUX_SEL_REG (0x21F0)
  32. #define SC_HLLC_RESET_DREQ_REG (0xA8C)
  33. #define SC_ITS_M3_INT_MUX_SEL_VALUE (0xF)
  34. #define SC_HLLC_RESET_DREQ_VALUE (0x1f)
  35. #define TSENSOR_CONFIG_VALUE (0x1)
  36. VOID PlatformTimerStart (VOID)
  37. {
  38. // Timer0 clock enable
  39. MmioWrite32 (TIMER_SUBCTRL_BASE + SC_TM_CLKEN0_REG, 0x3);
  40. }
  41. EFI_STATUS
  42. EFIAPI
  43. EarlyConfigEntry (
  44. IN EFI_PEI_FILE_HANDLE FileHandle,
  45. IN CONST EFI_PEI_SERVICES **PeiServices
  46. )
  47. {
  48. DEBUG((EFI_D_INFO,"SMMU CONFIG........."));
  49. SmmuConfigForOS();
  50. DEBUG((EFI_D_INFO,"Done\n"));
  51. DEBUG((EFI_D_INFO,"ITS CONFIG........."));
  52. ITSCONFIG();
  53. DEBUG((EFI_D_INFO,"Done\n"));
  54. DEBUG((EFI_D_INFO,"AP CONFIG........."));
  55. MmioWrite64(FixedPcdGet64(PcdMailBoxAddress), 0x0);
  56. (void)WriteBackInvalidateDataCacheRange((VOID *) FixedPcdGet64(PcdMailBoxAddress), 8);
  57. ArmDataSynchronizationBarrier ();
  58. ArmInstructionSynchronizationBarrier ();
  59. CoreSelectBoot();
  60. DEBUG((EFI_D_INFO,"Done\n"));
  61. DEBUG((EFI_D_INFO,"MN CONFIG........."));
  62. MN_CONFIG ();
  63. DEBUG((EFI_D_INFO,"Done\n"));
  64. DEBUG((EFI_D_INFO,"RTC CONFIG........."));
  65. MmioWrite32(ALG_BASE + SC_ITS_M3_INT_MUX_SEL_REG, SC_ITS_M3_INT_MUX_SEL_VALUE);
  66. DEBUG((EFI_D_INFO,"Done\n"));
  67. DEBUG((EFI_D_INFO,"Tsensor CONFIG........."));
  68. MmioWrite32(PERI_SUB_CTRL_BASE + SYS_APB_IF_BASE + TSENSOR_REG, TSENSOR_CONFIG_VALUE);
  69. MmioWrite32(ALG_BASE + SC_HLLC_RESET_DREQ_REG, SC_HLLC_RESET_DREQ_VALUE);
  70. DEBUG((EFI_D_INFO,"Done\n"));
  71. DEBUG((EFI_D_INFO,"Timer CONFIG........."));
  72. PlatformTimerStart ();
  73. DEBUG((EFI_D_INFO,"Done\n"));
  74. return EFI_SUCCESS;
  75. }