SgiPlatform.h 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108
  1. /** @file
  2. *
  3. * Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: BSD-2-Clause-Patent
  6. *
  7. **/
  8. #ifndef __SGI_PLATFORM_H__
  9. #define __SGI_PLATFORM_H__
  10. /***********************************************************************************
  11. // Platform Memory Map
  12. ************************************************************************************/
  13. // Sub System Peripherals - UART0
  14. #define SGI_SUBSYS_UART0_BASE 0x2A400000
  15. #define SGI_SUBSYS_UART0_SZ 0x00010000
  16. // Sub System Peripherals - UART1
  17. #define SGI_SUBSYS_UART1_BASE 0x2A410000
  18. #define SGI_SUBSYS_UART1_SZ 0x00010000
  19. // Register offsets into the System Registers Block
  20. #define SGI_SYSPH_SYS_REG_FLASH 0x4C
  21. #define SGI_SYSPH_SYS_REG_FLASH_RWEN 0x1
  22. // SGI575_VERSION values
  23. #define SGI575_CONF_NUM 0x3
  24. #define SGI575_PART_NUM 0x783
  25. //RDN1E1EDGE Platform Identification values
  26. #define RD_N1E1_EDGE_PART_NUM 0x786
  27. #define RD_N1_EDGE_CONF_ID 0x1
  28. #define RD_E1_EDGE_CONF_ID 0x2
  29. // RD-V1 Platform Identification values
  30. #define RD_V1_PART_NUM 0x78A
  31. #define RD_V1_CONF_ID 0x1
  32. #define RD_V1_MC_CONF_ID 0x2
  33. // RD-N2-Cfg1 Platform Identification values
  34. #define RD_N2_CFG1_PART_NUM 0x7B6
  35. #define RD_N2_CFG1_CONF_ID 0x1
  36. // RD-N2 Platform Identification values
  37. #define RD_N2_PART_NUM 0x7B7
  38. #define RD_N2_CONF_ID 0x1
  39. #define SGI_CONFIG_MASK 0x0F
  40. #define SGI_CONFIG_SHIFT 0x1C
  41. #define SGI_PART_NUM_MASK 0xFFF
  42. #define MULTI_CHIP_MODE_DISABLED 0x0
  43. #define MULTI_CHIP_MODE_ENABLED 0x1
  44. // Remote chip address offset
  45. #define SGI_REMOTE_CHIP_MEM_OFFSET(n) \
  46. ((1ULL << FixedPcdGet64 (PcdMaxAddressBitsPerChip)) * (n))
  47. // Base address of the DRAM1 block in a remote chip
  48. #define SYSTEM_MEMORY_BASE_REMOTE(ChipId) \
  49. (SGI_REMOTE_CHIP_MEM_OFFSET (ChipId) + FixedPcdGet64 (PcdSystemMemoryBase))
  50. // Base address of the DRAM2 block in a remote chip
  51. #define DRAM_BLOCK2_BASE_REMOTE(ChipId) \
  52. (SGI_REMOTE_CHIP_MEM_OFFSET (ChipId) + FixedPcdGet64 (PcdDramBlock2Base))
  53. // ARM platform description data.
  54. typedef struct {
  55. UINTN PlatformId;
  56. UINTN ConfigId;
  57. UINTN MultiChipMode;
  58. } SGI_PLATFORM_DESCRIPTOR;
  59. // Arm SGI/RD Product IDs
  60. typedef enum {
  61. UnknownId = 0,
  62. Sgi575,
  63. RdN1Edge,
  64. RdN1EdgeX2,
  65. RdE1Edge,
  66. RdV1,
  67. RdV1Mc,
  68. RdN2,
  69. RdN2Cfg1,
  70. RdN2Cfg2,
  71. } ARM_RD_PRODUCT_ID;
  72. // Arm ProductId look-up table
  73. typedef struct {
  74. UINTN ProductId;
  75. UINTN PlatformId;
  76. UINTN ConfigId;
  77. UINTN MultiChipMode;
  78. } SGI_PRODUCT_ID_LOOKUP;
  79. /**
  80. Derermine the product ID.
  81. Determine the product ID by using the data in the Platform ID Descriptor HOB
  82. to lookup for a matching product ID.
  83. @retval Zero Failed identify platform.
  84. @retval Others ARM_RD_PRODUCT_ID of the identified platform.
  85. **/
  86. UINT8 SgiGetProductId (VOID);
  87. #endif // __SGI_PLATFORM_H__