Iort.aslc 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270
  1. /** @file
  2. Copyright (c) 2017, Linaro, Ltd. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #include <IndustryStandard/IoRemappingTable.h>
  6. #include "AcpiPlatform.h"
  7. #define FIELD_OFFSET(type, name) __builtin_offsetof(type, name)
  8. #define STYX_PCIE_SMMU_BASE 0xE0A00000
  9. #define STYX_PCIE_SMMU_SIZE 0x10000
  10. #define STYX_PCIE_SMMU_INTERRUPT 0x16d
  11. #define STYX_ETH0_SMMU_BASE 0xE0600000
  12. #define STYX_ETH0_SMMU_SIZE 0x10000
  13. #define STYX_ETH0_SMMU_INTERRUPT 0x170
  14. #define STYX_ETH1_SMMU_BASE 0xE0800000
  15. #define STYX_ETH1_SMMU_SIZE 0x10000
  16. #define STYX_ETH1_SMMU_INTERRUPT 0x16f
  17. #define STYX_SATA0_SMMU_BASE 0xE0200000
  18. #define STYX_SATA0_SMMU_SIZE 0x10000
  19. #define STYX_SATA0_SMMU_INTERRUPT 0x16c
  20. #define STYX_SATA1_SMMU_BASE 0xE0C00000
  21. #define STYX_SATA1_SMMU_SIZE 0x10000
  22. #define STYX_SATA1_SMMU_INTERRUPT 0x16b
  23. #pragma pack(1)
  24. typedef struct {
  25. EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE Node;
  26. EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT Context[1];
  27. } STYX_SMMU_NODE;
  28. typedef struct {
  29. EFI_ACPI_6_0_IO_REMAPPING_RC_NODE Node;
  30. EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping[1];
  31. } STYX_RC_NODE;
  32. typedef struct {
  33. EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE Node;
  34. CONST CHAR8 Name[11];
  35. EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping[16];
  36. } STYX_NC_NODE;
  37. typedef struct {
  38. EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort;
  39. STYX_SMMU_NODE PciSmmuNode;
  40. STYX_RC_NODE PciRcNode;
  41. STYX_SMMU_NODE Eth0SmmuNode;
  42. STYX_NC_NODE Eth0NamedNode;
  43. STYX_SMMU_NODE Eth1SmmuNode;
  44. STYX_NC_NODE Eth1NamedNode;
  45. STYX_SMMU_NODE Sata0SmmuNode;
  46. STYX_NC_NODE Sata0NamedNode;
  47. STYX_SMMU_NODE Sata1SmmuNode;
  48. STYX_NC_NODE Sata1NamedNode;
  49. STYX_NC_NODE CcpNamedNode;
  50. } STYX_IO_REMAPPING_STRUCTURE;
  51. #define __STYX_SMMU_NODE(Base, Size, Irq) \
  52. { \
  53. { \
  54. EFI_ACPI_IORT_TYPE_SMMUv1v2, \
  55. sizeof(STYX_SMMU_NODE), \
  56. 0x0, \
  57. 0x0, \
  58. 0x0, \
  59. 0x0, \
  60. }, \
  61. Base, \
  62. Size, \
  63. EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401, \
  64. EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK, \
  65. FIELD_OFFSET(EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE, \
  66. SMMU_NSgIrpt), \
  67. 0x1, \
  68. sizeof(EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE), \
  69. 0x0, \
  70. 0x0, \
  71. Irq, \
  72. EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, \
  73. 0x0, \
  74. 0x0, \
  75. }, { \
  76. { \
  77. Irq, \
  78. EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, \
  79. }, \
  80. }
  81. #define __STYX_ID_MAPPING(In, Num, Out, Ref, Flags) \
  82. { \
  83. In, \
  84. Num, \
  85. Out, \
  86. FIELD_OFFSET(STYX_IO_REMAPPING_STRUCTURE, Ref), \
  87. Flags \
  88. }
  89. #define __STYX_ID_MAPPING_SINGLE(Out, Ref) \
  90. { \
  91. 0x0, \
  92. 0x0, \
  93. Out, \
  94. FIELD_OFFSET(STYX_IO_REMAPPING_STRUCTURE, Ref), \
  95. EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE \
  96. }
  97. #define __STYX_NAMED_COMPONENT_NODE(Name, Num) \
  98. { \
  99. { \
  100. EFI_ACPI_IORT_TYPE_NAMED_COMP, \
  101. sizeof(STYX_NC_NODE), \
  102. 0x0, \
  103. 0x0, \
  104. Num, \
  105. FIELD_OFFSET(STYX_NC_NODE, RcIdMapping), \
  106. }, \
  107. 0x0, \
  108. EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, \
  109. 0x0, \
  110. 0x0, \
  111. EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM | \
  112. EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS, \
  113. 40, \
  114. }, \
  115. Name
  116. STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = {
  117. {
  118. AMD_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE,
  119. STYX_IO_REMAPPING_STRUCTURE,
  120. EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00),
  121. 11, // NumNodes
  122. sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset
  123. 0 // Reserved
  124. }, {
  125. // PciSmmuNode
  126. __STYX_SMMU_NODE(STYX_PCIE_SMMU_BASE,
  127. STYX_PCIE_SMMU_SIZE,
  128. STYX_PCIE_SMMU_INTERRUPT)
  129. }, {
  130. // PciRcNode
  131. {
  132. {
  133. EFI_ACPI_IORT_TYPE_ROOT_COMPLEX, // Type
  134. sizeof(STYX_RC_NODE), // Length
  135. 0x0, // Revision
  136. 0x0, // Reserved
  137. 0x1, // NumIdMappings
  138. FIELD_OFFSET(STYX_RC_NODE, RcIdMapping), // IdReference
  139. },
  140. EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, // CacheCoherent
  141. 0x0, // AllocationHints
  142. 0x0, // Reserved
  143. EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM |
  144. EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS, // MemoryAccessFlags
  145. EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED, // AtsAttribute
  146. 0x0, // PciSegmentNumber
  147. }, {
  148. __STYX_ID_MAPPING(0x0, 0xffff, 0x0, PciSmmuNode, 0x0),
  149. }
  150. }, {
  151. // Eth0SmmuNode
  152. __STYX_SMMU_NODE(STYX_ETH0_SMMU_BASE,
  153. STYX_ETH0_SMMU_SIZE,
  154. STYX_ETH0_SMMU_INTERRUPT)
  155. }, {
  156. // Eth0NamedNode
  157. __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH0", 16),
  158. {
  159. __STYX_ID_MAPPING_SINGLE(0x00, Eth0SmmuNode),
  160. __STYX_ID_MAPPING_SINGLE(0x01, Eth0SmmuNode),
  161. __STYX_ID_MAPPING_SINGLE(0x02, Eth0SmmuNode),
  162. __STYX_ID_MAPPING_SINGLE(0x03, Eth0SmmuNode),
  163. __STYX_ID_MAPPING_SINGLE(0x04, Eth0SmmuNode),
  164. __STYX_ID_MAPPING_SINGLE(0x05, Eth0SmmuNode),
  165. __STYX_ID_MAPPING_SINGLE(0x06, Eth0SmmuNode),
  166. __STYX_ID_MAPPING_SINGLE(0x07, Eth0SmmuNode),
  167. __STYX_ID_MAPPING_SINGLE(0x10, Eth0SmmuNode),
  168. __STYX_ID_MAPPING_SINGLE(0x11, Eth0SmmuNode),
  169. __STYX_ID_MAPPING_SINGLE(0x12, Eth0SmmuNode),
  170. __STYX_ID_MAPPING_SINGLE(0x13, Eth0SmmuNode),
  171. __STYX_ID_MAPPING_SINGLE(0x14, Eth0SmmuNode),
  172. __STYX_ID_MAPPING_SINGLE(0x15, Eth0SmmuNode),
  173. __STYX_ID_MAPPING_SINGLE(0x16, Eth0SmmuNode),
  174. __STYX_ID_MAPPING_SINGLE(0x17, Eth0SmmuNode),
  175. }
  176. }, {
  177. // Eth1SmmuNode
  178. __STYX_SMMU_NODE(STYX_ETH1_SMMU_BASE,
  179. STYX_ETH1_SMMU_SIZE,
  180. STYX_ETH1_SMMU_INTERRUPT)
  181. }, {
  182. // Eth1NamedNode
  183. __STYX_NAMED_COMPONENT_NODE("\\_SB_.ETH1", 16),
  184. {
  185. __STYX_ID_MAPPING_SINGLE(0x00, Eth1SmmuNode),
  186. __STYX_ID_MAPPING_SINGLE(0x01, Eth1SmmuNode),
  187. __STYX_ID_MAPPING_SINGLE(0x02, Eth1SmmuNode),
  188. __STYX_ID_MAPPING_SINGLE(0x03, Eth1SmmuNode),
  189. __STYX_ID_MAPPING_SINGLE(0x04, Eth1SmmuNode),
  190. __STYX_ID_MAPPING_SINGLE(0x05, Eth1SmmuNode),
  191. __STYX_ID_MAPPING_SINGLE(0x06, Eth1SmmuNode),
  192. __STYX_ID_MAPPING_SINGLE(0x07, Eth1SmmuNode),
  193. __STYX_ID_MAPPING_SINGLE(0x10, Eth1SmmuNode),
  194. __STYX_ID_MAPPING_SINGLE(0x11, Eth1SmmuNode),
  195. __STYX_ID_MAPPING_SINGLE(0x12, Eth1SmmuNode),
  196. __STYX_ID_MAPPING_SINGLE(0x13, Eth1SmmuNode),
  197. __STYX_ID_MAPPING_SINGLE(0x14, Eth1SmmuNode),
  198. __STYX_ID_MAPPING_SINGLE(0x15, Eth1SmmuNode),
  199. __STYX_ID_MAPPING_SINGLE(0x16, Eth1SmmuNode),
  200. __STYX_ID_MAPPING_SINGLE(0x17, Eth1SmmuNode),
  201. }
  202. }, {
  203. // Sata0SmmuNode
  204. __STYX_SMMU_NODE(STYX_SATA0_SMMU_BASE,
  205. STYX_SATA0_SMMU_SIZE,
  206. STYX_SATA0_SMMU_INTERRUPT)
  207. }, {
  208. // Sata0NamedNode
  209. __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC0", 9),
  210. {
  211. __STYX_ID_MAPPING_SINGLE(0x00, Sata0SmmuNode),
  212. __STYX_ID_MAPPING_SINGLE(0x01, Sata0SmmuNode),
  213. __STYX_ID_MAPPING_SINGLE(0x0A, Sata0SmmuNode),
  214. __STYX_ID_MAPPING_SINGLE(0x0B, Sata0SmmuNode),
  215. __STYX_ID_MAPPING_SINGLE(0x0E, Sata0SmmuNode),
  216. __STYX_ID_MAPPING_SINGLE(0x0F, Sata0SmmuNode),
  217. __STYX_ID_MAPPING_SINGLE(0x10, Sata0SmmuNode),
  218. __STYX_ID_MAPPING_SINGLE(0x1A, Sata0SmmuNode),
  219. __STYX_ID_MAPPING_SINGLE(0x1E, Sata0SmmuNode),
  220. }
  221. }, {
  222. // Sata1SmmuNode
  223. __STYX_SMMU_NODE(STYX_SATA1_SMMU_BASE,
  224. STYX_SATA1_SMMU_SIZE,
  225. STYX_SATA1_SMMU_INTERRUPT)
  226. }, {
  227. // Sata1NamedNode
  228. __STYX_NAMED_COMPONENT_NODE("\\_SB_.AHC1", 3),
  229. {
  230. __STYX_ID_MAPPING_SINGLE(0x0E, Sata1SmmuNode),
  231. __STYX_ID_MAPPING_SINGLE(0x0F, Sata1SmmuNode),
  232. __STYX_ID_MAPPING_SINGLE(0x1E, Sata1SmmuNode),
  233. }
  234. }, {
  235. // CcpNamedNode
  236. __STYX_NAMED_COMPONENT_NODE("\\_SB_.CCP0", 4),
  237. {
  238. __STYX_ID_MAPPING_SINGLE(0x00, Sata1SmmuNode),
  239. __STYX_ID_MAPPING_SINGLE(0x02, Sata1SmmuNode),
  240. __STYX_ID_MAPPING_SINGLE(0x40, Sata1SmmuNode),
  241. __STYX_ID_MAPPING_SINGLE(0x42, Sata1SmmuNode),
  242. }
  243. }
  244. };
  245. #pragma pack()
  246. VOID* CONST ReferenceAcpiTable = &AcpiIort;