PlatformHooks.c 4.9 KB

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  1. /** @file
  2. Platform Hooks file
  3. @copyright
  4. Copyright 1999 - 2021 Intel Corporation. <BR>
  5. SPDX-License-Identifier: BSD-2-Clause-Patent
  6. **/
  7. #include <Base.h>
  8. #include <Library/IoLib.h>
  9. #include <Library/PciLib.h>
  10. #include <Library/BaseLib.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/BaseMemoryLib.h>
  13. #include <Include/SioRegs.h>
  14. UINT8
  15. IsSimPlatform (VOID)
  16. {
  17. return 0;
  18. }
  19. /**
  20. Read Aspeed AHB register.
  21. @param RegIndex: register index of Aspeed.
  22. @retval value of register.
  23. **/
  24. UINT32
  25. ReadAHBDword (
  26. UINT32 RegIndex
  27. )
  28. {
  29. UINT8 bValue;
  30. UINT32 rdValue = 0;
  31. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, REG_LOGICAL_DEVICE);
  32. IoWrite8 (0xED, 0);//short delay.
  33. IoWrite8 (ASPEED2500_SIO_DATA_PORT, ASPEED2500_SIO_SMI);
  34. IoWrite8 (0xED, 0);//short delay.
  35. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0x30);
  36. IoWrite8 (0xED, 0);//short delay.
  37. IoWrite8 (ASPEED2500_SIO_DATA_PORT, 1);
  38. IoWrite8 (0xED, 0);//short delay.
  39. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xf8);
  40. bValue = IoRead8(ASPEED2500_SIO_DATA_PORT);
  41. bValue &= 0xfc;
  42. bValue |= 2; // 4 byte window.
  43. IoWrite8 (ASPEED2500_SIO_DATA_PORT, bValue);
  44. IoWrite8 (0xED, 0);//short delay.
  45. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xf0);
  46. IoWrite8 (0xED, 0);//short delay.
  47. IoWrite8 (ASPEED2500_SIO_DATA_PORT, (UINT8)((RegIndex >> 24)& 0xff));
  48. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xf1);
  49. IoWrite8 (0xED, 0);//short delay.
  50. IoWrite8 (ASPEED2500_SIO_DATA_PORT, (UINT8)((RegIndex >> 16)& 0xff));
  51. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xf2);
  52. IoWrite8 (0xED, 0);//short delay.
  53. IoWrite8 (ASPEED2500_SIO_DATA_PORT, (UINT8)((RegIndex >> 8) & 0xff));
  54. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xf3);
  55. IoWrite8 (0xED, 0);//short delay.
  56. IoWrite8 (ASPEED2500_SIO_DATA_PORT, (UINT8)((RegIndex )& 0xff));
  57. // trigger read
  58. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xfe);
  59. IoRead8 (ASPEED2500_SIO_DATA_PORT);
  60. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xf4);
  61. rdValue += IoRead8 (ASPEED2500_SIO_DATA_PORT);
  62. rdValue <<= 8;
  63. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xf5);
  64. rdValue += IoRead8 (ASPEED2500_SIO_DATA_PORT);
  65. rdValue <<= 8;
  66. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xf6);
  67. rdValue += IoRead8 (ASPEED2500_SIO_DATA_PORT);
  68. rdValue <<= 8;
  69. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, 0xf7);
  70. rdValue += IoRead8 (ASPEED2500_SIO_DATA_PORT);
  71. return rdValue;
  72. }
  73. /**
  74. * Checks for the presence of ASPEED SIO
  75. * @return TRUE if its present. FALSE if not.
  76. */
  77. BOOLEAN
  78. IsAspeedPresent (
  79. VOID
  80. )
  81. {
  82. BOOLEAN PresenceStatus = FALSE;
  83. //
  84. //ASPEED AST2500/AST2600
  85. //
  86. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, ASPEED2500_SIO_UNLOCK);
  87. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, ASPEED2500_SIO_UNLOCK);
  88. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, REG_LOGICAL_DEVICE);
  89. IoWrite8 (ASPEED2500_SIO_DATA_PORT, ASPEED2500_SIO_UART1);
  90. if (IoRead8 (ASPEED2500_SIO_DATA_PORT) == ASPEED2500_SIO_UART1) {
  91. //
  92. // In ESPI mode, assume this SIO logic device always present.
  93. //
  94. #ifdef ESPI_ENABLE
  95. PresenceStatus = TRUE;
  96. #else
  97. //
  98. //There is a Aspeed card need to support as well. it's type is AST2500 A1 EVB.
  99. //
  100. //AST2300-A0 0x01000003
  101. //AST2300-A1 0x01010303
  102. //AST1300-A1 0x01010003
  103. //AST1050-A1 0x01010203
  104. //AST2400-A0 0x02000303
  105. //AST2400-A1 0x02010303
  106. //AST1400-A1 0x02010103
  107. //AST1250-A1 0x02010303
  108. //AST2500-A0 0x04000303
  109. //AST2510-A0 0x04000103
  110. //AST2520-A0 0x04000203
  111. //AST2530-A0 0x04000403
  112. //AST2500-A1 0x04010303
  113. //AST2510-A1 0x04010103
  114. //AST2520-A1 0x04010203
  115. //AST2530-A1 0x04010403
  116. //
  117. if ((ReadAHBDword (SCU7C) & 0xff0000ff) == 0x04000003) {
  118. PresenceStatus = TRUE;
  119. }
  120. #endif
  121. }
  122. IoWrite8 (ASPEED2500_SIO_INDEX_PORT, ASPEED2500_SIO_LOCK);
  123. return PresenceStatus;
  124. }
  125. /**
  126. * Checks for the presence of Nuvoton SIO
  127. * @return TRUE if its present. FALSE if not.
  128. */
  129. BOOLEAN
  130. IsNuvotonPresent (
  131. VOID
  132. )
  133. {
  134. BOOLEAN PresenceStatus = FALSE;
  135. //
  136. // Nuvoton NCT5104D
  137. //
  138. IoWrite8 (NCT5104D_SIO_INDEX_PORT, NCT5104D_ENTER_THE_EXTENDED_FUNCTION_MODE);
  139. IoWrite8 (NCT5104D_SIO_INDEX_PORT, NCT5104D_ENTER_THE_EXTENDED_FUNCTION_MODE);
  140. IoWrite8 (NCT5104D_SIO_INDEX_PORT, NCT5104D_CHIP_ID_REG);
  141. if (IoRead8 (NCT5104D_SIO_DATA_PORT) == NCT5104D_CHIP_ID) {
  142. PresenceStatus = TRUE;
  143. }
  144. return PresenceStatus;
  145. }
  146. /**
  147. * Checks for the presence of the following SIO:
  148. * -ASPEED AST2500
  149. * -Nuvoton NCT5104D
  150. *
  151. * @return An UINT32 with the corresponding bit set for each SIO.
  152. * -ASPEED_EXIST BIT4
  153. * -NCT5104D_EXIST BIT3
  154. * -PC8374_EXIST BIT1
  155. * -PILOTIV_EXIST BIT0
  156. */
  157. UINT32
  158. IsSioExist (
  159. VOID
  160. )
  161. {
  162. UINT32 SioExit = 0;
  163. if (IsAspeedPresent ()) {
  164. SioExit |= ASPEED_EXIST;
  165. }
  166. if (IsNuvotonPresent ()) {
  167. SioExit |= NCT5104D_EXIST;
  168. }
  169. DEBUG((DEBUG_INFO, "[SIO] Current system SIO exist bit:%x \n", SioExit));
  170. return SioExit;
  171. }