OpenBoardPkgPcd.dsc 16 KB

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  1. ## @file
  2. # PCD configuration build description file for the WhiskeylakeURvp board.
  3. #
  4. # Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
  5. #
  6. # SPDX-License-Identifier: BSD-2-Clause-Patent
  7. #
  8. ##
  9. ################################################################################
  10. #
  11. # Pcd Section - list of all PCD Entries used by this board.
  12. #
  13. ################################################################################
  14. [PcdsFixedAtBuild.common]
  15. ######################################
  16. # Key Boot Stage and FSP configuration
  17. ######################################
  18. #
  19. # Please select the Boot Stage here.
  20. # Stage 1 - enable debug (system deadloop after debug init)
  21. # Stage 2 - mem init (system deadloop after mem init)
  22. # Stage 3 - boot to shell only
  23. # Stage 4 - boot to OS
  24. # Stage 5 - boot to OS with security boot enabled
  25. #
  26. gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
  27. #
  28. # 0: FSP Wrapper is running in Dispatch mode.
  29. # 1: FSP Wrapper is running in API mode.
  30. # Note: Dispatch mode is currently NOT supported for this board.
  31. #
  32. gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|1
  33. #
  34. # FALSE: The board is not a FSP wrapper (FSP binary not used)
  35. # TRUE: The board is a FSP wrapper (FSP binary is used)
  36. #
  37. gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
  38. #
  39. # FSP Base address PCD will be updated in FDF basing on flash map.
  40. #
  41. gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0
  42. gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0
  43. gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000
  44. gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
  45. gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000
  46. gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
  47. gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000
  48. #
  49. # FSP API mode does not share stack with the boot loader,
  50. # so FSP needs more temporary memory for FSP heap + stack size.
  51. #
  52. gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x26000
  53. #
  54. # FSP API mode does not need to enlarge the boot loader stack size
  55. # since the stacks are separate.
  56. #
  57. gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000
  58. gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
  59. gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
  60. [PcdsFeatureFlag.common]
  61. ######################################
  62. # Edk2 Configuration
  63. ######################################
  64. gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst|FALSE
  65. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
  66. !if $(TARGET) == RELEASE
  67. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
  68. !else
  69. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
  70. !endif
  71. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
  72. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE
  73. gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
  74. ######################################
  75. # Silicon Configuration
  76. ######################################
  77. # Build switches
  78. gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE
  79. # CPU
  80. gSiPkgTokenSpaceGuid.PcdCflCpuEnable|TRUE
  81. gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE
  82. # SA
  83. gSiPkgTokenSpaceGuid.PcdGnaEnable|TRUE
  84. gSiPkgTokenSpaceGuid.PcdIgdEnable|TRUE
  85. gSiPkgTokenSpaceGuid.PcdIpuEnable|TRUE
  86. gSiPkgTokenSpaceGuid.PcdPegEnable|TRUE
  87. gSiPkgTokenSpaceGuid.PcdSgEnable|TRUE
  88. gSiPkgTokenSpaceGuid.PcdSaDmiEnable|TRUE
  89. gSiPkgTokenSpaceGuid.PcdSaOcEnable|TRUE
  90. gSiPkgTokenSpaceGuid.PcdVtdEnable|TRUE
  91. gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|TRUE
  92. # ME
  93. gSiPkgTokenSpaceGuid.PcdAtaEnable|TRUE
  94. gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE
  95. gSiPkgTokenSpaceGuid.PcdJhiEnable|TRUE
  96. # Others
  97. gSiPkgTokenSpaceGuid.PcdAcpiEnable|TRUE
  98. gSiPkgTokenSpaceGuid.PcdBdatEnable|TRUE
  99. gSiPkgTokenSpaceGuid.PcdCpuPowerOnConfigEnable|TRUE
  100. gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE
  101. gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE
  102. gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE
  103. gSiPkgTokenSpaceGuid.PcdPpmEnable|TRUE
  104. gSiPkgTokenSpaceGuid.PcdS3Enable|TRUE
  105. gSiPkgTokenSpaceGuid.PcdSerialIoUartEnable|TRUE
  106. gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE
  107. gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE
  108. gSiPkgTokenSpaceGuid.PcdSmbiosEnable|TRUE
  109. gSiPkgTokenSpaceGuid.PcdSmmVariableEnable|TRUE
  110. gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE
  111. gSiPkgTokenSpaceGuid.PcdUseHpetTimer|TRUE # TRUE - HPET / FALSE - 8254 timer is used.
  112. ######################################
  113. # Platform Configuration
  114. ######################################
  115. gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
  116. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
  117. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
  118. gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE
  119. gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE
  120. gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE
  121. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 1
  122. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE
  123. !endif
  124. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 2
  125. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
  126. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE
  127. !endif
  128. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 3
  129. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
  130. gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE
  131. !endif
  132. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 4
  133. gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
  134. !endif
  135. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 5
  136. gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE
  137. gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE
  138. !endif
  139. !if $(TARGET) == DEBUG
  140. gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE
  141. !else
  142. gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE
  143. !endif
  144. ######################################
  145. # Board Configuration
  146. ######################################
  147. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable|TRUE
  148. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdMultiBoardSupport|TRUE
  149. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdTbtEnable|FALSE
  150. [PcdsFixedAtBuild.common]
  151. ######################################
  152. # Edk2 Configuration
  153. ######################################
  154. !if $(TARGET) == RELEASE
  155. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
  156. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
  157. !else
  158. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
  159. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
  160. !endif
  161. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  162. gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
  163. !endif
  164. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
  165. gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
  166. gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
  167. gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
  168. gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
  169. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
  170. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  171. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140
  172. !endif
  173. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000
  174. gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|TRUE
  175. !if gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable == TRUE
  176. gEfiMdeModulePkgTokenSpaceGuid.PcdSmiHandlerProfilePropertyMask|0x1
  177. !endif
  178. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
  179. !if $(TARGET) == DEBUG
  180. gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
  181. !endif
  182. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80
  183. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x00
  184. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber|0x0
  185. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber|0x1F
  186. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset|0x44
  187. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2
  188. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress|0x1800
  189. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC
  190. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08
  191. # Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
  192. gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000
  193. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
  194. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000
  195. #
  196. # In non-FSP build (EDK2 build) or FSP API mode below PCD are FixedAtBuild
  197. # (They will be DynamicEx in FSP Dispatch mode)
  198. #
  199. ## Specifies the size of the microcode Region.
  200. # @Prompt Microcode Region size.
  201. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0
  202. ## Specifies the AP wait loop state during POST phase.
  203. # The value is defined as below.
  204. # 1: Place AP in the Hlt-Loop state.
  205. # 2: Place AP in the Mwait-Loop state.
  206. # 3: Place AP in the Run-Loop state.
  207. # @Prompt The AP wait loop state.
  208. gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2
  209. ######################################
  210. # Silicon Configuration
  211. ######################################
  212. gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
  213. ######################################
  214. # Platform Configuration
  215. ######################################
  216. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1
  217. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8
  218. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2
  219. #
  220. # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
  221. #
  222. # BIT0: If set, expresses that for all synchronous SMM entries,SMM will validate that input and output buffers lie entirely within the expected fixed memory regions.
  223. # BIT1: If set, expresses that for all synchronous SMM entries, SMM will validate that input and output pointers embedded within the fixed communication buffer only refer to address ranges \
  224. # that lie entirely within the expected fixed memory regions.
  225. # BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
  226. # BIT3-31: Reserved
  227. #
  228. gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
  229. !if $(TARGET) == RELEASE
  230. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402
  231. !else
  232. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B
  233. !endif
  234. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b
  235. !if $(TARGET) == RELEASE
  236. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70
  237. !else
  238. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0
  239. !endif
  240. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 1
  241. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  242. !endif
  243. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 2
  244. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  245. !endif
  246. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 3
  247. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  248. !endif
  249. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 4
  250. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x1F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  251. !endif
  252. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 5
  253. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  254. !endif
  255. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 6
  256. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  257. !endif
  258. [PcdsFixedAtBuild.IA32]
  259. ######################################
  260. # Edk2 Configuration
  261. ######################################
  262. gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
  263. gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
  264. gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000
  265. ######################################
  266. # Platform Configuration
  267. ######################################
  268. gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
  269. [PcdsFixedAtBuild.X64]
  270. ######################################
  271. # Edk2 Configuration
  272. ######################################
  273. # Default platform supported RFC 4646 languages: (American) English
  274. gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US"
  275. [PcdsPatchableInModule.common]
  276. ######################################
  277. # Edk2 Configuration
  278. ######################################
  279. gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0208
  280. gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
  281. ######################################
  282. # Silicon Configuration
  283. ######################################
  284. !if $(TARGET) == DEBUG
  285. gSiPkgTokenSpaceGuid.PcdSerialIoUartDebugEnable|1
  286. !endif
  287. [PcdsDynamicDefault]
  288. ######################################
  289. # Edk2 Configuration
  290. ######################################
  291. gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE
  292. gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|FALSE
  293. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0
  294. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0
  295. gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0
  296. #
  297. # Set video to native resolution as Windows 8 WHCK requirement.
  298. #
  299. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0x0
  300. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0x0
  301. gEfiSecurityPkgTokenSpaceGuid.PcdTpm2CurrentIrqNum|0x00
  302. #
  303. # FSP Base address PCD will be updated in FDF basing on flash map.
  304. #
  305. gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0
  306. # Platform will pre-allocate UPD buffer and pass it to FspWrapper
  307. # Those dummy address will be patched before FspWrapper executing
  308. gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0x0
  309. gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x0
  310. gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0
  311. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
  312. ######################################
  313. # Board Configuration
  314. ######################################
  315. # Thunderbolt Configuration
  316. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcDcSwitch|0x0
  317. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAspm|0x0
  318. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad|0x02010011
  319. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtForcepowerGpioPad|13
  320. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtGpioLevel|0x1
  321. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtHotNotify|0x1
  322. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtHotSMI|0x1
  323. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax|26
  324. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax|28
  325. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPciePMemRsvd|100
  326. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtSetClkReq|0x1
  327. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtWakeupSupport|0x0
  328. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3Tbt|0x1
  329. gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtClkReq|0x1
  330. [PcdsDynamicHii.X64.DEFAULT]
  331. ######################################
  332. # Edk2 Configuration
  333. ######################################
  334. gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
  335. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  336. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"Timeout"
  337. !else
  338. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
  339. !endif