SystemBoardCommon.c 25 KB

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  1. /** @file
  2. Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #include <Library/DebugLib.h>
  6. #include <Library/BaseMemoryLib.h>
  7. #include <Platform.h>
  8. #include <Register/PchRegsUsb.h>
  9. #include <PchLimits.h>
  10. #include <PchPolicyCommon.h>
  11. #include <IioBifurcationSlotTable.h>
  12. VOID
  13. SetBifurcations(
  14. IN OUT IIO_GLOBALS *IioGlobalData,
  15. IN IIO_BIFURCATION_ENTRY *BifurcationTable,
  16. IN UINT8 BifurcationEntries
  17. )
  18. {
  19. UINT8 Socket;
  20. UINT8 Iou;
  21. UINT8 Index;
  22. for (Index = 0; Index < BifurcationEntries ; Index++) {
  23. Socket = BifurcationTable[Index].Socket;
  24. Iou = BifurcationTable[Index].IouNumber;
  25. switch (Iou) {
  26. case Iio_Iou0:
  27. if (IioGlobalData->SetupData.ConfigIOU0[Socket]==IIO_BIFURCATE_AUTO) {
  28. IioGlobalData->SetupData.ConfigIOU0[Socket] = BifurcationTable[Index].Bifurcation;
  29. }
  30. break;
  31. case Iio_Iou1:
  32. if (IioGlobalData->SetupData.ConfigIOU1[Socket] == IIO_BIFURCATE_AUTO) {
  33. IioGlobalData->SetupData.ConfigIOU1[Socket] = BifurcationTable[Index].Bifurcation;
  34. }
  35. break;
  36. case Iio_Iou2:
  37. if (IioGlobalData->SetupData.ConfigIOU2[Socket]==IIO_BIFURCATE_AUTO) {
  38. IioGlobalData->SetupData.ConfigIOU2[Socket] = BifurcationTable[Index].Bifurcation;
  39. }
  40. break;
  41. case Iio_Mcp0:
  42. if (IioGlobalData->SetupData.ConfigMCP0[Socket] == IIO_BIFURCATE_AUTO) {
  43. IioGlobalData->SetupData.ConfigMCP0[Socket] = BifurcationTable[Index].Bifurcation;
  44. }
  45. break;
  46. case Iio_Mcp1:
  47. if (IioGlobalData->SetupData.ConfigMCP1[Socket] == IIO_BIFURCATE_AUTO) {
  48. IioGlobalData->SetupData.ConfigMCP1[Socket] = BifurcationTable[Index].Bifurcation;
  49. }
  50. break;
  51. default:
  52. DEBUG((EFI_D_ERROR, "Invalid bifurcation table: Bad Iou (%d)", Iou));
  53. ASSERT(Iou);
  54. break;
  55. }
  56. }
  57. }
  58. VOID
  59. EnableHotPlug (
  60. IN OUT IIO_GLOBALS *IioGlobalData,
  61. IN UINT8 Port,
  62. IN UINT8 VppPort,
  63. IN UINT8 VppAddress,
  64. IN UINT8 PortOwnership
  65. )
  66. {
  67. IioGlobalData->SetupData.SLOTHPCAP[Port]= ENABLE;
  68. IioGlobalData->SetupData.SLOTAIP[Port] = ENABLE; // Attention Indicator Present
  69. IioGlobalData->SetupData.SLOTPIP[Port] = ENABLE; // Power Indicator Present
  70. IioGlobalData->SetupData.SLOTMRLSP[Port]= ENABLE; // MRL Sensor Present
  71. IioGlobalData->SetupData.SLOTABP[Port] = ENABLE; // Attention Button Present
  72. IioGlobalData->SetupData.SLOTPCP[Port] = ENABLE; // Power Controlled Present
  73. if (PortOwnership == PCIEAIC_OCL_OWNERSHIP){
  74. IioGlobalData->SetupData.SLOTAIP[Port] = DISABLE; // Attention Indicator Present
  75. IioGlobalData->SetupData.SLOTPIP[Port] = DISABLE; // Power Indicator Present
  76. }
  77. if (PortOwnership == VMD_OWNERSHIP){
  78. IioGlobalData->SetupData.SLOTABP[Port] = DISABLE;
  79. IioGlobalData->SetupData.SLOTPCP[Port] = DISABLE;
  80. IioGlobalData->SetupData.SLOTMRLSP[Port]= DISABLE;
  81. }
  82. //
  83. // Set SLTCAP settings based on VMD/PCIe SSD Ownership
  84. //
  85. if ((PortOwnership == PCIEAIC_OCL_OWNERSHIP) ||
  86. (PortOwnership == VMD_OWNERSHIP)){
  87. IioGlobalData->SetupData.SLOTHPSUP[Port]= ENABLE; // HotPlug Surprise
  88. }
  89. if (VppPort!= VPP_PORT_MAX) {
  90. IioGlobalData->SetupData.VppEnable[Port]= ENABLE;
  91. IioGlobalData->SetupData.VppPort[Port]= VppPort;
  92. IioGlobalData->SetupData.VppAddress[Port] = VppAddress;
  93. } else {
  94. DEBUG((EFI_D_ERROR, "PCIE HOT Plug. Missing VPP values on slot table\n"));
  95. }
  96. }
  97. VOID
  98. ConfigSlots (
  99. IN OUT IIO_GLOBALS *IioGlobalData,
  100. IN IIO_SLOT_CONFIG_ENTRY *Slot,
  101. IN UINT8 SlotEntries
  102. )
  103. {
  104. UINT8 Index;
  105. UINT8 Port;
  106. for (Index =0; Index < SlotEntries; Index ++) {
  107. Port=Slot[Index].PortIndex;
  108. if (Slot[Index].Hidden != NOT_HIDE) {
  109. IioGlobalData->SetupData.HidePEXPMenu[Port] = HIDE;
  110. IioGlobalData->SetupData.PEXPHIDE[Port]= HIDE;
  111. }
  112. /// Check if slot is assigned.
  113. if (Slot[Index].SlotNumber!= NO_SLT_IMP){
  114. IioGlobalData->SetupData.SLOTIMP[Port]= SLT_IMP;
  115. IioGlobalData->SetupData.SLOTPSP[Port]=Slot[Index].SlotNumber;
  116. IioGlobalData->SetupData.SLOTEIP[Port]=Slot[Index].InterLockPresent;
  117. if (Slot[Index].SlotPowerLimitScale!= PWR_SCL_MAX) {
  118. IioGlobalData->SetupData.SLOTSPLS[Port] = Slot[Index].SlotPowerLimitScale;
  119. IioGlobalData->SetupData.SLOTSPLV[Port] = Slot[Index].SlotPowerLimitValue;
  120. }
  121. if (Slot[Index].HotPlugCapable != DISABLE) {
  122. EnableHotPlug(IioGlobalData, Port, Slot[Index].VppPort, Slot[Index].VppAddress, REGULAR_PCIE_OWNERSHIP);
  123. }
  124. }
  125. }
  126. }
  127. /**
  128. Verify if and Slot should be implemented based on IOUX bifurcation settings.
  129. @param IioGlobalData Pointer to Iio Globals.
  130. @param Port - Port Index
  131. @retval TRUE/FALSE to determine if an slot shoudl be implemented or not
  132. based on the IOUX bifurcation settings in case user want to do an
  133. override and VMD is enabled.
  134. **/
  135. BOOLEAN
  136. SlotImplemented(
  137. IN OUT IIO_GLOBALS *IioGlobalData,
  138. IN UINT8 Port
  139. ){
  140. UINT8 IioIndex;
  141. UINT8 PortIndex;
  142. UINT8 Stack;
  143. BOOLEAN SlotImp = FALSE;
  144. IioIndex = Port/NUMBER_PORTS_PER_SOCKET;
  145. PortIndex = (Port - (NUMBER_PORTS_PER_SOCKET * IioIndex));
  146. // Stack = (((PortIndex + 3)/4) - 1) + (IioIndex*VMD_STACK_PER_SOCKET);
  147. Stack = IioGlobalData->IioVar.IioVData.StackPerPort[IioIndex][PortIndex];
  148. DEBUG((DEBUG_INFO, "SlotImplemented:IioIndex = %x, Stack = %x, Port = %x, PortIndex =%x\n", IioIndex, Stack, Port, PortIndex));
  149. switch(Stack){
  150. case IIO_PSTACK0:
  151. if (IioGlobalData->SetupData.ConfigIOU0[IioIndex] == IIO_BIFURCATE_x4x4x4x4){
  152. SlotImp = TRUE;
  153. } else if (IioGlobalData->SetupData.ConfigIOU0[IioIndex] == IIO_BIFURCATE_x4x4xxx8){
  154. if ((PortIndex == PORT_1D_INDEX) || (PortIndex == PORT_1C_INDEX) || (PortIndex == PORT_1A_INDEX)){
  155. SlotImp = TRUE;
  156. }
  157. } else if (IioGlobalData->SetupData.ConfigIOU0[IioIndex] == IIO_BIFURCATE_xxx8x4x4){
  158. if ((PortIndex == PORT_1C_INDEX) || (PortIndex == PORT_1B_INDEX) || (PortIndex == PORT_1A_INDEX)){
  159. SlotImp = TRUE;
  160. }
  161. } else if (IioGlobalData->SetupData.ConfigIOU0[IioIndex] == IIO_BIFURCATE_xxx8xxx8){
  162. if ((PortIndex == PORT_1C_INDEX) || (PortIndex == PORT_1A_INDEX)){
  163. SlotImp = TRUE;
  164. }
  165. } else if (IioGlobalData->SetupData.ConfigIOU0[IioIndex] == IIO_BIFURCATE_xxxxxx16){
  166. if (PortIndex == PORT_1A_INDEX){
  167. SlotImp = TRUE;
  168. }
  169. }
  170. break;
  171. case IIO_PSTACK1:
  172. if (IioGlobalData->SetupData.ConfigIOU1[IioIndex] == IIO_BIFURCATE_x4x4x4x4){
  173. SlotImp = TRUE;
  174. } else if (IioGlobalData->SetupData.ConfigIOU1[IioIndex] == IIO_BIFURCATE_x4x4xxx8){
  175. if ((PortIndex == PORT_2D_INDEX) || (PortIndex == PORT_2C_INDEX) || (PortIndex == PORT_2A_INDEX)){
  176. SlotImp = TRUE;
  177. }
  178. } else if (IioGlobalData->SetupData.ConfigIOU1[IioIndex] == IIO_BIFURCATE_xxx8x4x4){
  179. if ((PortIndex == PORT_2C_INDEX) || (PortIndex == PORT_2B_INDEX) || (PortIndex == PORT_2A_INDEX)){
  180. SlotImp = TRUE;
  181. }
  182. } else if (IioGlobalData->SetupData.ConfigIOU1[IioIndex] == IIO_BIFURCATE_xxx8xxx8){
  183. if ((PortIndex == PORT_2C_INDEX) || (PortIndex == PORT_2A_INDEX)){
  184. SlotImp = TRUE;
  185. }
  186. } else if (IioGlobalData->SetupData.ConfigIOU1[IioIndex] == IIO_BIFURCATE_xxxxxx16){
  187. if (PortIndex == PORT_2A_INDEX){
  188. SlotImp = TRUE;
  189. }
  190. }
  191. break;
  192. case IIO_PSTACK2:
  193. if (IioGlobalData->SetupData.ConfigIOU2[IioIndex] == IIO_BIFURCATE_x4x4x4x4){
  194. SlotImp = TRUE;
  195. } else if (IioGlobalData->SetupData.ConfigIOU2[IioIndex] == IIO_BIFURCATE_x4x4xxx8){
  196. if ((PortIndex == PORT_3D_INDEX) || (PortIndex == PORT_3C_INDEX) || (PortIndex == PORT_3A_INDEX)){
  197. SlotImp = TRUE;
  198. }
  199. } else if (IioGlobalData->SetupData.ConfigIOU2[IioIndex] == IIO_BIFURCATE_xxx8x4x4){
  200. if ((PortIndex == PORT_3C_INDEX) || (PortIndex == PORT_3B_INDEX) || (PortIndex == PORT_3A_INDEX)){
  201. SlotImp = TRUE;
  202. }
  203. } else if (IioGlobalData->SetupData.ConfigIOU2[IioIndex] == IIO_BIFURCATE_xxx8xxx8){
  204. if ((PortIndex == PORT_3C_INDEX) || (PortIndex == PORT_3A_INDEX)){
  205. SlotImp = TRUE;
  206. }
  207. } else if (IioGlobalData->SetupData.ConfigIOU2[IioIndex] == IIO_BIFURCATE_xxxxxx16){
  208. if (PortIndex == PORT_3A_INDEX){
  209. SlotImp = TRUE;
  210. }
  211. }
  212. break;
  213. }
  214. DEBUG((DEBUG_INFO, "SlotImplemented: = %x\n", SlotImp));
  215. return SlotImp;
  216. }
  217. /**
  218. Verify if VMD is enabled and override Slot conofgiration
  219. based on the VMD settings
  220. @param IioGlobalData Pointer to Iio Globals.
  221. @param Slot - Slot configuarion settings
  222. @param SlotEntries - Number of slot entries
  223. @retval None
  224. **/
  225. VOID
  226. OverrideConfigSlots (
  227. IN OUT IIO_GLOBALS *IioGlobalData,
  228. IN IIO_SLOT_CONFIG_ENTRY *Slot,
  229. IN UINT8 SlotEntries
  230. )
  231. {
  232. UINT8 Index;
  233. UINT8 Port;
  234. UINT8 IioIndex;
  235. UINT8 VmdPort;
  236. UINT8 Stack;
  237. for (Index =0; Index < SlotEntries; Index ++) {
  238. Port = Slot[Index].PortIndex;
  239. //
  240. // Check if Slot is capable of PcieSSD Solution and override the SLOT Config values
  241. //
  242. if (Slot[Index].PcieSSDCapable){
  243. IioIndex = Port/NUMBER_PORTS_PER_SOCKET;
  244. Stack = ((((Port - (NUMBER_PORTS_PER_SOCKET * IioIndex))+ 3)/4) - 1) + (IioIndex*VMD_STACK_PER_SOCKET);
  245. DEBUG((DEBUG_INFO, "Stack = %x, Port = %x\n", Stack, Port));
  246. //
  247. // check if VMD will own Pcie Root Port
  248. //
  249. if(IioGlobalData->SetupData.VMDEnabled[Stack]){
  250. VmdPort = ((IioIndex * VMD_PORTS_PER_SOCKET) + (Port - (NUMBER_PORTS_PER_SOCKET * IioIndex))) - 1;
  251. if (IioGlobalData->SetupData.VMDPortEnable[VmdPort]){
  252. IioGlobalData->IioVar.IioOutData.PciePortOwnership[Port] = VMD_OWNERSHIP;
  253. }
  254. } else {
  255. DEBUG((DEBUG_INFO, "IioGlobalData->SetupData.PcieAICEnabled[%x] = %x\n",Stack, IioGlobalData->SetupData.PcieAICEnabled[Stack]));
  256. //
  257. // Check if Pcie AIC Card will be present on Pcie Root Port
  258. //
  259. if(IioGlobalData->SetupData.PcieAICEnabled[Stack]){
  260. //
  261. // Force to have this port enabled by default for hot-plug.
  262. //
  263. IioGlobalData->SetupData.PciePortDisable[(IioIndex * NUMBER_PORTS_PER_SOCKET) + Port] = ENABLE;
  264. IioGlobalData->IioVar.IioOutData.PciePortOwnership[Port] = PCIEAIC_OCL_OWNERSHIP;
  265. DEBUG((DEBUG_ERROR, "Port = %x, PciePortDisable = %x\n",Port,IioGlobalData->SetupData.PciePortDisable[(IioIndex * NUMBER_PORTS_PER_SOCKET) + Port]));
  266. }
  267. } // No _VMD Ownership
  268. DEBUG((DEBUG_INFO, "PciePortOwnerShip[%x] = %x\n",Port, IioGlobalData->IioVar.IioOutData.PciePortOwnership[Port]));
  269. // if PcieSSDSupport required do slot override settings accordingly
  270. if((IioGlobalData->IioVar.IioOutData.PciePortOwnership[Port] != REGULAR_PCIE_OWNERSHIP) &&
  271. (SlotImplemented(IioGlobalData, Port) == TRUE)){
  272. IioGlobalData->SetupData.SLOTIMP[Port]= SLT_IMP;
  273. IioGlobalData->SetupData.SLOTPSP[Port]= 0x50 + Port; // Just program a value for PCIEACI_OCL/VMD
  274. IioGlobalData->SetupData.SLOTEIP[Port]= DISABLE;
  275. if (Slot[Index].SlotPowerLimitScale!= PWR_SCL_MAX) {
  276. IioGlobalData->SetupData.SLOTSPLS[Port] = Slot[Index].SlotPowerLimitScale;
  277. IioGlobalData->SetupData.SLOTSPLV[Port] = Slot[Index].SlotPowerLimitValue;
  278. }
  279. DEBUG((DEBUG_INFO,"Slot[Index].PcieSSDVppPort = %x\n", Slot[Index].PcieSSDVppPort));
  280. // Enable hot-plug if slot/port supports it
  281. if (Slot[Index].PcieSSDVppPort != VPP_PORT_MAX) {
  282. DEBUG((DEBUG_INFO, "IioGlobalData->SetupData.VMDHotPlugEnable[%x] = %x\n",Stack,IioGlobalData->SetupData.VMDHotPlugEnable[Stack]));
  283. DEBUG((DEBUG_INFO, "IioGlobalData->SetupData.PcieAICHotPlugEnable[%x] = %x\n",Stack,IioGlobalData->SetupData.PcieAICHotPlugEnable[Stack]));
  284. // Check if hot-plug is enabled for VMD or PCIeAIC case.
  285. if (((IioGlobalData->IioVar.IioOutData.PciePortOwnership[Port] == VMD_OWNERSHIP) && (IioGlobalData->SetupData.VMDHotPlugEnable[Stack])) ||
  286. ((IioGlobalData->IioVar.IioOutData.PciePortOwnership[Port] == PCIEAIC_OCL_OWNERSHIP) && (IioGlobalData->SetupData.PcieAICHotPlugEnable[Stack]))) {
  287. EnableHotPlug(IioGlobalData, Port, Slot[Index].PcieSSDVppPort, Slot[Index].PcieSSDVppAddress, IioGlobalData->IioVar.IioOutData.PciePortOwnership[Port]);
  288. DEBUG((DEBUG_INFO,"Enable HotPlug Done\n"));
  289. }
  290. }
  291. //
  292. // Unhide the port in order to get configured and it will be hide later for VMDLateSetup if VMD own the Pcie Root Port
  293. //
  294. IioGlobalData->SetupData.PEXPHIDE[Port]= NOT_HIDE;
  295. }// PcieSSDSupport
  296. }// PcieSSDCapable
  297. }// Per Slot
  298. }
  299. /**
  300. Auto determine which PCIe Root port to be hidden if its
  301. lanes are assigned to its preceding root port...use the
  302. Setup option variable of ConfigIOU to determine which ports
  303. are to be hidden on each IOU for corresponding IIO
  304. @param IOUx - IOUx Index
  305. @param IioIndex - Index to Iio
  306. @param IioGlobalData Pointer to Iio Globals.
  307. @retval None
  308. **/
  309. VOID
  310. CalculatePEXPHideFromIouBif (
  311. IN UINT8 Iou,
  312. IN UINT8 IioIndex,
  313. IN OUT IIO_GLOBALS *IioGlobalData
  314. )
  315. {
  316. UINT8 *PXPHide, *HidePEXPMenu;
  317. UINT8 CurrentIOUConfigValue;
  318. UINT8 PXPOffset;
  319. PXPHide = IioGlobalData->SetupData.PEXPHIDE;
  320. HidePEXPMenu = IioGlobalData->SetupData.HidePEXPMenu;
  321. CurrentIOUConfigValue =0;
  322. PXPOffset=IioIndex * NUMBER_PORTS_PER_SOCKET;
  323. switch (Iou) {
  324. case Iio_Iou0:
  325. CurrentIOUConfigValue = IioGlobalData->SetupData.ConfigIOU0[IioIndex];
  326. PXPOffset+= PORT_1A_INDEX;
  327. break;
  328. case Iio_Iou1:
  329. CurrentIOUConfigValue = IioGlobalData->SetupData.ConfigIOU1[IioIndex];
  330. PXPOffset+= PORT_2A_INDEX;
  331. break;
  332. case Iio_Iou2:
  333. CurrentIOUConfigValue = IioGlobalData->SetupData.ConfigIOU2[IioIndex];
  334. PXPOffset+= PORT_3A_INDEX;
  335. break;
  336. case Iio_Mcp0:
  337. CurrentIOUConfigValue = IioGlobalData->SetupData.ConfigMCP0[IioIndex];
  338. PXPOffset+= PORT_4A_INDEX;
  339. break;
  340. case Iio_Mcp1:
  341. CurrentIOUConfigValue = IioGlobalData->SetupData.ConfigMCP1[IioIndex];
  342. PXPOffset += PORT_5A_INDEX;
  343. break;
  344. }
  345. switch(CurrentIOUConfigValue){
  346. case IIO_BIFURCATE_xxxxxxxx:
  347. PXPHide[PXPOffset + Iio_PortA] = HIDE; // hide A
  348. PXPHide[PXPOffset + Iio_PortB] = HIDE; // hide B
  349. PXPHide[PXPOffset + Iio_PortC] = HIDE; // hide C
  350. PXPHide[PXPOffset + Iio_PortD] = HIDE; // hide D
  351. HidePEXPMenu[PXPOffset + Iio_PortA] = HIDE; // hide the Setup menu for A
  352. HidePEXPMenu[PXPOffset + Iio_PortB] = HIDE; // hide the Setup menu for B
  353. HidePEXPMenu[PXPOffset + Iio_PortC] = HIDE; // hide the Setup menu for C
  354. HidePEXPMenu[PXPOffset + Iio_PortD] = HIDE; // hide the Setup menu for D
  355. break;
  356. case IIO_BIFURCATE_x4x4xxx8:
  357. PXPHide[PXPOffset + Iio_PortA] = NOT_HIDE; // show A
  358. PXPHide[PXPOffset + Iio_PortB] = HIDE; // hide B
  359. PXPHide[PXPOffset + Iio_PortC] = NOT_HIDE; // show C
  360. PXPHide[PXPOffset + Iio_PortD] = NOT_HIDE; // show D
  361. HidePEXPMenu[PXPOffset + Iio_PortA] = NOT_HIDE; // show the Setup menu for B
  362. HidePEXPMenu[PXPOffset + Iio_PortB] = HIDE; // hide the Setup menu for B
  363. HidePEXPMenu[PXPOffset + Iio_PortC] = NOT_HIDE; // show the Setup menu for D
  364. HidePEXPMenu[PXPOffset + Iio_PortD] = NOT_HIDE; // show the Setup menu for B
  365. break;
  366. case IIO_BIFURCATE_xxx8x4x4:
  367. PXPHide[PXPOffset + Iio_PortA] = NOT_HIDE; // show A
  368. PXPHide[PXPOffset + Iio_PortB] = NOT_HIDE; // show B
  369. PXPHide[PXPOffset + Iio_PortC] = NOT_HIDE; // show C
  370. PXPHide[PXPOffset + Iio_PortD] = HIDE; // hide port D
  371. HidePEXPMenu[PXPOffset + Iio_PortA] = NOT_HIDE; // show the Setup menu for A
  372. HidePEXPMenu[PXPOffset + Iio_PortB] = NOT_HIDE; // show the Setup menu for B
  373. HidePEXPMenu[PXPOffset + Iio_PortC] = NOT_HIDE; // show the Setup menu for C
  374. HidePEXPMenu[PXPOffset + Iio_PortD] = HIDE; // hide the Setup menu for D
  375. break;
  376. case IIO_BIFURCATE_xxx8xxx8:
  377. PXPHide[PXPOffset + Iio_PortA] = NOT_HIDE; // show A
  378. PXPHide[PXPOffset + Iio_PortB] = HIDE; // hide B
  379. PXPHide[PXPOffset + Iio_PortC] = NOT_HIDE; // show C
  380. PXPHide[PXPOffset + Iio_PortD] = HIDE; // hide D
  381. HidePEXPMenu[PXPOffset + Iio_PortA] = NOT_HIDE; // show the Setup menu for A
  382. HidePEXPMenu[PXPOffset + Iio_PortB] = HIDE; // hide the Setup menu for B
  383. HidePEXPMenu[PXPOffset + Iio_PortC] = NOT_HIDE; // show the Setup menu for C
  384. HidePEXPMenu[PXPOffset + Iio_PortD] = HIDE; // hide the Setup menu for D
  385. break;
  386. case IIO_BIFURCATE_xxxxxx16:
  387. PXPHide[PXPOffset + Iio_PortA] = NOT_HIDE; // show A
  388. PXPHide[PXPOffset + Iio_PortB] = HIDE; // hide B
  389. PXPHide[PXPOffset + Iio_PortC] = HIDE; // hide C
  390. PXPHide[PXPOffset + Iio_PortD] = HIDE; // hide D
  391. HidePEXPMenu[PXPOffset + Iio_PortA] = NOT_HIDE; // show the Setup menu for A
  392. HidePEXPMenu[PXPOffset + Iio_PortB] = HIDE; // hide the Setup menu for B
  393. HidePEXPMenu[PXPOffset + Iio_PortC] = HIDE; // hide the Setup menu for C
  394. HidePEXPMenu[PXPOffset + Iio_PortD] = HIDE; // hide the Setup menu for D
  395. break;
  396. default:
  397. PXPHide[PXPOffset + Iio_PortA] = NOT_HIDE; // show A
  398. PXPHide[PXPOffset + Iio_PortB] = NOT_HIDE; // show B
  399. PXPHide[PXPOffset + Iio_PortC] = NOT_HIDE; // show C
  400. PXPHide[PXPOffset + Iio_PortD] = NOT_HIDE; // show port D
  401. HidePEXPMenu[PXPOffset + Iio_PortA] = NOT_HIDE; // show the Setup menu for A
  402. HidePEXPMenu[PXPOffset + Iio_PortB] = NOT_HIDE; // show the Setup menu for B
  403. HidePEXPMenu[PXPOffset + Iio_PortC] = NOT_HIDE; // show the Setup menu for C
  404. HidePEXPMenu[PXPOffset + Iio_PortD] = NOT_HIDE; // show the Setup menu for D
  405. break;
  406. }
  407. //
  408. // Change PEXPHIDE setting to hide all PCIe port of a IOU if IIO_BIFURCATE_xxxxxxxx is set.
  409. // And set ConfigIOUx/ConfigMCPx to default bifucation control value
  410. // Bifurcation_Control[2:0] in IOU Bifurcation Control (PCIE_IOU_BIF_CTRL) register should be 000b ~ 100b.
  411. //
  412. if (CurrentIOUConfigValue == IIO_BIFURCATE_xxxxxxxx) {
  413. switch (Iou) {
  414. case Iio_Iou0:
  415. IioGlobalData->SetupData.ConfigIOU0[IioIndex] = IIO_BIFURCATE_x4x4x4x4;
  416. break;
  417. case Iio_Iou1:
  418. IioGlobalData->SetupData.ConfigIOU1[IioIndex] = IIO_BIFURCATE_x4x4x4x4;
  419. break;
  420. case Iio_Iou2:
  421. IioGlobalData->SetupData.ConfigIOU2[IioIndex] = IIO_BIFURCATE_x4x4x4x4;
  422. break;
  423. case Iio_Mcp0:
  424. IioGlobalData->SetupData.ConfigMCP0[IioIndex] = IIO_BIFURCATE_x4x4x4x4;
  425. break;
  426. case Iio_Mcp1:
  427. IioGlobalData->SetupData.ConfigMCP1[IioIndex] = IIO_BIFURCATE_x4x4x4x4;
  428. break;
  429. default:
  430. break;
  431. }
  432. }
  433. }
  434. VOID
  435. DumpPort(
  436. IIO_GLOBALS *IioGlobalData,
  437. UINT8 Port,
  438. UINT8 NumberOfPorts
  439. )
  440. {
  441. UINT8 Index;
  442. DEBUG((EFI_D_INFO, "IDX, Port Hide, Slot Impl, Slot Number, HotPlug, PcieSSD, VppPort, VppAddress, Interlock\n"));
  443. for (Index = Port; Index < (Port + NumberOfPorts); Index++ ) {
  444. DEBUG((EFI_D_INFO, "%3d| %2d | %2d | %3d | %3d | %3d | 0x%02x | 0x%02x | %2d \n", \
  445. Index, \
  446. IioGlobalData->SetupData.PEXPHIDE[Index], \
  447. IioGlobalData->SetupData.SLOTIMP[Index], \
  448. IioGlobalData->SetupData.SLOTPSP[Index], \
  449. IioGlobalData->SetupData.SLOTHPCAP[Index], \
  450. IioGlobalData->IioVar.IioOutData.PciePortOwnership[Index], \
  451. IioGlobalData->SetupData.VppPort[Index], \
  452. IioGlobalData->SetupData.VppAddress[Index],\
  453. IioGlobalData->SetupData.SLOTEIP[Index]));
  454. }
  455. }
  456. /// Dump iio configuration. Dump the current IIO configuration to the serial
  457. /// log.
  458. VOID
  459. DumpIioConfiguration(
  460. IN UINT8 iio,
  461. IN IIO_GLOBALS *IioGlobalData
  462. )
  463. {
  464. UINT8 Iou;
  465. UINT8 PortIndex;
  466. UINT8 Bifurcation;
  467. UINT8 IouPorts;
  468. PortIndex = iio * NUMBER_PORTS_PER_SOCKET;
  469. /// First dump the socket number;
  470. DEBUG((EFI_D_INFO, "Socket number: %d \n", iio));
  471. /// Dump DMI configuration:
  472. if ((iio == 0) && (PortIndex == 0)){
  473. DEBUG((EFI_D_INFO, "PORT 0: DMI Port\n"));
  474. } else {
  475. DEBUG((EFI_D_INFO, "PORT 0: DMI Port working as PCIE\n"));
  476. DumpPort(IioGlobalData, PortIndex, 1);
  477. }
  478. IouPorts=4;
  479. /// Dump IOU bifurcations:
  480. for (Iou = Iio_Iou0; Iou< Iio_IouMax; Iou ++) {
  481. /// Reset port index.
  482. PortIndex = iio * NUMBER_PORTS_PER_SOCKET;
  483. // Get the bifurcation
  484. switch (Iou) {
  485. case Iio_Iou0:
  486. Bifurcation = IioGlobalData->SetupData.ConfigIOU0[iio];
  487. PortIndex += PORT_1A_INDEX;
  488. DEBUG((EFI_D_INFO, "IUO0: Root Port 1, Bifurcation: %d\n", Bifurcation));
  489. break;
  490. case Iio_Iou1:
  491. Bifurcation = IioGlobalData->SetupData.ConfigIOU1[iio];
  492. PortIndex += PORT_2A_INDEX;
  493. DEBUG((EFI_D_INFO, "IUO1: Root Port 2, Bifurcation: %d\n", Bifurcation));
  494. break;
  495. case Iio_Iou2:
  496. Bifurcation = IioGlobalData->SetupData.ConfigIOU2[iio];
  497. PortIndex += PORT_3A_INDEX;
  498. DEBUG((EFI_D_INFO, "IUO2: Root Port 3, Bifurcation: %d\n", Bifurcation));
  499. break;
  500. case Iio_Mcp0:
  501. Bifurcation = IioGlobalData->SetupData.ConfigMCP0[iio];
  502. PortIndex += PORT_4A_INDEX;
  503. DEBUG((EFI_D_INFO, "MCP0, Bifurcation: %d\n", Bifurcation));
  504. break;
  505. case Iio_Mcp1:
  506. Bifurcation = IioGlobalData->SetupData.ConfigMCP1[iio];
  507. PortIndex += PORT_5A_INDEX;
  508. DEBUG((EFI_D_INFO, "MCP1, Bifurcation: %d\n", Bifurcation));
  509. break;
  510. default:
  511. DEBUG((EFI_D_INFO, "Iou no detected = %d",Iou));
  512. break;
  513. }
  514. DumpPort(IioGlobalData, PortIndex, IouPorts);
  515. }
  516. }
  517. UINT8
  518. GetUplinkPortInformationCommon (
  519. IN UINT8 IioIndex
  520. )
  521. {
  522. UINT8 UplinkPortIndex = 0xFF;
  523. if (IioIndex == 0) {
  524. UplinkPortIndex = PcdGet8(PcdOemSkuUplinkPortIndex);
  525. }
  526. return UplinkPortIndex;
  527. }
  528. /**
  529. SystemIioPortBifurcationInit - Program the UDS data structure with OEM IIO init values
  530. for SLOTs and Bifurcation.
  531. @param mSB - pointer to this protocol
  532. @param IioUds - Pointer to the IIO UDS datastructure.
  533. @retval EFI_SUCCESS
  534. **/
  535. VOID
  536. SystemIioPortBifurcationInitCommon (
  537. IIO_GLOBALS *IioGlobalData,
  538. IIO_BIFURCATION_ENTRY **BifurcationTable,
  539. UINT8 *BifurcationEntries,
  540. IIO_SLOT_CONFIG_ENTRY **SlotTable,
  541. UINT8 *SlotEntries
  542. )
  543. {
  544. UINT8 PortIndex;//, iio;
  545. /// This function outline:
  546. //// 1 Based on platform apply the default bifurcation and slot configuration.
  547. //// 2 Apply dynamic overrides based on GPIO and other configurations.
  548. //// 3 Hide unused ports due bifurcation.
  549. for (PortIndex = 0; PortIndex < MAX_SOCKET*NUMBER_PORTS_PER_SOCKET; PortIndex++) {
  550. IioGlobalData->SetupData.PEXPHIDE[PortIndex] = 0;
  551. IioGlobalData->SetupData.HidePEXPMenu[PortIndex] = 0;
  552. }
  553. *BifurcationEntries = 0;
  554. *SlotEntries = 0;
  555. *BifurcationTable = (IIO_BIFURCATION_ENTRY *)(UINTN)PcdGet64 (PcdIioBifurcationTable);
  556. *BifurcationEntries = PcdGet8 (PcdIioBifurcationTableEntries);
  557. *SlotTable = (IIO_SLOT_CONFIG_ENTRY *)(UINTN)PcdGet64 (PcdIioSlotTable);
  558. *SlotEntries = PcdGet8 (PcdIioSlotTableEntries);
  559. }
  560. VOID
  561. SystemHideIioPortsCommon(
  562. IIO_GLOBALS *IioGlobalData,
  563. UINT8 IioIndex
  564. )
  565. {
  566. CalculatePEXPHideFromIouBif(Iio_Iou0, IioIndex, IioGlobalData);
  567. CalculatePEXPHideFromIouBif(Iio_Iou1, IioIndex, IioGlobalData);
  568. CalculatePEXPHideFromIouBif(Iio_Iou2, IioIndex, IioGlobalData);
  569. CalculatePEXPHideFromIouBif(Iio_Mcp0, IioIndex, IioGlobalData);
  570. CalculatePEXPHideFromIouBif(Iio_Mcp1, IioIndex, IioGlobalData);
  571. DumpIioConfiguration(IioIndex, IioGlobalData);
  572. }