PlatformPkg.dsc 40 KB

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  1. ## @file
  2. # X64 Platform with 64-bit DXE.
  3. #
  4. # @copyright
  5. # Copyright 2008 - 2021 Intel Corporation. <BR>
  6. #
  7. # SPDX-License-Identifier: BSD-2-Clause-Patent
  8. ##
  9. ################################################################################
  10. #
  11. # Defines Section - statements that will be processed to create a Makefile.
  12. #
  13. ################################################################################
  14. [Defines]
  15. PLATFORM_NAME = $(RP_PKG)
  16. PLATFORM_GUID = D7EAF54D-C9B9-4075-89F0-71943DBCFA61
  17. PLATFORM_VERSION = 0.1
  18. DSC_SPECIFICATION = 0x00010005
  19. OUTPUT_DIRECTORY = Build/$(RP_PKG)
  20. SUPPORTED_ARCHITECTURES = IA32|X64
  21. BUILD_TARGETS = DEBUG|RELEASE
  22. SKUID_IDENTIFIER = DEFAULT
  23. VPD_TOOL_GUID = 8C3D856A-9BE6-468E-850A-24F7A8D38E08
  24. FLASH_DEFINITION = $(RP_PKG)/PlatformPkg.fdf
  25. PLATFORM_SI_PACKAGE = ClientOneSiliconPkg
  26. DEFINE PLATFORM_SI_BIN_PACKAGE = WhitleySiliconBinPkg
  27. PEI_ARCH = IA32
  28. DXE_ARCH = X64
  29. !if $(CPUTARGET) == "CPX"
  30. DEFINE FSP_BIN_PKG = CedarIslandFspBinPkg
  31. DEFINE IIO_INSTANCE = Skx
  32. !elseif $(CPUTARGET) == "ICX"
  33. DEFINE FSP_BIN_PKG = WhitleyFspBinPkg
  34. DEFINE IIO_INSTANCE = Icx
  35. !else
  36. DEFINE IIO_INSTANCE = UnknownCpu
  37. !endif
  38. #
  39. # Platform On/Off features are defined here
  40. #
  41. !include $(RP_PKG)/PlatformPkgConfig.dsc
  42. #
  43. # MRC common configuration options defined here
  44. #
  45. !include $(SILICON_PKG)/MrcCommonConfig.dsc
  46. !include $(FSP_BIN_PKG)/DynamicExPcd.dsc
  47. !include $(FSP_BIN_PKG)/DynamicExPcdFvLateSilicon.dsc
  48. !include $(RP_PKG)/DynamicExPcd.dsc
  49. !include $(RP_PKG)/Uba/UbaCommon.dsc
  50. !include $(RP_PKG)/Uba/UbaRpBoards.dsc
  51. !include $(RP_PKG)/Include/Dsc/EnablePerformanceMonitoringInfrastructure.dsc
  52. ################################################################################
  53. #
  54. # SKU Identification section - list of all SKU IDs supported by this
  55. # Platform.
  56. #
  57. ################################################################################
  58. [SkuIds]
  59. 0|DEFAULT # The entry: 0|DEFAULT is reserved and always required.
  60. [DefaultStores]
  61. 0|STANDARD
  62. 1|MANUFACTURING
  63. ################################################################################
  64. #
  65. # Pcd Section - list of all EDK II PCD Entries defined by this Platform
  66. #
  67. ################################################################################
  68. [PcdsFeatureFlag]
  69. #
  70. # MinPlatform control flags
  71. #
  72. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit |FALSE
  73. gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit |FALSE
  74. gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly |FALSE
  75. gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable |FALSE
  76. gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable |FALSE
  77. gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE
  78. gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable |FALSE
  79. # don't degrade 64bit MMIO space to 32-bit
  80. gEfiMdeModulePkgTokenSpaceGuid.PcdPciDegradeResourceForOptionRom|FALSE
  81. # Server doesn't support capsule update on Reset.
  82. gEfiMdeModulePkgTokenSpaceGuid.PcdSupportUpdateCapsuleReset|FALSE
  83. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE
  84. gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE
  85. gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport|FALSE
  86. gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE
  87. gEfiCpRcPkgTokenSpaceGuid.Reserved15|TRUE
  88. !if ($(CPUTARGET) == "ICX")
  89. gEfiCpRcPkgTokenSpaceGuid.PcdMemBootHealthFeatureSupported|FALSE
  90. !endif # $(CPUTARGET) == "ICX"
  91. gCpuPkgTokenSpaceGuid.PcdCpuSkylakeFamilyFlag|TRUE
  92. gCpuPkgTokenSpaceGuid.PcdCpuIcelakeFamilyFlag|TRUE
  93. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE
  94. gCpuPkgTokenSpaceGuid.PcdCpuSelectLfpAsBspFlag|TRUE
  95. ## Uncomment for better boot performance
  96. # gPerfOptTokenSpaceGuid.PcdPreUefiLegacyEnable|FALSE
  97. # gPerfOptTokenSpaceGuid.PcdLocalVideoEnable|FALSE
  98. gPlatformTokenSpaceGuid.PcdSupportUnsignedCapsuleImage|TRUE
  99. ## This PCD specified whether ACPI SDT protocol is installed.
  100. gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
  101. ## This PCD specifies whether FPGA routine will be active
  102. gSocketPkgFpgaGuid.PcdSktFpgaActive|TRUE
  103. !if $(CPU_SKX_ONLY_SUPPORT) == TRUE
  104. gEfiCpRcPkgTokenSpaceGuid.PerBitMargin|FALSE
  105. gEfiCpRcPkgTokenSpaceGuid.PcdSeparateCwlAdj|TRUE
  106. !endif
  107. ## This PCD specifies whether or not to enable the High Speed UART
  108. gPlatformModuleTokenSpaceGuid.PcdEnableHighSpeedUart|FALSE
  109. gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
  110. [PcdsFixedAtBuild]
  111. gEfiCpRcPkgTokenSpaceGuid.PcdRankSwitchFixOption|2
  112. ## MinPlatform Boot Stage Selector
  113. # Stage 1 - enable debug (system deadloop after debug init)
  114. # Stage 2 - mem init (system deadloop after mem init)
  115. # Stage 3 - boot to shell only
  116. # Stage 4 - boot to OS
  117. # Stage 5 - boot to OS with security boot enabled
  118. # Stage 6 - boot with advanced features enabled
  119. #
  120. gMinPlatformPkgTokenSpaceGuid.PcdBootStage|6
  121. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F # Enable asserts, prints, code, clear memory, and deadloops on asserts.
  122. gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel|0x80200047 # Built in messages: Error, MTRR, info, load, warn, init
  123. !if $(TARGET) == "DEBUG"
  124. gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 # This is set to INT3 (0x2) for Simics source level debugging
  125. !endif
  126. gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|0
  127. gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x0
  128. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000
  129. gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|TRUE
  130. gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x0
  131. gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x0
  132. gEfiMdePkgTokenSpaceGuid.PcdFSBClock|100000000
  133. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"INTEL "
  134. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x4449204C45544E49 # "INTEL ID"
  135. gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeiStackSize|0x100000
  136. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxSizeNonPopulateCapsule|0x2100000
  137. gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0302
  138. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140
  139. gCpuPkgTokenSpaceGuid.PcdCpuIEDRamSize|0x400000
  140. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
  141. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|512
  142. gCpuPkgTokenSpaceGuid.PcdPlatformType|2
  143. gCpuPkgTokenSpaceGuid.PcdPlatformCpuMaxCoreFrequency|4000
  144. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x10000
  145. #PcdCpuMicrocodePatchRegionSize = PcdFlashNvStorageMicrocodeSize - (EFI_FIRMWARE_VOLUME_HEADER. HeaderLength + sizeof (EFI_FFS_FILE_HEADER))
  146. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x1FFF70
  147. #
  148. # This controls the NEM code region cached during SEC
  149. # It usually isn't necessary to match exactly the FV layout in the FDF file.
  150. # It is a performance optimization to have it match the flash region exactly
  151. # as then no extra reads are done to load unused flash into cache.
  152. #
  153. gCpuUncoreTokenSpaceGuid.PcdFlashSecCacheRegionBase|0xFFC00000
  154. gCpuUncoreTokenSpaceGuid.PcdFlashSecCacheRegionSize|0x00400000
  155. gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0x00FE800000
  156. gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x0000200000
  157. !if ($(FSP_MODE) == 0)
  158. gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x00070000
  159. !endif
  160. gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000
  161. #
  162. # These will be initialized during build
  163. #
  164. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000
  165. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000
  166. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000
  167. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000
  168. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000
  169. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000
  170. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000
  171. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000
  172. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000
  173. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0x00000000
  174. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x00000000
  175. gCpPlatFlashTokenSpaceGuid.PcdFlashFvAcmRegionBase|0x00000000
  176. ## Specifies delay value in microseconds after sending out an INIT IPI.
  177. # @Prompt Configure delay value after send an INIT IPI
  178. gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10
  179. ## Specifies max supported number of Logical Processors.
  180. # @Prompt Configure max supported number of Logical Processorss
  181. gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x1000
  182. gPlatformTokenSpaceGuid.PcdPerfPkgPchPmBaseFunctionNumber|0x2
  183. gPlatformTokenSpaceGuid.PcdUboDev|0x08
  184. gPlatformTokenSpaceGuid.PcdUboFunc|0x02
  185. gPlatformTokenSpaceGuid.PcdUboCpuBusNo0|0xCC
  186. gCpuPkgTokenSpaceGuid.PcdCpuIEDEnabled|TRUE
  187. gPlatformTokenSpaceGuid.PcdSupportLegacyStack|FALSE
  188. ## Defines the ACPI register set base address.
  189. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  190. # @Prompt ACPI Timer IO Port Address
  191. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress | 0x0500
  192. ## Defines the PCI Bus Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  193. # @Prompt ACPI Hardware PCI Bus Number
  194. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00
  195. ## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  196. # The invalid 0xFF is as its default value. It must be configured to the real value.
  197. # @Prompt ACPI Hardware PCI Device Number
  198. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0x1F
  199. ## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  200. # The invalid 0xFF is as its default value. It must be configured to the real value.
  201. # @Prompt ACPI Hardware PCI Function Number
  202. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0x02
  203. ## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.
  204. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  205. # @Prompt ACPI Hardware PCI Register Offset
  206. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0x0044
  207. ## Defines the bit mask that must be set to enable the APIC hardware register BAR.
  208. # @Prompt ACPI Hardware PCI Bar Enable BitMask
  209. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x80
  210. ## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.
  211. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  212. # @Prompt ACPI Hardware PCI Bar Register Offset
  213. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0x0040
  214. ## Defines the offset to the 32-bit Timer Value register that resides within the ACPI BAR.
  215. # @Prompt Offset to 32-bit Timer register in ACPI BAR
  216. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset |0x0008
  217. !if $(CPUTARGET) == "ICX"
  218. #
  219. # ACPI PCD custom override
  220. #
  221. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4C544E49
  222. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|0x01000013
  223. !endif
  224. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|28
  225. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|$(MAX_SOCKET)
  226. gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
  227. # Enable DDRT scheduler debug features for power on
  228. gEfiCpRcPkgTokenSpaceGuid.PcdDdrtSchedulerDebugDefault|TRUE
  229. # Disable Fast Warm Boot for Whitley Openboard Package
  230. gEfiCpRcPkgTokenSpaceGuid.PcdMrcFastBootDefault|FALSE
  231. !if $(CPU_SKX_ONLY_SUPPORT) == FALSE
  232. gCpuUncoreTokenSpaceGuid.PcdWaSerializationEn|FALSE
  233. gEfiCpRcPkgTokenSpaceGuid.PcdMrcCmdVrefCenteringTrainingEnable|FALSE
  234. !endif
  235. gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|0x74
  236. gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x75
  237. #
  238. # PlatformInitPreMem
  239. #
  240. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x100
  241. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0xA30
  242. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x100
  243. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x100
  244. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x100
  245. gEfiCpRcPkgTokenSpaceGuid.PcdReserved15|0
  246. !include $(SILICON_PKG)/Product/Whitley/SiliconPkg10nmPcds.dsc
  247. [PcdsFixedAtBuild.IA32]
  248. !if ($(FSP_MODE) == 0)
  249. gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
  250. gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x4000000
  251. gEfiMdePkgTokenSpaceGuid.PcdSpeculationBarrierType|0
  252. !endif
  253. [PcdsFixedAtBuild.X64]
  254. # Change PcdBootManagerMenuFile to UiApp
  255. ##
  256. gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
  257. gPlatformModuleTokenSpaceGuid.PcdS3AcpiReservedMemorySize|0xC00000
  258. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable |TRUE
  259. #
  260. # AcpiPlatform
  261. #
  262. gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xA0
  263. gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xA1
  264. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|32
  265. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09
  266. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000
  267. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24
  268. gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x04
  269. gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0000
  270. gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000004A5
  271. gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000
  272. gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000
  273. gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x08
  274. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x500
  275. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0
  276. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x504
  277. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0
  278. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x550
  279. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x508
  280. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x580
  281. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0
  282. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmRestrictedMemoryAccess|FALSE
  283. gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{ 0x02, 0x01, 0x0C, 0x00, 0xD0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x1F, 0x02, 0x01, 0x0C, 0x00, 0xD0, 0x41, 0x01, 0x05, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0e, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC2, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x01, 0x01, 0x03, 0x0a, 0x14, 0x00, 0x53, 0x47, 0xC1, 0xe0, 0xbe, 0xf9, 0xd2, 0x11, 0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d, 0x7F, 0x01, 0x04, 0x00, 0x03, 0x0F, 0x0B, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x03, 0x01, 0x01, 0x7F, 0xFF, 0x04, 0x00}
  284. gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath|{ 0x02, 0x01, 0x0C, 0x00, 0xD0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x1F, 0x02, 0x01, 0x0C, 0x00, 0xD0, 0x41, 0x01, 0x05, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0e, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC2, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x01, 0x01, 0x03, 0x0a, 0x14, 0x00, 0x53, 0x47, 0xC1, 0xe0, 0xbe, 0xf9, 0xd2, 0x11, 0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d, 0x7F, 0x01, 0x04, 0x00, 0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x02, 0x7F, 0xFF, 0x04, 0x00}
  285. gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x0, 0x0, 0x1F, 0x0}
  286. gBoardModulePkgTokenSpaceGuid.PcdUart1Enable|0x01
  287. [PcdsPatchableInModule]
  288. #
  289. # These debug options are patcheable so that they can be manipulated during debug (if memory is updateable)
  290. #
  291. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 # Enable status codes for debug, progress, and errors
  292. gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000042 # Displayed messages: Error, Info, warn
  293. gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000
  294. gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0
  295. !if $(PREMEM_PAGE_ALLOC_SUPPORT) == FALSE
  296. gEfiCpRcPkgTokenSpaceGuid.PcdPeiTemporaryRamRcHeapSize|0x130000
  297. !endif
  298. [PcdsDynamicExDefault.IA32]
  299. !if ($(FSP_MODE) == 0)
  300. gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0x00000000
  301. !endif
  302. [PcdsDynamicExHii]
  303. gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|L"1GPageTable"|gEfiGenericVariableGuid|0x0|TRUE
  304. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|0 # Variable: L"Timeout"
  305. gPlatformTokenSpaceGuid.PcdPlatformMemoryCheck|L"MemoryCheck"|gPlatformTokenSpaceGuid|0x0|0
  306. gCpPlatTokenSpaceGuid.PcdUefiOptimizedBoot|L"UefiOptimizedBoot"|gCpPlatTokenSpaceGuid|0x0|TRUE
  307. gPlatformModuleTokenSpaceGuid.PcdBootState|L"BootState"|gEfiGenericVariableGuid|0x0|TRUE
  308. gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
  309. gPlatformTokenSpaceGuid.PcdBootDeviceScratchPad5Changed|L"BootDeviceScratchPad"|gEfiGenericVariableGuid|0x0|FALSE
  310. [PcdsDynamicExDefault]
  311. gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|200000
  312. gEfiSecurityPkgTokenSpaceGuid.PcdTpmPhysicalPresence|TRUE
  313. gEfiSecurityPkgTokenSpaceGuid.PcdTpmAutoDetection|TRUE
  314. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|TRUE
  315. gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
  316. gPlatformModuleTokenSpaceGuid.PcdLtConfigLockEnable|TRUE
  317. gPlatformModuleTokenSpaceGuid.PcdProcessorLtsxEnable|FALSE
  318. gCpuPkgTokenSpaceGuid.PcdCpuSmmMsrSaveStateEnable|FALSE
  319. gCpuPkgTokenSpaceGuid.PcdCpuSmmProtectedModeEnable|FALSE
  320. gCpuPkgTokenSpaceGuid.PcdCpuSmmRuntimeCtlHooks|FALSE
  321. gSiPkgTokenSpaceGuid.PcdWakeOnRTCS5|FALSE
  322. gSiPkgTokenSpaceGuid.PcdRtcWakeupTimeHour|0
  323. gSiPkgTokenSpaceGuid.PcdRtcWakeupTimeMinute|0
  324. gSiPkgTokenSpaceGuid.PcdRtcWakeupTimeSecond|0
  325. #Platform should change it to by code
  326. gSiPkgTokenSpaceGuid.PcdPchSataInitReg78Data|0xAAAA0000
  327. gSiPkgTokenSpaceGuid.PcdPchSataInitReg88Data|0xAA33AA22
  328. gEfiSecurityPkgTokenSpaceGuid.PcdUserPhysicalPresence|TRUE
  329. #
  330. # CPU features related PCDs.
  331. #
  332. gCpuPkgTokenSpaceGuid.PcdCpuEnergyPolicy
  333. gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle
  334. gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset
  335. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|TRUE
  336. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|TRUE
  337. gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport|FALSE
  338. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize|0x01
  339. ## Put fTPM guid here: e.g. { 0xf9c6a62f, 0xc60f, 0x4b44, { 0xa6, 0x29, 0xed, 0x3d, 0x40, 0xae, 0xfa, 0x5f } }
  340. ## TPM1.2 { 0x8b01e5b6, 0x4f19, 0x46e8, { 0xab, 0x93, 0x1c, 0x53, 0x67, 0x1b, 0x90, 0xcc } }
  341. ## TPM2.0Dtpm { 0x286bf25a, 0xc2c3, 0x408c, { 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17 } }
  342. #TPM2.0#
  343. gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
  344. gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|0
  345. gEfiSecurityPkgTokenSpaceGuid.PcdTpm2InitializationPolicy|1
  346. gEfiSecurityPkgTokenSpaceGuid.PcdTpm2SelfTestPolicy|0
  347. gCpuPkgTokenSpaceGuid.PcdCpuSmmUseDelayIndication|FALSE
  348. gCpuPkgTokenSpaceGuid.PcdCpuSmmUseBlockIndication|FALSE
  349. gPlatformTokenSpaceGuid.PcdOnboardVideoPciVendorId|0x102b
  350. gPlatformTokenSpaceGuid.PcdOnboardVideoPciDeviceId|0x0522
  351. gPlatformTokenSpaceGuid.PcdSetupMenuScanCode|0x000C
  352. gPlatformTokenSpaceGuid.PcdBootDeviceListScanCode|0x0011
  353. gPlatformTokenSpaceGuid.PcdBootMenuFile|{ 0xdc, 0x5b, 0xc2, 0xee, 0xf2, 0x67, 0x95, 0x4d, 0xb1, 0xd5, 0xf8, 0x1b, 0x20, 0x39, 0xd1, 0x1d }
  354. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0
  355. [PcdsDynamicExDefault.X64]
  356. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
  357. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8
  358. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1
  359. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1
  360. gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|0
  361. #
  362. # Set video to 1024x768 resolution
  363. #
  364. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1024
  365. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|768
  366. [PcdsDynamicExDefault]
  367. !if $(CPUTARGET) == "CPX"
  368. !include $(RP_PKG)/StructurePcdCpx.dsc
  369. !else
  370. !include $(RP_PKG)/StructurePcd.dsc
  371. !endif
  372. ################################################################################
  373. #
  374. # Library Class section - list of all Library Classes needed by this Platform.
  375. #
  376. ################################################################################
  377. !include MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc
  378. !include MinPlatformPkg/Include/Dsc/CorePeiLib.dsc
  379. !include MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc
  380. [LibraryClasses]
  381. #
  382. # Simics source level debugging requires the non-null version of PeCoffExtraActionLib
  383. #
  384. !if $(TARGET) == "DEBUG"
  385. PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/PeCoffExtraActionLibDebug.inf
  386. !else
  387. PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
  388. !endif
  389. #
  390. # Basic
  391. #
  392. PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
  393. SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
  394. #
  395. # Framework
  396. #
  397. S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf
  398. FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
  399. SiliconPolicyInitLib|WhitleySiliconPkg/Library/SiliconPolicyInitLibShim/SiliconPolicyInitLibShim.inf
  400. !if ($(FSP_MODE) == 0)
  401. SiliconPolicyUpdateLib|$(RP_PKG)/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLibFsp.inf
  402. !else
  403. SiliconPolicyUpdateLib|$(RP_PKG)/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.inf
  404. !endif
  405. SetupLib|WhitleySiliconPkg/Library/SetupLib/SetupLib.inf
  406. #
  407. # ToDo: Can we use BaseAcpiTimerLib from MinPlatform?
  408. #
  409. TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf
  410. MultiPlatSupportLib|$(RP_PKG)/Library/MultiPlatSupportLib/MultiPlatSupportLib.inf
  411. ReadFfsLib|$(RP_PKG)/Library/ReadFfsLib/ReadFfsLib.inf
  412. PlatformSetupVariableSyncLib|$(RP_PKG)/Library/PlatformSetupVariableSyncLibNull/PlatformSetupVariableSyncLibNull.inf
  413. PlatformVariableHookLib |$(RP_PKG)/Library/PlatformVariableHookLibNull/PlatformVariableHookLibNull.inf
  414. PlatformBootManagerLib|$(PLATFORM_PKG)/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf
  415. SerialPortLib|$(RP_PKG)/Library/SerialPortLib/SerialPortLib.inf
  416. PlatformHooksLib|$(RP_PKG)/Library/PlatformHooksLib/PlatformHooksLib.inf
  417. CmosAccessLib|BoardModulePkg/Library/CmosAccessLib/CmosAccessLib.inf
  418. PlatformCmosAccessLib|$(RP_PKG)/Library/PlatformCmosAccessLib/PlatformCmosAccessLib.inf
  419. SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf
  420. TpmCommLib|SecurityPkg/Library/TpmCommLib/TpmCommLib.inf
  421. #
  422. # MinPlatform uses port 80, we don't want to assume HW
  423. #
  424. PostCodeLib|MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.inf
  425. TcgPpVendorLib|SecurityPkg/Library/TcgPpVendorLibNull/TcgPpVendorLibNull.inf
  426. Tcg2PpVendorLib|SecurityPkg/Library/Tcg2PpVendorLibNull/Tcg2PpVendorLibNull.inf
  427. AslUpdateLib|$(PLATFORM_PKG)/Acpi/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf
  428. PciSegmentInfoLib|$(PLATFORM_PKG)/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.inf
  429. PlatformOpromPolicyLib|$(RP_PKG)/Library/PlatformOpromPolicyLibNull/PlatformOpromPolicyLibNull.inf
  430. VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf
  431. [LibraryClasses.Common.SEC, LibraryClasses.Common.PEI_CORE, LibraryClasses.Common.PEIM]
  432. !if ($(FSP_MODE) == 0)
  433. FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf
  434. FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib/PeiFspWrapperApiTestLib.inf
  435. FspWrapperPlatformLib|WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.inf
  436. FspWrapperHobProcessLib|WhitleyOpenBoardPkg/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
  437. !endif
  438. FspSwitchStackLib|IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
  439. FspCommonLib|IntelFsp2Pkg/Library/BaseFspCommonLib/BaseFspCommonLib.inf
  440. FspPlatformLib|IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf
  441. [LibraryClasses.Common.SEC]
  442. #
  443. # SEC phase
  444. #
  445. TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
  446. [LibraryClasses.Common.PEI_CORE, LibraryClasses.Common.PEIM]
  447. #
  448. # ToDo: Can we remove
  449. #
  450. CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
  451. MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
  452. PeiPlatformHookLib|$(RP_PKG)/Library/PeiPlatformHookLib/PeiPlatformHooklib.inf
  453. PlatformClocksLib|$(RP_PKG)/Library/PlatformClocksLib/Pei/PlatformClocksLib.inf
  454. TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
  455. TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/PeiTestPointLib.inf
  456. ReportFvLib|$(RP_PKG)/Library/PeiReportFvLib/PeiReportFvLib.inf
  457. [LibraryClasses.Common.PEIM]
  458. #
  459. # Library instance consumed by MinPlatformPkg PlatformInit modules.
  460. #
  461. ReportCpuHobLib|MinPlatformPkg/PlatformInit/Library/ReportCpuHobLib/ReportCpuHobLib.inf
  462. SetCacheMtrrLib|$(RP_PKG)/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
  463. [LibraryClasses.common.DXE_CORE, LibraryClasses.common.DXE_SMM_DRIVER, LibraryClasses.common.SMM_CORE, LibraryClasses.common.DXE_DRIVER, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION]
  464. DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
  465. Tcg2PhysicalPresenceLib|$(RP_PKG)/Library/Tcg2PhysicalPresenceLibNull/DxeTcg2PhysicalPresenceLib.inf
  466. TcgPhysicalPresenceLib|SecurityPkg/Library/DxeTcgPhysicalPresenceLib/DxeTcgPhysicalPresenceLib.inf
  467. BiosIdLib|BoardModulePkg/Library/BiosIdLib/DxeBiosIdLib.inf
  468. MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
  469. TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
  470. Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibDTpm/Tpm12DeviceLibDTpm.inf
  471. TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLibNull/TestPointCheckLibNull.inf
  472. TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/DxeTestPointLib.inf
  473. BoardBdsHookLib|BoardModulePkg/Library/BoardBdsHookLib/BoardBdsHookLib.inf
  474. BoardBootManagerLib|MinPlatformPkg/Bds/Library/BoardBootManagerLibNull/BoardBootManagerLibNull.inf
  475. CompressDxeLib|MinPlatformPkg/Library/CompressLib/CompressLib.inf
  476. [LibraryClasses.Common.DXE_SMM_DRIVER]
  477. SpiFlashCommonLib|$(RP_PKG)/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
  478. TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf
  479. TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/SmmTestPointLib.inf
  480. MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTableLib.inf
  481. [LibraryClasses.Common.SMM_CORE]
  482. S3BootScriptLib|MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.inf
  483. [LibraryClasses.Common]
  484. DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
  485. [Components.IA32]
  486. !include MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc
  487. MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
  488. <LibraryClasses>
  489. #
  490. # Beware of circular dependencies on PCD if you want to use another DebugLib instance.
  491. #
  492. PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
  493. NULL|$(FSP_BIN_PKG)/Library/FspPcdListLibNull/FspPcdListLibNull.inf # Include FSP DynamicEx PCD
  494. NULL|$(FSP_BIN_PKG)/Library/FspPcdListLibNull/FspPcdListLibNullFvLateSilicon.inf # Include FvLateSilicon DynamicEx PCD
  495. }
  496. $(RP_PKG)/Universal/PeiExStatusCodeRouter/ExReportStatusCodeRouterPei.inf
  497. $(RP_PKG)/Universal/PeiExStatusCodeHandler/ExStatusCodeHandlerPei.inf
  498. $(RP_PKG)/Universal/PeiInterposerToSvidMap/PeiInterposerToSvidMap.inf
  499. $(RP_PKG)/Features/Variable/PlatformVariable/Pei/PlatformVariableInitPei.inf
  500. $(RP_PKG)/Platform/Pei/PlatformInfo/PlatformInfo.inf
  501. $(PLATFORM_PKG)/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf {
  502. <LibraryClasses>
  503. TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLibNull/TestPointCheckLibNull.inf
  504. BoardInitLib|$(RP_PKG)/Library/BoardInitLib/BoardInitPreMemLib.inf
  505. }
  506. $(PLATFORM_PKG)/PlatformInit/ReportFv/ReportFvPei.inf
  507. $(PLATFORM_PKG)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem.inf{
  508. <LibraryClasses>
  509. SiliconWorkaroundLib|WhitleySiliconPkg/Library/SiliconWorkaroundLibNull/SiliconWorkaroundLibNull.inf
  510. }
  511. $(RP_PKG)/Platform/Pei/EmulationPlatformInit/EmulationPlatformInit.inf
  512. $(PLATFORM_PKG)/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf {
  513. <LibraryClasses>
  514. TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLibNull/TestPointCheckLibNull.inf
  515. BoardInitLib|$(PLATFORM_PKG)/PlatformInit/Library/BoardInitLibNull/BoardInitLibNull.inf
  516. }
  517. !if ($(FSP_MODE) == 0)
  518. IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
  519. IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
  520. $(RP_PKG)/Platform/Pei/DummyPchSpi/DummyPchSpi.inf
  521. !endif
  522. $(RP_PKG)/BiosInfo/BiosInfo.inf
  523. UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
  524. UefiCpuPkg/CpuMpPei/CpuMpPei.inf
  525. UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf {
  526. <LibraryClasses>
  527. !if $(PERFORMANCE_ENABLE) == TRUE
  528. TimerLib|UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.inf
  529. !endif
  530. }
  531. [Components.X64]
  532. !include WhitleyOpenBoardPkg/Include/Dsc/CoreDxeInclude.dsc
  533. $(RP_PKG)/Platform/Dxe/PlatformType/PlatformType.inf
  534. MinPlatformPkg/Test/TestPointDumpApp/TestPointDumpApp.inf
  535. MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf
  536. MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
  537. MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
  538. MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
  539. UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
  540. ShellPkg/Application/Shell/Shell.inf {
  541. <LibraryClasses>
  542. ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
  543. NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
  544. NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
  545. NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
  546. NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
  547. NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
  548. NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
  549. NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
  550. HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
  551. PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
  552. BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
  553. IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
  554. <PcdsFixedAtBuild>
  555. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
  556. gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
  557. gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
  558. }
  559. $(RP_PKG)/Cpu/Dxe/PlatformCpuPolicy/PlatformCpuPolicy.inf
  560. UefiCpuPkg/CpuDxe/CpuDxe.inf
  561. UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
  562. $(RP_PKG)/Features/Pci/Dxe/PciHostBridge/PciHostBridge.inf
  563. $(PLATFORM_PKG)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
  564. $(RP_PKG)/Features/Pci/Dxe/PciPlatform/PciPlatform.inf
  565. $(PLATFORM_PKG)/Acpi/AcpiTables/AcpiPlatform.inf {
  566. <LibraryClasses>
  567. BoardAcpiTableLib|$(RP_PKG)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
  568. }
  569. $(PLATFORM_PKG)/Acpi/AcpiSmm/AcpiSmm.inf {
  570. <LibraryClasses>
  571. BoardAcpiEnableLib|$(RP_PKG)/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
  572. }
  573. $(PLATFORM_PKG)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf {
  574. <LibraryClasses>
  575. BoardInitLib|$(RP_PKG)/Library/BoardInitLib/BoardInitDxeLib.inf
  576. }
  577. $(RP_PKG)/Platform/Dxe/S3NvramSave/S3NvramSave.inf {
  578. !if ($(FSP_MODE) == 0)
  579. <BuildOptions>
  580. *_*_*_CC_FLAGS = -D FSP_API_MODE
  581. !endif
  582. }
  583. $(PLATFORM_PKG)/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf
  584. $(PLATFORM_SI_BIN_PACKAGE)/CpxMicrocode/MicrocodeUpdates.inf
  585. $(PLATFORM_SI_BIN_PACKAGE)/IcxMicrocode/MicrocodeUpdates.inf
  586. MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
  587. MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
  588. BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
  589. BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.inf
  590. MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
  591. MdeModulePkg/Universal/PlatformDriOverrideDxe/PlatformDriOverrideDxe.inf
  592. MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
  593. MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.inf
  594. MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
  595. MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
  596. #
  597. # SiliconPkg code for Platform Integration are defined here
  598. #
  599. !if $(CPUTARGET) == "CPX"
  600. DEFINE CPU_CPX_SUPPORT = TRUE
  601. !else
  602. DEFINE CPU_CPX_SUPPORT = FALSE
  603. !endif
  604. [PcdsFixedAtBuild]
  605. !if ($(CPU_SKX_ONLY_SUPPORT) == TRUE)
  606. gSiPkgTokenSpaceGuid.PcdPostedCsrAccessSupported |FALSE
  607. !endif
  608. [LibraryClasses.common.DXE_DRIVER, LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION]
  609. ResetSystemLib|MdeModulePkg/Library/DxeResetSystemLib/DxeResetSystemLib.inf
  610. [LibraryClasses.common.DXE_RUNTIME_DRIVER]
  611. ResetSystemLib|MdeModulePkg/Library/RuntimeResetSystemLib/RuntimeResetSystemLib.inf
  612. ###################################################################################################
  613. #
  614. # BuildOptions Section - Define the module specific tool chain flags that should be used as
  615. # the default flags for a module. These flags are appended to any
  616. # standard flags that are defined by the build process. They can be
  617. # applied for any modules or only those modules with the specific
  618. # module style (EDK or EDKII) specified in [Components] section.
  619. #
  620. ###################################################################################################
  621. [BuildOptions.Common.EDKII]
  622. # Append build options for EDK and EDKII drivers (= is Append, == is Replace)
  623. !if $(CRB_FLAG_ENABLE) == TRUE
  624. DEFINE CRB_EDKII_BUILD_OPTIONS = -D CRB_FLAG
  625. !else
  626. DEFINE CRB_EDKII_BUILD_OPTIONS =
  627. !endif
  628. !if $(DEBUG_FLAGS_ENABLE) == TRUE
  629. DEFINE EDKII_DEBUG_BUILD_OPTIONS = -D DEBUG_CODE_BLOCK=1 -D PLATFORM_VARIABLE_ATTRIBUTES=0x3
  630. !else
  631. DEFINE EDKII_DEBUG_BUILD_OPTIONS = -D SILENT_MODE -D PLATFORM_VARIABLE_ATTRIBUTES=0x3
  632. !endif
  633. !if $(SPARING_SCRATCHPAD_ENABLE) == TRUE
  634. DEFINE SPARING_SCRATCHPAD_OPTION = -D SPARING_SCRATCHPAD_SUPPORT
  635. !else
  636. DEFINE SPARING_SCRATCHPAD_OPTIONS =
  637. !endif
  638. !if $(SCRATCHPAD_DEBUG) == TRUE
  639. DEFINE SCRATCHPAD_DEBUG_OPTION = -D SCRATCHPAD_DEBUG
  640. !else
  641. DEFINE SCRATCHPAD_DEBUG_OPTION =
  642. !endif
  643. !if $(PCH_SERVER_BIOS_ENABLE) == TRUE
  644. DEFINE PCH_BUILD_OPTION = -DPCH_SERVER_BIOS_FLAG=1
  645. !else
  646. DEFINE PCH_BUILD_OPTION =
  647. !endif
  648. !if $(SERVER_BIOS_ENABLE) == TRUE
  649. DEFINE SERVER_BUILD_OPTION = -DSERVER_BIOS_FLAG=1
  650. !else
  651. DEFINE SERVER_BUILD_OPTION =
  652. !endif
  653. DEFINE SC_PATH = -D SC_PATH="Pch/SouthClusterLbg"
  654. DEFINE ME_PATH = -D ME_PATH="Me/MeSps.4"
  655. DEFINE IE_PATH = -D IE_PATH="Ie/v1"
  656. DEFINE NVDIMM_OPTIONS =
  657. !if $(CPUTARGET) == "ICX"
  658. DEFINE CPU_TYPE_OPTIONS = -D ICX_HOST -D A0_HOST -D B0_HOST
  659. !elseif $(CPUTARGET) == "CPX"
  660. DEFINE CPU_TYPE_OPTIONS = -D SKX_HOST -D CLX_HOST -D CPX_HOST -D A0_HOST -D B0_HOST
  661. !endif
  662. DEFINE MAX_SOCKET_CORE_THREAD_OPTIONS = -D MAX_SOCKET=$(MAX_SOCKET) -D MAX_CORE=$(MAX_CORE) -D MAX_THREAD=$(MAX_THREAD)
  663. DEFINE MRC_OPTIONS = -D LRDIMM_SUPPORT -D DDRT_SUPPORT
  664. !if $(CPU_SKX_ONLY_SUPPORT) == FALSE
  665. DEFINE MAX_IMC_CH_OPTIONS = -D MAX_IMC=4 -D MAX_MC_CH=2
  666. !else
  667. DEFINE MAX_IMC_CH_OPTIONS = -D MAX_IMC=2 -D MAX_MC_CH=3
  668. !endif
  669. DEFINE MAX_SAD_RULE_OPTION = -D MAX_SAD_RULES=24 -D MAX_DRAM_CLUSTERS=1
  670. DEFINE LT_BUILD_OPTIONS = -D LT_FLAG
  671. DEFINE FSP_BUILD_OPTIONS = -D FSP_DISPATCH_MODE_ENABLE=1
  672. #
  673. # MAX_KTI_PORTS needs to be updated based on the silicon type
  674. #
  675. !if $(CPUTARGET) == "CPX"
  676. DEFINE KTI_OPTIONS = -D MAX_KTI_PORTS=6
  677. !else
  678. DEFINE KTI_OPTIONS = -D MAX_KTI_PORTS=3
  679. !endif
  680. DEFINE IIO_STACK_OPTIONS = -D MAX_IIO_STACK=6 -D MAX_LOGIC_IIO_STACK=8
  681. DEFINE PCH_BIOS_BUILD_OPTIONS = $(PCH_BUILD_OPTION) $(SC_PATH) $(SERVER_BUILD_OPTION)
  682. DEFINE EDKII_DSC_FEATURE_BUILD_OPTIONS = $(CRB_EDKII_BUILD_OPTIONS) $(EDKII_DEBUG_BUILD_OPTIONS) $(PCH_BIOS_BUILD_OPTIONS) $(PCH_PKG_OPTIONS) $(MAX_SOCKET_CORE_THREAD_OPTIONS) $(MAX_IMC_CH_OPTIONS) $(MAX_SAD_RULE_OPTION) $(KTI_OPTIONS) $(IIO_STACK_OPTIONS) $(LT_BUILD_OPTIONS) $(SECURITY_OPTIONS) $(SPARING_SCRATCHPAD_OPTION) $(SCRATCHPAD_DEBUG_OPTION) $(NVDIMM_OPTIONS) -D EFI_PCI_IOV_SUPPORT -D WHEA_SUPPORT $(CPU_TYPE_OPTIONS) -D MMCFG_BASE_ADDRESS=0x80000000 -D DISABLE_NEW_DEPRECATED_INTERFACES $(MRC_OPTIONS) $(FSP_BUILD_OPTIONS)
  683. DEFINE IE_OPTIONS = $(IE_PATH) -DIE_SUPPORT=0
  684. !if $(LINUX_GCC_BUILD) == TRUE
  685. DEFINE EDK2_LINUX_BUILD_OPTIONS = -D EDK2_CTE_BUILD
  686. !else
  687. DEFINE EDK2_LINUX_BUILD_OPTIONS =
  688. !endif
  689. DEFINE EDKII_DSC_FEATURE_BUILD_OPTIONS = $(EDKII_DSC_FEATURE_BUILD_OPTIONS) $(EDK2_LINUX_BUILD_OPTIONS) $(IE_OPTIONS)
  690. DEFINE ME_OPTIONS = -DSPS_VERSION=4 $(ME_PATH)
  691. DEFINE ASPEED_ENABLE_BUILD_OPTIONS = -D ASPEED_ENABLE -D ESPI_ENABLE
  692. DEFINE EDKII_DSC_FEATURE_BUILD_OPTIONS = $(EDKII_DSC_FEATURE_BUILD_OPTIONS) $(ME_OPTIONS) $(ASPEED_ENABLE_BUILD_OPTIONS)
  693. MSFT:*_*_*_CC_FLAGS= $(EDKII_DSC_FEATURE_BUILD_OPTIONS) /wd4819
  694. GCC:*_*_*_CC_FLAGS= $(EDKII_DSC_FEATURE_BUILD_OPTIONS)
  695. *_*_*_VFRPP_FLAGS = $(EDKII_DSC_FEATURE_BUILD_OPTIONS)
  696. *_*_*_APP_FLAGS = $(EDKII_DSC_FEATURE_BUILD_OPTIONS)
  697. *_*_*_PP_FLAGS = $(EDKII_DSC_FEATURE_BUILD_OPTIONS)
  698. *_*_*_ASLPP_FLAGS = $(EDKII_DSC_FEATURE_BUILD_OPTIONS)
  699. *_*_*_ASLCC_FLAGS = $(EDKII_DSC_FEATURE_BUILD_OPTIONS)
  700. #
  701. # Enable source level debugging for RELEASE build
  702. #
  703. !if $(TARGET) == "RELEASE"
  704. DEFINE EDKII_RELEASE_SRCDBG_ASM_BUILD_OPTIONS =
  705. DEFINE EDKII_RELEASE_SRCDBG_CC_BUILD_OPTIONS =
  706. DEFINE EDKII_RELEASE_SRCDBG_DLINK_BUILD_OPTIONS =
  707. MSFT:*_*_*_ASM_FLAGS = $(EDKII_RELEASE_SRCDBG_ASM_BUILD_OPTIONS) /Zi
  708. MSFT:*_*_*_CC_FLAGS = $(EDKII_RELEASE_SRCDBG_CC_BUILD_OPTIONS) /Z7
  709. MSFT:*_*_*_DLINK_FLAGS = $(EDKII_RELEASE_SRCDBG_DLINK_BUILD_OPTIONS) /DEBUG
  710. GCC:*_*_*_ASM_FLAGS = $(EDKII_RELEASE_SRCDBG_ASM_BUILD_OPTIONS)
  711. GCC:*_*_*_CC_FLAGS = $(EDKII_RELEASE_SRCDBG_CC_BUILD_OPTIONS)
  712. GCC:*_*_*_DLINK_FLAGS = $(EDKII_RELEASE_SRCDBG_DLINK_BUILD_OPTIONS)
  713. !endif
  714. #
  715. # Override ASL Compiler parameters in tools_def.template.
  716. #
  717. MSFT:*_*_*_ASL_PATH == $(WORKSPACE)/../FDBin/Tools/IaslCompiler/6.3/iasl.exe
  718. GCC:*_*_*_ASL_PATH == $(WORKSPACE)/../FDBin/Tools/IaslCompiler/6.3/iasl
  719. *_*_*_ASL_FLAGS == -vr -we -oi
  720. #
  721. # Override the VFR compile flags to speed the build time
  722. #
  723. *_*_*_VFR_FLAGS == -n
  724. #
  725. # add to the build options for DXE/SMM drivers to remove the log message:
  726. # !!!!!!!! InsertImageRecord - Section Alignment(0x20) is not 4K !!!!!!!!
  727. #
  728. [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER, BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]
  729. MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096
  730. [BuildOptions]
  731. GCC:*_GCC5_*_CC_FLAGS = -Wno-overflow -Wno-discarded-qualifiers -Wno-unused-variable -Wno-unused-but-set-variable -Wno-incompatible-pointer-types -mabi=ms
  732. GCC:*_GCC5_IA32_DLINK_FLAGS = -z common-page-size=0x20 -z muldefs
  733. GCC:*_GCC5_X64_DLINK_FLAGS = -z common-page-size=0x20 -z muldefs
  734. MSFT:*_*_*_CC_FLAGS = /FAsc