FirmwareUpdate.h 4.2 KB

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  1. /** @file
  2. Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #ifndef _FIRMWARE_UPDATE_H_
  6. #define _FIRMWARE_UPDATE_H_
  7. #include <Uefi.h>
  8. #include <PiDxe.h>
  9. #include <Guid/FileInfo.h>
  10. #include <Protocol/FirmwareVolumeBlock.h>
  11. #include <Protocol/LoadedImage.h>
  12. #include <Protocol/SimpleFileSystem.h>
  13. #include <Protocol/Spi.h>
  14. #include <Library/BaseLib.h>
  15. #include <Library/BaseMemoryLib.h>
  16. #include <Library/CacheMaintenanceLib.h>
  17. #include <Library/DebugLib.h>
  18. #include <Library/FileHandleLib.h>
  19. #include <Library/HiiLib.h>
  20. #include <Library/MemoryAllocationLib.h>
  21. #include <Library/PcdLib.h>
  22. #include <Library/PrintLib.h>
  23. #include <Library/ShellLib.h>
  24. #include <Library/UefiApplicationEntryPoint.h>
  25. #include <Library/UefiBootServicesTableLib.h>
  26. #include <Library/UefiLib.h>
  27. #include <Library/UefiRuntimeServicesTableLib.h>
  28. //
  29. // Function Prototypes.
  30. //
  31. STATIC
  32. EFI_STATUS
  33. ReadFileData (
  34. IN CHAR16 *FileName,
  35. OUT UINT8 **Buffer,
  36. OUT UINT32 *BufferSize
  37. );
  38. STATIC
  39. EFI_STATUS
  40. InternalEraseBlock (
  41. IN EFI_PHYSICAL_ADDRESS BaseAddress
  42. );
  43. #if 0
  44. STATIC
  45. EFI_STATUS
  46. InternalReadBlock (
  47. IN EFI_PHYSICAL_ADDRESS BaseAddress,
  48. OUT VOID *ReadBuffer
  49. );
  50. #endif
  51. STATIC
  52. EFI_STATUS
  53. InternalCompareBlock (
  54. IN EFI_PHYSICAL_ADDRESS BaseAddress,
  55. IN UINT8 *Buffer
  56. );
  57. STATIC
  58. EFI_STATUS
  59. InternalWriteBlock (
  60. IN EFI_PHYSICAL_ADDRESS BaseAddress,
  61. IN UINT8 *Buffer,
  62. IN UINT32 BufferSize
  63. );
  64. STATIC
  65. VOID
  66. PrintHelpInfo (
  67. VOID
  68. );
  69. STATIC
  70. EFI_STATUS
  71. EFIAPI
  72. SpiFlashRead (
  73. IN UINTN Address,
  74. IN OUT UINT32 *NumBytes,
  75. OUT UINT8 *Buffer
  76. );
  77. STATIC
  78. EFI_STATUS
  79. EFIAPI
  80. SpiFlashWrite (
  81. IN UINTN Address,
  82. IN OUT UINT32 *NumBytes,
  83. IN UINT8 *Buffer
  84. );
  85. STATIC
  86. EFI_STATUS
  87. EFIAPI
  88. SpiFlashBlockErase (
  89. IN UINTN Address,
  90. IN UINTN *NumBytes
  91. );
  92. STATIC
  93. EFI_STATUS
  94. EFIAPI
  95. ConvertMac (
  96. CHAR16 *Str
  97. );
  98. EFI_STATUS
  99. InitializeFVUPDATE (
  100. IN EFI_HANDLE ImageHandle,
  101. IN EFI_SYSTEM_TABLE *SystemTable
  102. );
  103. //
  104. // Flash specific definitions.
  105. // - Should we use a PCD for this information?
  106. //
  107. #define BLOCK_SIZE SIZE_4KB
  108. //
  109. // Flash region layout and update information.
  110. //
  111. typedef struct {
  112. EFI_PHYSICAL_ADDRESS Base;
  113. UINTN Size;
  114. BOOLEAN Update;
  115. } FV_REGION_INFO;
  116. //
  117. // MAC Address information.
  118. //
  119. #define MAC_ADD_STR_LEN 12
  120. #define MAC_ADD_STR_SIZE (MAC_ADD_STR_LEN + 1)
  121. #define MAC_ADD_BYTE_COUNT 6
  122. #define MAC_ADD_TMP_STR_LEN 2
  123. #define MAC_ADD_TMP_STR_SIZE (MAC_ADD_TMP_STR_LEN + 1)
  124. //
  125. // Command Line Data.
  126. //
  127. #define INPUT_STRING_LEN 255
  128. #define INPUT_STRING_SIZE (INPUT_STRING_LEN + 1)
  129. typedef struct {
  130. BOOLEAN UpdateFromFile;
  131. CHAR16 FileName[INPUT_STRING_SIZE];
  132. BOOLEAN UpdateMac;
  133. UINT8 MacValue[MAC_ADD_BYTE_COUNT];
  134. BOOLEAN FullFlashUpdate;
  135. } FV_INPUT_DATA;
  136. //
  137. // Prefix Opcode Index on the host SPI controller.
  138. //
  139. typedef enum {
  140. SPI_WREN, // Prefix Opcode 0: Write Enable.
  141. SPI_EWSR, // Prefix Opcode 1: Enable Write Status Register.
  142. } PREFIX_OPCODE_INDEX;
  143. //
  144. // Opcode Menu Index on the host SPI controller.
  145. //
  146. typedef enum {
  147. SPI_READ_ID, // Opcode 0: READ ID, Read cycle with address.
  148. SPI_READ, // Opcode 1: READ, Read cycle with address.
  149. SPI_RDSR, // Opcode 2: Read Status Register, No address.
  150. SPI_WRDI_SFDP, // Opcode 3: Write Disable or Discovery Parameters, No address.
  151. SPI_SERASE, // Opcode 4: Sector Erase (4KB), Write cycle with address.
  152. SPI_BERASE, // Opcode 5: Block Erase (32KB), Write cycle with address.
  153. SPI_PROG, // Opcode 6: Byte Program, Write cycle with address.
  154. SPI_WRSR, // Opcode 7: Write Status Register, No address.
  155. } SPI_OPCODE_INDEX;
  156. #endif