SetupVariable.h 13 KB

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  1. /** @file
  2. Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
  3. Copyright (c) 2021, American Megatrends International LLC.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #ifndef __SETUP_VARIABLE_H__
  7. #define __SETUP_VARIABLE_H__
  8. #include "UncoreCommonIncludes.h"
  9. // ---------------------------------------------------------------------------
  10. //
  11. // Driver Configuration
  12. //
  13. // ---------------------------------------------------------------------------
  14. //
  15. #define MAX_PCH_PCI_EXPRESS_ROOT_PORTS 8
  16. #define PASSWORD_MAX_SIZE 16
  17. #define SHA256_DIGEST_LENGTH 32
  18. #define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002
  19. #pragma pack(1)
  20. typedef struct {
  21. UINT8 UserPassword[SHA256_DIGEST_LENGTH];
  22. UINT8 AdminPassword[SHA256_DIGEST_LENGTH];
  23. UINT8 Access;
  24. //
  25. // Keyboard
  26. //
  27. UINT8 Numlock;
  28. UINT8 Ps2PortSwap;
  29. //
  30. // TPM
  31. //
  32. UINT8 TpmEnable;
  33. UINT8 TpmState;
  34. UINT8 MorState;
  35. //
  36. // XmlCli
  37. //
  38. UINT8 XmlCliSupport;
  39. UINT8 SkipXmlComprs;
  40. UINT8 PublishSetupPgPtr;
  41. //
  42. // Breakpoints
  43. //
  44. UINT8 ValidationBreakpointType;
  45. UINT16 bsdBreakpoint;
  46. //
  47. // Power State
  48. //
  49. UINT8 PowerState;
  50. //
  51. // Wake On Lan
  52. //
  53. UINT8 WakeOnLanS5;
  54. //
  55. // Boot from Network
  56. //
  57. UINT8 BootNetwork;
  58. //
  59. // Video
  60. //
  61. UINT8 VideoSelect;
  62. UINT8 EfiWindowsInt10Workaround;
  63. UINT8 UefiOptimizedBootToggle;
  64. //
  65. // Fan PWM Offset
  66. //
  67. UINT8 FanPwmOffset;
  68. //
  69. // PCI Minimum Secondary Bus Number
  70. //
  71. UINT8 PCIe_MultiSeg_Support;
  72. //
  73. UINT8 WakeOnLanSupport;
  74. //
  75. // Enable/disable for PCIe LOM by using GPO44/45
  76. // NOT PCH LAN
  77. //
  78. UINT8 LomDisableByGpio;
  79. UINT8 FpkPortConfig[4];
  80. UINT8 FpkPortConfigPrev[4];
  81. UINT8 FpkPortPresent[4];
  82. // RTC WAKE
  83. //
  84. UINT8 WakeOnRTCS4S5;
  85. UINT8 RTCWakeupTimeHour;
  86. UINT8 RTCWakeupTimeMinute;
  87. UINT8 RTCWakeupTimeSecond;
  88. // PCI_EXPRESS_CONFIG, ROOT PORTS
  89. //
  90. // AJW: these cross the line, but depend on Platform Info
  91. UINT8 PcieClockGating;
  92. UINT8 PcieDmiAspm;
  93. UINT8 PcieSBDE;
  94. UINT8 GbePciePortNum;
  95. UINT8 PciePortConfig1;
  96. UINT8 PciePortConfig2;
  97. UINT8 PciePortConfig3;
  98. UINT8 PciePortConfig4;
  99. UINT8 PciePortConfig5;
  100. // GBE
  101. UINT8 GbeEnabled;
  102. // PCH Stepping
  103. UINT8 PchStepping;
  104. //
  105. // XHCI Wake On USB
  106. //
  107. UINT8 XhciWakeOnUsbEnabled;
  108. //
  109. // EventLog
  110. //
  111. //
  112. // SKX_TODO: add these for RAS, may be best to find new home for them in a new setup variable and setup page
  113. //
  114. UINT8 SystemErrorEn;
  115. //Viral, and IoMca are not supported in EP. Will need to wrap in an EX flag
  116. //UINT8 ViralEn;
  117. UINT8 PoisonEn;
  118. UINT8 ViralEn;
  119. UINT8 ClearViralStatus;
  120. UINT8 CloakingEn;
  121. UINT8 UboxToPcuMcaEn;
  122. UINT8 FatalErrSpinLoopEn;
  123. UINT8 EmcaEn;
  124. UINT8 EmcaIgnOptin;
  125. UINT8 EmcaCsmiEn;
  126. UINT8 EmcaMsmiEn;
  127. UINT8 ElogCorrErrEn;
  128. UINT8 ElogMemErrEn;
  129. UINT8 ElogProcErrEn;
  130. UINT8 LmceEn;
  131. UINT8 WheaSupportEn;
  132. UINT8 WheaLogMemoryEn;
  133. UINT8 WheaLogProcEn;
  134. UINT8 WheaLogPciEn;
  135. UINT8 WheaErrorInjSupportEn;
  136. UINT8 McaBankErrInjEn;
  137. UINT8 WheaErrInjEn;
  138. UINT8 WheaPcieErrInjEn;
  139. UINT8 MeSegErrorInjEn;
  140. UINT8 PcieErrInjActionTable;
  141. UINT8 ParityCheckEn;
  142. UINT8 MemErrEn;
  143. UINT8 CorrMemErrEn;
  144. UINT32 LeakyBktHiLeakyBktLo;
  145. UINT8 SpareIntSelect;
  146. UINT8 FnvErrorEn;
  147. UINT8 FnvErrorLowPrioritySignal; // 0 - No Log, 1 - SMI, 2 - ERR0#, 3 - BOTH
  148. UINT8 FnvErrorHighPrioritySignal; // 0 - No Log, 1 - SMI, 2 - ERR0#, 3 - BOTH
  149. UINT8 Reserved_1;
  150. UINT8 Reserved_2;
  151. UINT8 Reserved_3;
  152. UINT8 IioErrorEn;
  153. UINT8 IoMcaEn;
  154. UINT8 IioErrRegistersClearEn;
  155. UINT8 IioErrorPinEn;
  156. UINT8 LerEn;
  157. UINT8 DisableMAerrorLoggingDueToLER;
  158. UINT8 IioIrpErrorEn;
  159. UINT8 IioMiscErrorEn;
  160. UINT8 IioVtdErrorEn;
  161. UINT8 IioDmaErrorEn;
  162. UINT8 IioDmiErrorEn;
  163. UINT8 IioPcieAddCorrErrorEn;
  164. UINT8 IioPcieAddUnCorrEn;
  165. UINT8 IioPcieAerSpecCompEn;
  166. UINT8 PcieErrEn;
  167. UINT8 PcieCorrErrEn;
  168. UINT8 PcieUncorrErrEn;
  169. UINT8 PcieFatalErrEn;
  170. UINT8 PcieCorErrCntr;
  171. UINT8 PcieCorErrMaskBitMap;
  172. UINT16 PcieCorErrThres;
  173. UINT8 PcieAerCorrErrEn;
  174. UINT8 PcieAerAdNfatErrEn;
  175. UINT8 PcieAerNfatErrEn;
  176. UINT8 PcieAerFatErrEn;
  177. UINT8 SerrPropEn;
  178. UINT8 PerrPropEn;
  179. UINT8 OsSigOnSerrEn;
  180. UINT8 OsSigOnPerrEn;
  181. UINT8 CaterrGpioSmiEn;
  182. // Endof RAS add
  183. //Viral, and IoMca are not supported in EP. Will need to wrap in an EX flag
  184. //UINT8 IoMcaEn;
  185. UINT8 McBankWarmBootClearError;
  186. UINT8 KTIFailoverSmiEn;
  187. UINT8 irpp0_parityError;
  188. UINT8 irpp0_qtOverflow;
  189. UINT8 irpp0_unexprsp;
  190. UINT8 irpp0_csraccunaligned;
  191. UINT8 irpp0_unceccCs1;
  192. UINT8 irpp0_unceccCs0;
  193. UINT8 irpp0_rcvdpoison;
  194. UINT8 irpp0_crreccCs1;
  195. UINT8 irpp0_crreccCs0;
  196. UINT8 PropagateSerr;
  197. UINT8 PropagatePerr;
  198. //
  199. // Boot Options
  200. //
  201. UINT8 serialDebugMsgLvl;
  202. UINT8 serialDebugTrace;
  203. UINT8 serialDebugMsgLvlTrainResults;
  204. UINT8 ResetOnMemMapChange;
  205. UINT8 ForceSetup;
  206. UINT8 BiosGuardEnabled;
  207. UINT8 BiosGuardPlatformSupported;
  208. UINT8 EnableAntiFlashWearout;
  209. UINT8 AntiFlashWearoutSupported;
  210. UINT8 RtoPopulateBGDirectory;
  211. UINT8 Use1GPageTable;
  212. //
  213. // UINT8 QuietBoot;
  214. //
  215. UINT8 FastBoot;
  216. //
  217. // Reserve Memory that is hidden from the OS.
  218. //
  219. UINT8 ReserveMem;
  220. UINT64 ReserveStartAddr;
  221. //
  222. // Reserve TAGEC Memory
  223. //
  224. UINT8 TagecMem;
  225. //Usb Configdata
  226. UINT8 UsbMassDevNum;
  227. UINT8 UsbLegacySupport;
  228. UINT8 UsbEmul6064;
  229. UINT8 UsbMassResetDelay;
  230. UINT8 UsbNonBoot;
  231. UINT8 UsbEmu1;
  232. UINT8 UsbEmu2;
  233. UINT8 UsbEmu3;
  234. UINT8 UsbEmu4;
  235. UINT8 UsbEmu5;
  236. UINT8 UsbEmu6;
  237. UINT8 UsbEmu7;
  238. UINT8 UsbEmu8;
  239. UINT8 UsbEmu9;
  240. UINT8 UsbEmu10;
  241. UINT8 UsbEmu11;
  242. UINT8 UsbEmu12;
  243. UINT8 UsbEmu13;
  244. UINT8 UsbEmu14;
  245. UINT8 UsbEmu15;
  246. UINT8 UsbEmu16;
  247. UINT8 UsbStackSupport;
  248. // Console Redirection
  249. UINT8 ConsoleRedirection;
  250. UINT8 FlowControl;
  251. UINT64 BaudRate;
  252. UINT8 TerminalType;
  253. UINT8 LegacyOsRedirection;
  254. UINT8 TerminalResolution;
  255. UINT8 DataBits;
  256. UINT8 Parity;
  257. UINT8 StopBits;
  258. #ifdef EFI_PCI_IOV_SUPPORT
  259. UINT8 SystemPageSize;
  260. UINT8 ARIEnable;
  261. UINT8 ARIForward;
  262. UINT8 SRIOVEnable;
  263. UINT8 MRIOVEnable;
  264. #endif
  265. //
  266. // RAS
  267. //
  268. //
  269. // Network setup entries - start here <><><><><>
  270. //
  271. UINT8 LegacyPxeRom;
  272. UINT8 EfiNetworkSupport;
  273. //
  274. // Network setup entries - end here <><><><><>
  275. //
  276. //
  277. // SERIALPORT BAUD RATE: Begin
  278. //
  279. UINT32 SerialBaudRate;
  280. //
  281. // SERIALPORT BAUD RATE: END
  282. //
  283. UINT8 BootAllOptions;
  284. UINT8 SetShellFirst;
  285. //
  286. // Overclocking related setup variables
  287. //
  288. UINT8 PlatformOCSupport;
  289. UINT8 FilterPll;
  290. UINT8 OverclockingSupport;
  291. UINT8 CoreMaxOcRatio;
  292. UINT8 CoreVoltageMode;
  293. UINT16 CoreVoltageOverride;
  294. UINT16 CoreVoltageOffset;
  295. UINT8 CoreVoltageOffsetPrefix;
  296. UINT16 CoreExtraTurboVoltage;
  297. //
  298. // OC related
  299. //
  300. UINT8 MemoryVoltage;
  301. UINT8 MemoryVoltageDefault;
  302. UINT8 tCL;
  303. //
  304. // CLR Related
  305. //
  306. UINT8 ClrMaxOcRatio;
  307. UINT8 ClrVoltageMode;
  308. UINT16 ClrVoltageOverride;
  309. UINT16 ClrVoltageOffset;
  310. UINT8 ClrVoltageOffsetPrefix;
  311. UINT16 ClrExtraTurboVoltage;
  312. //
  313. // Uncore Related
  314. //
  315. UINT16 UncoreVoltageOffset;
  316. UINT8 UncoreVoltageOffsetPrefix;
  317. UINT16 IoaVoltageOffset;
  318. UINT8 IoaVoltageOffsetPrefix;
  319. UINT16 IodVoltageOffset;
  320. UINT8 IodVoltageOffsetPrefix;
  321. //
  322. // SVID and FIVR Related
  323. //
  324. UINT8 SvidEnable;
  325. UINT16 SvidVoltageOverride;
  326. UINT8 FivrFaultsEnable;
  327. UINT8 FivrEfficiencyEnable;
  328. UINT8 SataInterfaceRAIDMode;
  329. UINT8 sSataInterfaceRAIDMode;
  330. UINT16 C01MemoryVoltage;
  331. UINT16 C23MemoryVoltage;
  332. UINT16 CpuVccInVoltage;
  333. UINT8 VccIoVoltage;
  334. UINT8 CloudProfile;
  335. UINT16 VariablePlatId;
  336. //XTU 3.0
  337. UINT8 FlexRatioOverrideDefault;
  338. UINT8 RatioLimit1Default;
  339. UINT8 RatioLimit2Default;
  340. UINT8 RatioLimit3Default;
  341. UINT8 RatioLimit4Default;
  342. UINT8 OverclockingLockDefault;
  343. UINT8 DdrRefClkDefault;
  344. UINT8 DdrRatioDefault;
  345. UINT8 tCLDefault;
  346. UINT8 tCWLDefault;
  347. UINT16 tFAWDefault;
  348. UINT16 tRASDefault;
  349. UINT16 tRCDefault;
  350. UINT8 tRCDDefault;
  351. UINT16 tREFIDefault;
  352. UINT16 tRFCDefault;
  353. UINT8 tRPDefault;
  354. UINT8 tRPabDefault;
  355. UINT8 tRRDDefault;
  356. UINT8 tRTPDefault;
  357. UINT8 tWRDefault;
  358. UINT8 tWTRDefault;
  359. UINT8 NModeDefault;
  360. UINT8 CoreMaxOcRatioDefault;
  361. UINT8 CoreVoltageModeDefault;
  362. UINT16 CoreVoltageOverrideDefault;
  363. UINT16 CoreVoltageOffsetDefault;
  364. UINT8 CoreVoltageOffsetPrefixDefault;
  365. UINT16 CoreExtraTurboVoltageDefault;
  366. UINT8 GtOcSupportDefault;
  367. UINT8 GtOcFrequencyDefault;
  368. UINT16 GtExtraTurboVoltageDefault;
  369. UINT16 GtOcVoltageDefault;
  370. UINT8 GtVoltageModeDefault;
  371. UINT16 GtVoltageOverrideDefault;
  372. UINT16 GtVoltageOffsetDefault;
  373. UINT8 GtVoltageOffsetPrefixDefault;
  374. UINT8 ClrMaxOcRatioDefault;
  375. UINT8 ClrVoltageModeDefault;
  376. UINT16 ClrVoltageOverrideDefault;
  377. UINT16 ClrVoltageOffsetDefault;
  378. UINT8 ClrVoltageOffsetPrefixDefault;
  379. UINT16 ClrExtraTurboVoltageDefault;
  380. UINT16 UncoreVoltageOffsetDefault;
  381. UINT8 UncoreVoltageOffsetPrefixDefault;
  382. UINT16 IoaVoltageOffsetDefault;
  383. UINT8 IoaVoltageOffsetPrefixDefault;
  384. UINT16 IodVoltageOffsetDefault;
  385. UINT8 IodVoltageOffsetPrefixDefault;
  386. UINT8 SvidEnableDefault;
  387. UINT16 SvidVoltageOverrideDefault;
  388. UINT8 FivrFaultsEnableDefault;
  389. UINT8 FivrEfficiencyEnableDefault;
  390. UINT16 VrCurrentLimitDefault;
  391. UINT8 EnableGvDefault;
  392. UINT8 TurboModeDefault;
  393. UINT8 PowerLimit1TimeDefault;
  394. UINT16 PowerLimit1Default;
  395. UINT16 PowerLimit2Default;
  396. UINT8 RatioLimit1; //ratiolimit handling has changed in SKX. knobs might need to change too. Will have to revisit again.
  397. UINT8 RatioLimit2;
  398. UINT8 RatioLimit3;
  399. UINT8 RatioLimit4;
  400. UINT8 CpuRatio; // need to understand what is the difference between maxnonturboratio and cpuratio. if cpuratiooverride is 0, then cpuratio is same as maxnonturboratio. add this to platform cpu policy or socketsetup.
  401. UINT8 CpuRatioOverride;
  402. UINT8 IsTurboRatioDefaultsInitalized; // related to initializing all the vardefault. is this flow needed for HEDT/intended only for clients? no need for set up creation.
  403. UINT8 DdrRefClk; //cant find any in purley. new one?
  404. UINT8 PcieRatioDisabled;//need to check if this is applicable to HEDT. also no need to create a setup variable.
  405. UINT8 NMode ;
  406. UINT8 Pmtt;
  407. UINT16 GtVoltageOffset; //existing but no set up option
  408. UINT16 VrCurrentLimit;//done
  409. //UINT8 SpdProfileSelected; same as XMPMode
  410. UINT8 NModeSupport;
  411. UINT8 WDTSupportforNextOSBoot; // no setup option needed
  412. UINT16 TimeforNextOSBoot; // no setup optiom needed
  413. UINT8 PlatformUnstable; // no set up option needed. this decides if all the vardefaults are needed.
  414. UINT8 GtVoltageMode; //existing but no set up option
  415. UINT8 DdrRatio;
  416. UINT8 GtOcFrequency;
  417. UINT16 GtExtraTurboVoltage; //existing but no set up option
  418. UINT16 GtVoltageOverride; //existing but no set up option
  419. UINT8 GtVoltageOffsetPrefix;
  420. UINT8 GtOcSupport;
  421. //
  422. // CPU releated
  423. //
  424. UINT8 FlexOverrideEnable;
  425. UINT8 FlexRatioOverride;
  426. UINT8 PowerLimit3Override;
  427. UINT32 PowerLimit3;
  428. UINT8 PowerLimit3Time;
  429. UINT8 PowerLimit3DutyCycle;
  430. UINT8 PowerLimit3Lock;
  431. UINT8 MemoryVoltageOverride;
  432. //
  433. // ICC Related
  434. //
  435. UINT8 BClkOverride;
  436. UINT8 BclkAdjustable;
  437. UINT8 DmiPegRatio;
  438. UINT8 DfxAdvDebugJumper;
  439. UINT8 DfxAltPostCode;
  440. //
  441. // Validation Related
  442. //
  443. UINT8 ValidationResetType;
  444. UINT16 ValidationCountOuter;
  445. UINT16 ValidationCountInner;
  446. UINT8 ValidationStopOnError;
  447. UINT8 ValidationBootWhenDone;
  448. UINT8 ValidationSkxPciError;
  449. UINT8 ValidationSkxPciLinkError;
  450. UINT8 ValidationPchPciError;
  451. UINT8 ValidationSkxPciLinkRecoveryCountError;
  452. UINT16 ValidationSkxPciLinkRecoveryCountThreshold;
  453. UINT8 ValidationKtiError;
  454. UINT8 TraceHubDebugInterface;
  455. UINT8 RamDebugInterface;
  456. UINT8 StorageOpROMSuppression;
  457. //
  458. // PC_SIO_END
  459. //
  460. UINT8 RsaSupport;
  461. UINT8 FnvErrorMailbox; // 0 - DDRT, 1 - SMBUS
  462. UINT8 ReportAlertSPA; // Include SPA when reporting DDRT alert. Only to disable for MCE recovery test.
  463. UINT8 AEPErrorInjEn;
  464. UINT8 NgnHostAlertPatrolScrubUNC; // Signal DDRT interrupt upon receiving Uncorrectable Error for NGN Patrol Scrub
  465. UINT8 DcpmmUncPoison;
  466. UINT8 UCErrChkForVariableSrv;
  467. } SYSTEM_CONFIGURATION;
  468. #pragma pack()
  469. #define EFI_HDD_PRESENT 0x01
  470. #define EFI_HDD_NOT_PRESENT 0x00
  471. #define EFI_CD_PRESENT 0x02
  472. #define EFI_CD_NOT_PRESENT 0x00
  473. #define EFI_HDD_WARNING_ON 0x01
  474. #define EFI_CD_WARNING_ON 0x02
  475. #define EFI_SMART_WARNING_ON 0x04
  476. #define EFI_HDD_WARNING_OFF 0x00
  477. #define EFI_CD_WARNING_OFF 0x00
  478. #define EFI_SMART_WARNING_OFF 0x00
  479. #endif // #ifndef _SETUP_VARIABLE