PchUsbPolicy.h 1.5 KB

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  1. /**
  2. **/
  3. /**
  4. Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved
  5. SPDX-License-Identifier: BSD-2-Clause-Patent
  6. @file
  7. PchUsbPolicy.h
  8. @brief
  9. PCH Usb policy PPI produced by a platform driver specifying
  10. various expected PCH Usb settings. This PPI is consumed by the
  11. PCH PEI drivers.
  12. **/
  13. #ifndef _PCH_USB_POLICY_H_
  14. #define _PCH_USB_POLICY_H_
  15. //
  16. // PCH Usb policy provided by platform for PEI phase
  17. //
  18. #ifndef ECP_FLAG
  19. #include <PiPei.h>
  20. #endif
  21. #include "PchRegs.h"
  22. #include <Protocol/PchPlatformPolicy.h>
  23. #define PCH_USB_POLICY_PPI_GUID \
  24. { \
  25. 0xc02b0573, 0x2b4e, 0x4a31, 0xa3, 0x1a, 0x94, 0x56, 0x7b, 0x50, 0x44, 0x2c \
  26. }
  27. extern EFI_GUID gPchUsbPolicyPpiGuid;
  28. typedef struct _PCH_USB_POLICY_PPI PCH_USB_POLICY_PPI;
  29. ///
  30. /// PPI revision number
  31. /// Any backwards compatible changes to this PPI will result in an update in the revision number
  32. /// Major changes will require publication of a new PPI
  33. ///
  34. /// Revision 1: Original version
  35. ///
  36. #define PCH_USB_POLICY_PPI_REVISION_1 1
  37. ///
  38. /// Generic definitions for device enabling/disabling used by PCH code.
  39. ///
  40. #define PCH_DEVICE_ENABLE 1
  41. #define PCH_DEVICE_DISABLE 0
  42. #define EHCI_MODE 1
  43. struct _PCH_USB_POLICY_PPI {
  44. UINT8 Revision;
  45. PCH_USB_CONFIG *UsbConfig;
  46. UINT8 Mode;
  47. UINTN EhciMemBaseAddr;
  48. UINT32 EhciMemLength;
  49. UINTN XhciMemBaseAddr;
  50. };
  51. #endif