PchCommonDefinitions.h 6.4 KB

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  1. /*++
  2. Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. Module Name:
  5. PchCommonDefinitions.h
  6. Abstract:
  7. This header file provides common definitions for PCH
  8. --*/
  9. #ifndef _PCH_COMMON_DEFINITIONS_H_
  10. #define _PCH_COMMON_DEFINITIONS_H_
  11. //
  12. // MMIO access macros
  13. //
  14. #define PchMmioAddress(BaseAddr, Register) ((UINTN) BaseAddr + (UINTN) (Register))
  15. //
  16. // 32 bit MMIO access
  17. //
  18. #define PchMmio32Ptr(BaseAddr, Register) ((volatile UINT32 *) PchMmioAddress (BaseAddr, Register))
  19. #define PchMmio32(BaseAddr, Register) *PchMmio32Ptr (BaseAddr, Register)
  20. #define PchMmio32Or(BaseAddr, Register, OrData) \
  21. PchMmio32 (BaseAddr, Register) = (UINT32) \
  22. (PchMmio32 (BaseAddr, Register) | (UINT32) (OrData))
  23. #define PchMmio32And(BaseAddr, Register, AndData) \
  24. PchMmio32 (BaseAddr, Register) = (UINT32) \
  25. (PchMmio32 (BaseAddr, Register) & (UINT32) (AndData))
  26. #define PchMmio32AndThenOr(BaseAddr, Register, AndData, OrData) \
  27. PchMmio32 (BaseAddr, Register) = (UINT32) \
  28. ((PchMmio32 (BaseAddr, Register) & (UINT32) (AndData)) | (UINT32) (OrData))
  29. //
  30. // 16 bit MMIO access
  31. //
  32. #define PchMmio16Ptr(BaseAddr, Register) ((volatile UINT16 *) PchMmioAddress (BaseAddr, Register))
  33. #define PchMmio16(BaseAddr, Register) *PchMmio16Ptr (BaseAddr, Register)
  34. #define PchMmio16Or(BaseAddr, Register, OrData) \
  35. PchMmio16 (BaseAddr, Register) = (UINT16) \
  36. (PchMmio16 (BaseAddr, Register) | (UINT16) (OrData))
  37. #define PchMmio16And(BaseAddr, Register, AndData) \
  38. PchMmio16 (BaseAddr, Register) = (UINT16) \
  39. (PchMmio16 (BaseAddr, Register) & (UINT16) (AndData))
  40. #define PchMmio16AndThenOr(BaseAddr, Register, AndData, OrData) \
  41. PchMmio16 (BaseAddr, Register) = (UINT16) \
  42. ((PchMmio16 (BaseAddr, Register) & (UINT16) (AndData)) | (UINT16) (OrData))
  43. //
  44. // 8 bit MMIO access
  45. //
  46. #define PchMmio8Ptr(BaseAddr, Register) ((volatile UINT8 *) PchMmioAddress (BaseAddr, Register))
  47. #define PchMmio8(BaseAddr, Register) *PchMmio8Ptr (BaseAddr, Register)
  48. #define PchMmio8Or(BaseAddr, Register, OrData) \
  49. PchMmio8 (BaseAddr, Register) = (UINT8) \
  50. (PchMmio8 (BaseAddr, Register) | (UINT8) (OrData))
  51. #define PchMmio8And(BaseAddr, Register, AndData) \
  52. PchMmio8 (BaseAddr, Register) = (UINT8) \
  53. (PchMmio8 (BaseAddr, Register) & (UINT8) (AndData))
  54. #define PchMmio8AndThenOr(BaseAddr, Register, AndData, OrData) \
  55. PchMmio8 (BaseAddr, Register) = (UINT8) \
  56. ((PchMmio8 (BaseAddr, Register) & (UINT8) (AndData)) | (UINT8) (OrData))
  57. //
  58. // Memory Mapped PCI Access macros
  59. //
  60. #define PCH_PCI_EXPRESS_BASE_ADDRESS 0xE0000000
  61. //
  62. // PCI Device MM Base
  63. //
  64. #define PchPciDeviceMmBase(Bus, Device, Function) \
  65. ( \
  66. (UINTN) PCH_PCI_EXPRESS_BASE_ADDRESS + (UINTN) (Bus << 20) + (UINTN) (Device << 15) + (UINTN) \
  67. (Function << 12) \
  68. )
  69. //
  70. // PCI Device MM Address
  71. //
  72. #define PchPciDeviceMmAddress(Segment, Bus, Device, Function, Register) \
  73. ( \
  74. (UINTN) PCH_PCI_EXPRESS_BASE_ADDRESS + (UINTN) (Bus << 20) + (UINTN) (Device << 15) + (UINTN) \
  75. (Function << 12) + (UINTN) (Register) \
  76. )
  77. //
  78. // 32 bit PCI access
  79. //
  80. #define PchMmPci32Ptr(Segment, Bus, Device, Function, Register) \
  81. ((volatile UINT32 *) PchPciDeviceMmAddress (Segment, Bus, Device, Function, Register))
  82. #define PchMmPci32(Segment, Bus, Device, Function, Register) *PchMmPci32Ptr (Segment, Bus, Device, Function, Register)
  83. #define PchMmPci32Or(Segment, Bus, Device, Function, Register, OrData) \
  84. PchMmPci32 ( \
  85. Segment, \
  86. Bus, \
  87. Device, \
  88. Function, \
  89. Register \
  90. ) = (UINT32) (PchMmPci32 (Segment, Bus, Device, Function, Register) | (UINT32) (OrData))
  91. #define PchMmPci32And(Segment, Bus, Device, Function, Register, AndData) \
  92. PchMmPci32 ( \
  93. Segment, \
  94. Bus, \
  95. Device, \
  96. Function, \
  97. Register \
  98. ) = (UINT32) (PchMmPci32 (Segment, Bus, Device, Function, Register) & (UINT32) (AndData))
  99. #define PchMmPci32AndThenOr(Segment, Bus, Device, Function, Register, AndData, OrData) \
  100. PchMmPci32 ( \
  101. Segment, \
  102. Bus, \
  103. Device, \
  104. Function, \
  105. Register \
  106. ) = (UINT32) ((PchMmPci32 (Segment, Bus, Device, Function, Register) & (UINT32) (AndData)) | (UINT32) (OrData))
  107. //
  108. // 16 bit PCI access
  109. //
  110. #define PchMmPci16Ptr(Segment, Bus, Device, Function, Register) \
  111. ((volatile UINT16 *) PchPciDeviceMmAddress (Segment, Bus, Device, Function, Register))
  112. #define PchMmPci16(Segment, Bus, Device, Function, Register) *PchMmPci16Ptr (Segment, Bus, Device, Function, Register)
  113. #define PchMmPci16Or(Segment, Bus, Device, Function, Register, OrData) \
  114. PchMmPci16 ( \
  115. Segment, \
  116. Bus, \
  117. Device, \
  118. Function, \
  119. Register \
  120. ) = (UINT16) (PchMmPci16 (Segment, Bus, Device, Function, Register) | (UINT16) (OrData))
  121. #define PchMmPci16And(Segment, Bus, Device, Function, Register, AndData) \
  122. PchMmPci16 ( \
  123. Segment, \
  124. Bus, \
  125. Device, \
  126. Function, \
  127. Register \
  128. ) = (UINT16) (PchMmPci16 (Segment, Bus, Device, Function, Register) & (UINT16) (AndData))
  129. #define PchMmPci16AndThenOr(Segment, Bus, Device, Function, Register, AndData, OrData) \
  130. PchMmPci16 ( \
  131. Segment, \
  132. Bus, \
  133. Device, \
  134. Function, \
  135. Register \
  136. ) = (UINT16) ((PchMmPci16 (Segment, Bus, Device, Function, Register) & (UINT16) (AndData)) | (UINT16) (OrData))
  137. //
  138. // 8 bit PCI access
  139. //
  140. #define PchMmPci8Ptr(Segment, Bus, Device, Function, Register) \
  141. ((volatile UINT8 *) PchPciDeviceMmAddress (Segment, Bus, Device, Function, Register))
  142. #define PchMmPci8(Segment, Bus, Device, Function, Register) *PchMmPci8Ptr (Segment, Bus, Device, Function, Register)
  143. #define PchMmPci8Or(Segment, Bus, Device, Function, Register, OrData) \
  144. PchMmPci8 ( \
  145. Segment, \
  146. Bus, \
  147. Device, \
  148. Function, \
  149. Register \
  150. ) = (UINT8) (PchMmPci8 (Segment, Bus, Device, Function, Register) | (UINT8) (OrData))
  151. #define PchMmPci8And(Segment, Bus, Device, Function, Register, AndData) \
  152. PchMmPci8 ( \
  153. Segment, \
  154. Bus, \
  155. Device, \
  156. Function, \
  157. Register \
  158. ) = (UINT8) (PchMmPci8 (Segment, Bus, Device, Function, Register) & (UINT8) (AndData))
  159. #define PchMmPci8AndThenOr(Segment, Bus, Device, Function, Register, AndData, OrData) \
  160. PchMmPci8 ( \
  161. Segment, \
  162. Bus, \
  163. Device, \
  164. Function, \
  165. Register \
  166. ) = (UINT8) ((PchMmPci8 (Segment, Bus, Device, Function, Register) & (UINT8) (AndData)) | (UINT8) (OrData))
  167. #endif