PlatformBaseAddresses.h 2.5 KB

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  1. /*++
  2. Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. Module Name:
  5. PlatformBaseAddresses.h
  6. Abstract:
  7. Revision History
  8. ++*/
  9. #ifndef _PLATFORM_BASE_ADDRESSES_H
  10. #define _PLATFORM_BASE_ADDRESSES_H
  11. //
  12. // Define some fixed platform device location information
  13. //
  14. //
  15. // Define platform base
  16. //
  17. //
  18. // SIO
  19. //
  20. #define SIO_BASE_ADDRESS 0x0680
  21. #define SIO_MONITORING_BASE_ADDRESS 0x0290
  22. #define SIO_BASE_MASK 0xFFF0
  23. #define WINDBOND_ECIR_BASE_ADDRESS 0x0810
  24. #define SIO_MAILBOX_BASE_ADDRESS 0x0360 // Used by EC controller
  25. #define SIO_EC_CHANNEL2 0x62 // Used by EC controller for offset 0x62 and 0x66
  26. //
  27. // South Cluster
  28. //
  29. #define ACPI_BASE_ADDRESS 0x0400
  30. #define GPIO_BASE_ADDRESS 0x0500
  31. #define SMBUS_BUS_DEV_FUNC 0x1F0300
  32. #define SMBUS_BASE_ADDRESS 0xEFA0 // SMBus IO Base Address
  33. #define SPI_BASE_ADDRESS 0xFED01000 // SPI Memory Base Address
  34. #define PMC_BASE_ADDRESS 0xFED03000 // PMC Memory Base Address
  35. #define SMBM_BASE_ADDRESS 0xFED04000 // SMBus Memory Base Address
  36. #define IO_BASE_ADDRESS 0xFED0C000 // IO Memory Base Address
  37. #define ILB_BASE_ADDRESS 0xFED08000 // ILB Memory Base Address
  38. #define HPET_BASE_ADDRESS 0xFED00000 // HPET Base Address
  39. #define RCBA_BASE_ADDRESS 0xFED1C000 // Root Complex Base Address
  40. #define MPHY_BASE_ADDRESS 0xFEF00000 // MPHY Memory Base Address
  41. #define PUNIT_BASE_ADDRESS 0xFED05000 // PUnit Memory Base Address
  42. //
  43. // GPIO GROUP OFFSET
  44. //
  45. #define GPIO_SCORE_OFFSET 0x0000
  46. #define GPIO_NCORE_OFFSET 0x1000
  47. #define GPIO_SSUS_OFFSET 0x2000
  48. //
  49. // MCH/CPU
  50. //
  51. #define DMI_BASE_ADDRESS 0xFED18000 // 4K, similar to IIO_RCBA // modify from bearlake -- cchew10
  52. #define EP_BASE_ADDRESS 0xFED19000
  53. #define MC_MMIO_BASE 0xFED14000 // Base Address for MMIO registers
  54. //
  55. // TPM
  56. //
  57. #define TPM_BASE_ADDRESS 0xFED40000 // Base address for TPM
  58. //
  59. // Local and I/O APIC addresses.
  60. //
  61. #define IO_APIC_ADDRESS 0xFEC00000
  62. #define IIO_IOAPIC_ADDRESS 0xFEC90000
  63. #define LOCAL_APIC_ADDRESS 0xFEE00000
  64. #endif