PpmPlatformPolicy.h 4.0 KB

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  1. /**
  2. Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. /*++
  6. Module Name:
  7. PpmPlatformPolicy.h
  8. Abstract:
  9. Interface definition details between PPM and platform drivers during DXE phase.
  10. --*/
  11. #ifndef _PPM_PLATFORM_POLICY_H_
  12. #define _PPM_PLATFORM_POLICY_H_
  13. //
  14. // PPM policy provided by platform for DXE phase {DDABFEAC-EF63-452c-8F39-ED7FAED8265E}
  15. //
  16. #define PPM_PLATFORM_POLICY_PROTOCOL_GUID \
  17. {0xddabfeac, 0xef63, 0x452c, 0x8f, 0x39, 0xed, 0x7f, 0xae, 0xd8, 0x26, 0x5e}
  18. //
  19. // Extern the GUID for protocol users.
  20. //
  21. extern EFI_GUID gPpmPlatformPolicyProtocolGuid;
  22. //
  23. // Forward reference for ANSI C compatibility
  24. //
  25. typedef struct _PPM_PLATFORM_POLICY_PROTOCOL PPM_PLATFORM_POLICY_PROTOCOL;
  26. //
  27. // Protocol revision number
  28. // Any backwards compatible changes to this protocol will result in an update in the revision number
  29. // Major changes will require publication of a new protocol
  30. //
  31. // Revision 1: Original version
  32. // Revision 2: Added T-states field to the PPM_FUNCTION_ENABLES structure, Renamed unused fields - CxPopUpEnable, CxPopDownEnable, FastC4ExitEnable
  33. // Revision 3: Extended VidCpuid to 32 bits for extended CPUID support (Penryn)
  34. // Revision 4: Added support for extended C6 residency enabling
  35. //
  36. #define PPM_PLATFORM_POLICY_PROTOCOL_REVISION 1
  37. #define PPM_PLATFORM_POLICY_PROTOCOL_REVISION_2 2
  38. #define PPM_PLATFORM_POLICY_PROTOCOL_REVISION_3 3
  39. #define PPM_PLATFORM_POLICY_PROTOCOL_REVISION_4 4
  40. //
  41. // Define maximum number of custom VID states supported
  42. //
  43. #ifndef MAX_CUSTOM_VID_TABLE_STATES
  44. #define MAX_CUSTOM_VID_TABLE_STATES 6
  45. #endif
  46. //
  47. // Custom VID table
  48. //
  49. typedef struct {
  50. UINT8 VidNumber;
  51. UINT32 VidCpuid;
  52. UINT16 VidMaxRatio;
  53. UINT16 VidMaxVid;
  54. UINT16 StateRatio[MAX_CUSTOM_VID_TABLE_STATES];
  55. UINT16 StateVid[MAX_CUSTOM_VID_TABLE_STATES];
  56. } PPM_CUSTOM_VID_TABLE;
  57. //
  58. // PPM functional enables
  59. //
  60. typedef struct {
  61. UINT8 EnableGv :1; // 0: Disabled; 1: Enabled
  62. UINT8 EnableCx :1;
  63. UINT8 EnableCxe :1;
  64. UINT8 EnableC4 :1;
  65. UINT8 EnableC6 :1;
  66. UINT8 EnableC7 :1;
  67. UINT8 EnableTm :1;
  68. UINT8 Reserve00 :1;
  69. UINT8 Reserve01 :1;
  70. UINT8 EnableTurboMode :1;
  71. UINT8 PowerLimit2 :1;
  72. UINT8 EnableProcHot :1;
  73. UINT8 Reserve02 :1;
  74. UINT8 EnableCMP :1;
  75. UINT8 TStatesEnable :1;
  76. UINT8 Reserve03 :1;
  77. UINT8 Reserve04 ;
  78. } PPM_FUNCTION_ENABLES;
  79. //
  80. // PPM Turbo settings
  81. //
  82. typedef struct _PPM_TURBO_SETTINGS {
  83. UINT16 PowerLimit1;
  84. UINT32 PowerLimit1Time;
  85. UINT16 PowerLimit2;
  86. UINT8 TurboPowerLimitLock;
  87. } PPM_TURBO_SETTINGS;
  88. //
  89. // Platform Policy
  90. //
  91. struct _PPM_PLATFORM_POLICY_PROTOCOL {
  92. UINT8 Revision;
  93. PPM_FUNCTION_ENABLES FunctionEnables;
  94. PPM_CUSTOM_VID_TABLE CustomVidTable;
  95. PPM_TURBO_SETTINGS TurboSettings;
  96. UINT8 Reserve00;
  97. UINT8 Reserve01;
  98. UINT8 Reserve02;
  99. UINT8 Reserve03;
  100. UINT8 Reserve04;
  101. UINT8 Reserve05;
  102. UINT8 Reserve06;
  103. UINT8 S3RestoreMsrSwSmiNumber;
  104. UINT8 Reserve07;
  105. UINT32 Reserve08;
  106. UINT8 Reserve09;
  107. //
  108. // Primary and Secondary Plane Current Limits
  109. //
  110. UINT16 Reserve10;
  111. UINT8 Reserve11;
  112. };
  113. #endif