RhProxy.asl 8.4 KB

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  1. /** @file
  2. SSDT for RhProxy Driver.
  3. Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. DefinitionBlock ("RHPX.aml", "SSDT", 1, "MSFT", "RHPROXY", 1)
  7. {
  8. Scope (\_SB)
  9. {
  10. //
  11. // Test peripheral device node for MinnowBoardMax
  12. //
  13. Device(RHPX)
  14. {
  15. Name(_HID, "MSFT8000")
  16. Name(_CID, "MSFT8000")
  17. Name(_UID, 1)
  18. Name(_CRS, ResourceTemplate()
  19. {
  20. // Index 0
  21. SPISerialBus( // Pin 5, 7, 9 , 11 of JP1 for SIO_SPI
  22. 1, // Device selection
  23. PolarityLow, // Device selection polarity
  24. FourWireMode, // wiremode
  25. 8, // databit len
  26. ControllerInitiated, // slave mode
  27. 8000000, // Connection speed
  28. ClockPolarityLow, // Clock polarity
  29. ClockPhaseSecond, // clock phase
  30. "\\_SB.SPI1", // ResourceSource: SPI bus controller name
  31. 0, // ResourceSourceIndex
  32. ResourceConsumer, // Resource usage
  33. JSPI, // DescriptorName: creates name for offset of resource descriptor
  34. ) // Vendor Data
  35. // Index 1
  36. I2CSerialBus( // Pin 13, 15 of JP1, for SIO_I2C5 (signal)
  37. 0xFF, // SlaveAddress: bus address (TBD)
  38. , // SlaveMode: default to ControllerInitiated
  39. 400000, // ConnectionSpeed: in Hz
  40. , // Addressing Mode: default to 7 bit
  41. "\\_SB.I2C6", // ResourceSource: I2C bus controller name (For MinnowBoard Max, hardware I2C5(0-based) is reported as ACPI I2C6(1-based))
  42. ,
  43. ,
  44. JI2C, // Descriptor Name: creates name for offset of resource descriptor
  45. ) // VendorData
  46. // Index 2
  47. UARTSerialBus( // Pin 17, 19 of JP1, for SIO_UART2
  48. 115200, // InitialBaudRate: in bits ber second
  49. , // BitsPerByte: default to 8 bits
  50. , // StopBits: Defaults to one bit
  51. 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled
  52. , // IsBigEndian: default to LittleEndian
  53. , // Parity: Defaults to no parity
  54. , // FlowControl: Defaults to no flow control
  55. 32, // ReceiveBufferSize
  56. 32, // TransmitBufferSize
  57. "\\_SB.URT2", // ResourceSource: UART bus controller name
  58. ,
  59. ,
  60. UAR2, // DescriptorName: creates name for offset of resource descriptor
  61. )
  62. // Index 3
  63. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO2",) {0} // Pin 21 of JP1 (GPIO_S5[00])
  64. // Index 4
  65. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO2",) {0}
  66. // Index 5
  67. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO2",) {1} // Pin 23 of JP1 (GPIO_S5[01])
  68. // Index 6
  69. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO2",) {1}
  70. // Index 7
  71. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO2",) {2} // Pin 25 of JP1 (GPIO_S5[02])
  72. // Index 8
  73. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO2",) {2}
  74. // Index 9
  75. UARTSerialBus( // Pin 6, 8, 10, 12 of JP1, for SIO_UART1
  76. 115200, // InitialBaudRate: in bits ber second
  77. , // BitsPerByte: default to 8 bits
  78. , // StopBits: Defaults to one bit
  79. 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled
  80. , // IsBigEndian: default to LittleEndian
  81. , // Parity: Defaults to no parity
  82. FlowControlHardware, // FlowControl: Defaults to no flow control
  83. 32, // ReceiveBufferSize
  84. 32, // TransmitBufferSize
  85. "\\_SB.URT1", // ResourceSource: UART bus controller name
  86. ,
  87. ,
  88. UAR1, // DescriptorName: creates name for offset of resource descriptor
  89. )
  90. // Index 10
  91. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {62} // Pin 14 of JP1 (GPIO_SC[62])
  92. // Index 11
  93. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {62}
  94. // Index 12
  95. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {63} // Pin 16 of JP1 (GPIO_SC[63])
  96. // Index 13
  97. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {63}
  98. // Index 14
  99. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {65} // Pin 18 of JP1 (GPIO_SC[65])
  100. // Index 15
  101. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {65}
  102. // Index 16
  103. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {64} // Pin 20 of JP1 (GPIO_SC[64])
  104. // Index 17
  105. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {64}
  106. // Index 18
  107. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {94} // Pin 22 of JP1 (GPIO_SC[94])
  108. // Index 19
  109. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {94}
  110. // Index 20
  111. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {95} // Pin 24 of JP1 (GPIO_SC[95])
  112. // Index 21
  113. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {95}
  114. // Index 22
  115. GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {54} // Pin 26 of JP1 (GPIO_SC[54])
  116. // Index 23
  117. GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {54}
  118. })
  119. Name(_DSD, Package()
  120. {
  121. ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
  122. Package()
  123. {
  124. // SPI Mapping
  125. Package(2) { "bus-SPI-SPI0", Package() { 0 }},
  126. // TODO: Intel will need to provide the right value for SPI0 properties
  127. Package(2) { "SPI0-MinClockInHz", 100000 },
  128. Package(2) { "SPI0-MaxClockInHz", 15000000 },
  129. // SupportedDataBitLengths takes a list of support data bit length
  130. // Example : Package(2) { "SPI0-SupportedDataBitLengths", Package() { 8, 7, 16 }},
  131. Package(2) { "SPI0-SupportedDataBitLengths", Package() { 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32 }},
  132. // I2C Mapping
  133. Package(2) { "bus-I2C-I2C5", Package() { 1 }},
  134. // UART Mapping
  135. Package(2) { "bus-UART-UART2", Package() { 2 }},
  136. Package(2) { "bus-UART-UART1", Package() { 9 }},
  137. }
  138. })
  139. }
  140. }
  141. }