PchScc.asl 14 KB

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  1. /**************************************************************************;
  2. ;* *;
  3. ;* *;
  4. ;* Intel Corporation - ACPI Reference Code for the Baytrail *;
  5. ;* Family of Customer Reference Boards. *;
  6. ;* *;
  7. ;* *;
  8. ;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *;
  9. ;
  10. ; SPDX-License-Identifier: BSD-2-Clause-Patent
  11. ;
  12. ;* *;
  13. ;* *;
  14. ;**************************************************************************/
  15. Device (PEPD)
  16. {
  17. Name (_HID, "INT3396")
  18. Name(_CID, 0x800dd041)
  19. Name (_UID, 0x1)
  20. // Indicates if the platform PEP has loaded
  21. Name(PEPP, Zero)
  22. // Devices score-boarded by the PEP, Rev0 format
  23. Name (DEVS, Package() {0})
  24. // Devices score-boarded by the PEP, Rev1 format
  25. Name(DEVX, Package()
  26. {
  27. Package () {"\\_SB.PCI0.XHC1", 0x1},
  28. Package () {"\\_SB.PCI0.EHC1", 0x1},
  29. Package () {"\\_SB.PCI0.GFX0", 0x1},
  30. Package () {"\\_SB.PCI0.GFX0.ISP0", 0x1},
  31. Package () {"\\_SB.PCI0.SEC0", 0x1},
  32. Package () {"\\_SB.I2C1", 0x1},
  33. Package () {"\\_SB.I2C2", 0x1},
  34. Package () {"\\_SB.I2C3", 0x1},
  35. Package () {"\\_SB.I2C4", 0x1},
  36. Package () {"\\_SB.I2C5", 0x1},
  37. Package () {"\\_SB.I2C6", 0x1},
  38. Package () {"\\_SB.I2C7", 0x1},
  39. Package () {"\\_SB.SDHA", 0x1},
  40. Package () {"\\_SB.SDHB", 0x1},
  41. Package () {"\\_SB.SDHC", 0x1},
  42. Package () {"\\_SB.SPI1", 0x1},
  43. Package () {"\\_SB.URT1", 0x1},
  44. Package () {"\\_SB.URT2", 0x1},
  45. })
  46. // Crashdump device package
  47. Name(CDMP, Package(2) {})
  48. // Device dependency for uPEP
  49. Name(DEVY, Package()
  50. {
  51. Package() {"\\_PR.CPU0", 0x1, Package() {Package() {0xFF, 0}}},
  52. Package() {"\\_PR.CPU1", 0x1, Package() {Package() {0xFF, 0}}},
  53. Package() {"\\_PR.CPU2", 0x1, Package() {Package() {0xFF, 0}}},
  54. Package() {"\\_PR.CPU3", 0x1, Package() {Package() {0xFF, 0}}},
  55. Package() {"\\_SB.I2C1", 0x1, Package() {Package() {0xFF,3}}},
  56. Package() {"\\_SB.I2C2", 0x1, Package() {Package() {0xFF,3}}},
  57. Package() {"\\_SB.I2C3", 0x1, Package() {Package() {0xFF,3}}},
  58. Package() {"\\_SB.I2C4", 0x1, Package() {Package() {0xFF,3}}},
  59. Package() {"\\_SB.I2C5", 0x1, Package() {Package() {0xFF,3}}},
  60. Package() {"\\_SB.I2C6", 0x1, Package() {Package() {0xFF,3}}},
  61. Package() {"\\_SB.I2C7", 0x1, Package() {Package() {0xFF,3}}},
  62. Package() {"\\_SB.PCI0.GFX0", 0x1, Package() {Package() {0xFF,3}}},
  63. Package() {"\\_SB.PCI0.SEC0", 0x1, Package() {Package() {0xFF,3}}},
  64. Package() {"\\_SB.PCI0.XHC1", 0x1, Package() {Package() {0xFF,3}}},
  65. Package() {"\\_SB.PCI0.GFX0.ISP0", 0x1, Package() {Package() {0xFF,3}}},
  66. Package() {"\\_SB.LPEA", 0x1, Package() {Package() {0x0,3}, Package() {0x1,0}, Package() {0x2,3}, Package() {0x3,3}}},
  67. Package() {"\\_SB.SDHA", 0x1, Package() {Package() {0xFF,3}}},
  68. Package() {"\\_SB.SDHB", 0x1, Package() {Package() {0xFF,3}}},
  69. Package() {"\\_SB.SDHC", 0x1, Package() {Package() {0xFF,3}}},
  70. Package() {"\\_SB.SPI1", 0x1, Package() {Package() {0xFF,3}}},
  71. Package() {"\\_SB.URT1", 0x1, Package() {Package() {0xFF,3}}},
  72. Package() {"\\_SB.URT2", 0x1, Package() {Package() {0xFF,3}}}
  73. })
  74. // BCCD crashdump information
  75. Name(BCCD, Package()
  76. {
  77. Package()
  78. {
  79. "\\_SB.SDHA",
  80. Package()
  81. {
  82. Package() { Package() {0, 32, 0, 3, 0xFFFFFFFFFFFFFFFF}, Package() {0xFFFFFFFC, 0x0, 0x4}, 0}
  83. }
  84. }
  85. })
  86. Method(_STA, 0x0, NotSerialized)
  87. {
  88. Return(0xf)
  89. }
  90. Method(_DSM, 0x4, Serialized)
  91. {
  92. If(LEqual(Arg0,ToUUID("B8FEBFE0-BAF8-454b-AECD-49FB91137B21")))
  93. {
  94. // Number of fn IDs supported
  95. If(LEqual(Arg2, Zero))
  96. {
  97. Return(Buffer(One)
  98. {
  99. 0xf
  100. })
  101. }
  102. // Pep presence
  103. If(LEqual(Arg2, One))
  104. {
  105. Store(0x1, PEPP)
  106. Return(0xf)
  107. }
  108. // Mitigation devices
  109. If(LEqual(Arg2, 0x2))
  110. {
  111. If(LEqual(Arg1, 0x0))
  112. {
  113. // Rev0
  114. Return(DEVS)
  115. }
  116. If(LEqual(Arg1, 0x1))
  117. {
  118. // Rev1
  119. Return(DEVX)
  120. }
  121. }
  122. // Crashdump device data
  123. If(LEqual(Arg2, 0x3))
  124. {
  125. Store("\\_SB.SDHA", Index(CDMP,0))
  126. Store(EM1A, Index(CDMP,1))
  127. Return(CDMP)
  128. }
  129. }
  130. // New UUID for built-in uPEP
  131. If(LEqual(Arg0,ToUUID("C4EB40A0-6CD2-11E2-BCFD-0800200C9A66")))
  132. {
  133. // Number of fn IDs supported
  134. If(LEqual(Arg2, Zero))
  135. {
  136. Return(Buffer(One)
  137. {
  138. 0x7
  139. })
  140. }
  141. // LPI device dependencies
  142. If(LEqual(Arg2, 0x1))
  143. {
  144. Return(DEVY)
  145. }
  146. // Crashdump device data
  147. If(LEqual(Arg2, 0x2))
  148. {
  149. Store(EM1A, Local0)
  150. Add(Local0, 0x84, Local0)
  151. Store(Local0, Index(DerefOf(Index(DerefOf(Index(DerefOf(Index(DerefOf(Index(BCCD, Zero, )), One, )), Zero, )), Zero, )), 0x4, ))
  152. Return(BCCD)
  153. }
  154. }
  155. Return(One)
  156. }
  157. }
  158. //
  159. // eMMC 4.41
  160. //
  161. Device(SDHA)
  162. {
  163. Name (_ADR, 0)
  164. Name (_HID, "80860F14")
  165. Name (_CID, "PNP0D40")
  166. Name (_DDN, "Intel(R) eMMC Controller - 80860F14")
  167. Name (_UID, 1)
  168. Name(_DEP, Package(0x1)
  169. {
  170. PEPD
  171. })
  172. Name (RBF1, ResourceTemplate ()
  173. {
  174. Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)
  175. Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {45} // eMMC 4.41 IRQ
  176. })
  177. Method (_CRS, 0x0, NotSerialized)
  178. {
  179. // Update the Base address for BAR0 of eMMC 4.41
  180. CreateDwordField(^RBF1, ^BAR0._BAS, B0B1)
  181. CreateDwordField(^RBF1, ^BAR0._LEN, B0L1)
  182. Store(eM0A, B0B1)
  183. Store(eM0L, B0L1)
  184. Return (RBF1)
  185. }
  186. Method (_STA, 0x0, NotSerialized)
  187. {
  188. //
  189. // PCIM>> 0:ACPI mode 1:PCI mode
  190. // SD1D>> 0:eMMC 4.41 enable 1:eMMC 4.41 disable
  191. //
  192. If (LAnd(LEqual(PCIM, 0), LEqual(SD1D, 0)))
  193. {
  194. Return (0xF)
  195. }
  196. Else
  197. {
  198. Return (0x0)
  199. }
  200. }
  201. Method (_PS3, 0, NotSerialized)
  202. {
  203. OR(PSAT, 0x00000003, PSAT)
  204. OR(PSAT, 0X00000000, PSAT)
  205. //
  206. // If not B1, still keep 2 ms w/a
  207. //
  208. If(LLess(SOCS, 0x03))
  209. {
  210. Sleep(2)
  211. }
  212. }
  213. Method (_PS0, 0, NotSerialized)
  214. {
  215. And(PSAT, 0xfffffffC, PSAT)
  216. OR(PSAT, 0X00000000, PSAT)
  217. //
  218. // If not B1, still keep 2 ms w/a
  219. //
  220. If(LLess(SOCS, 0x03))
  221. {
  222. Sleep(2)
  223. }
  224. }
  225. OperationRegion (KEYS, SystemMemory, eM1A, 0x100)
  226. Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
  227. {
  228. Offset (0x84),
  229. PSAT, 32
  230. }
  231. Method (_DIS, 0x0, NotSerialized)
  232. {
  233. //Adding dummy disable methods for device EMM0
  234. }
  235. Device (EMMD)
  236. {
  237. Name (_ADR, 0x00000008) // Slot 0, Function 8
  238. Method (_RMV, 0, NotSerialized)
  239. {
  240. Return (0x0)
  241. }
  242. }
  243. }
  244. //
  245. // eMMC 4.5
  246. //
  247. Device(SDHD)
  248. {
  249. Name (_ADR, 0)
  250. Name (_HID, "80860F14")
  251. Name (_CID, "PNP0D40")
  252. Name (_DDN, "Intel(R) eMMC Controller - 80860F14")
  253. Name (_UID, 1)
  254. Name(_DEP, Package(0x1)
  255. {
  256. PEPD
  257. })
  258. Name (RBF1, ResourceTemplate ()
  259. {
  260. Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)
  261. Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {44} // eMMC 4.5 IRQ
  262. })
  263. Method (_CRS, 0x0, NotSerialized)
  264. {
  265. CreateDwordField(^RBF1, ^BAR0._BAS, B0B1)
  266. CreateDwordField(^RBF1, ^BAR0._LEN, B0L1)
  267. Store(eM0A, B0B1)
  268. Store(eM0L, B0L1)
  269. Return (RBF1)
  270. }
  271. Method (_STA, 0x0, NotSerialized)
  272. {
  273. //
  274. // PCIM>> 0:ACPI mode 1:PCI mode
  275. // HSID>> 0:eMMC 4.5 enable 1:eMMC 4.5 disable
  276. //
  277. If (LAnd(LEqual(PCIM, 0), LEqual(HSID, 0)))
  278. {
  279. Return (0xF)
  280. }
  281. Else
  282. {
  283. Return (0x0)
  284. }
  285. }
  286. Method (_PS3, 0, NotSerialized)
  287. {
  288. OR(PSAT, 0x00000003, PSAT)
  289. OR(PSAT, 0X00000000, PSAT)
  290. //
  291. // If not B1, still keep 2 ms w/a
  292. //
  293. If(LLess(SOCS, 0x03))
  294. {
  295. Sleep(2)
  296. }
  297. }
  298. Method (_PS0, 0, NotSerialized)
  299. {
  300. And(PSAT, 0xfffffffC, PSAT)
  301. OR(PSAT, 0X00000000, PSAT)
  302. //
  303. // If not B1, still keep 2 ms w/a
  304. //
  305. If(LLess(SOCS, 0x03))
  306. {
  307. Sleep(2)
  308. }
  309. }
  310. OperationRegion (KEYS, SystemMemory, eM1A, 0x100)
  311. Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
  312. {
  313. Offset (0x84),
  314. PSAT, 32
  315. }
  316. Method (_DIS, 0x0, NotSerialized)
  317. {
  318. //Adding dummy disable methods for device EMM0
  319. }
  320. Device (EM45)
  321. {
  322. Name (_ADR, 0x00000008) // Slot 0, Function 8
  323. Method (_RMV, 0, NotSerialized)
  324. {
  325. Return (0x0)
  326. }
  327. }
  328. }
  329. //
  330. // SDIO
  331. //
  332. Device(SDHB)
  333. {
  334. Name (_ADR, 0)
  335. Name (_HID, "INT33BB")
  336. Name (_CID, "PNP0D40")
  337. Name (_DDN, "Intel(R) SDIO Controller - 80860F15")
  338. Name (_UID, 2)
  339. Name (_HRV, 2)
  340. Name(_DEP, Package(0x01)
  341. {
  342. PEPD
  343. })
  344. Name (PSTS, 0x0)
  345. Name (RBUF, ResourceTemplate ()
  346. {
  347. Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)
  348. Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {46} // SDIO IRQ
  349. })
  350. Method (_CRS, 0x0, NotSerialized)
  351. {
  352. CreateDwordField(^RBUF, ^BAR0._BAS, B0BA)
  353. CreateDwordField(^RBUF, ^BAR0._LEN, B0LN)
  354. Store(SI0A, B0BA)
  355. Store(SI0L, B0LN)
  356. Return (RBUF)
  357. }
  358. Method (_STA, 0x0, NotSerialized)
  359. {
  360. If (LLessEqual(STEP, 0x04))
  361. {
  362. //A stepping
  363. Store(SDMD, _HRV)
  364. }
  365. //
  366. // PCIM>> 0:ACPI mode 1:PCI mode
  367. //
  368. If (LEqual(PCIM, 1)) {
  369. Return (0x0)
  370. }
  371. If (LOr(LEqual(SI0A, 0), LEqual(SD2D, 1)))
  372. {
  373. Return (0x0)
  374. }
  375. Return (0xF)
  376. }
  377. Method (_DIS, 0x0, NotSerialized)
  378. {
  379. //Adding dummy disable methods for device EMM0
  380. }
  381. Method (_PS3, 0, NotSerialized)
  382. {
  383. OR(PSAT, 0x00000003, PSAT)
  384. OR(PSAT, 0X00000000, PSAT)
  385. }
  386. Method (_PS0, 0, NotSerialized)
  387. {
  388. And(PSAT, 0xfffffffC, PSAT)
  389. OR(PSAT, 0X00000000, PSAT)
  390. if(LEqual(\_SB.SDHB.PSTS,0x0))
  391. {
  392. if(LEqual (\_SB.GPO2.AVBL, 1))
  393. {
  394. Store( 0x01, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 1 put the device to normal state
  395. Store( 0x01, \_SB.SDHB.PSTS) // indicates that the device powered ON
  396. }
  397. }
  398. }
  399. OperationRegion (KEYS, SystemMemory, SI1A, 0x100)
  400. Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
  401. {
  402. Offset (0x84),
  403. PSAT, 32
  404. }
  405. Device (BRCM)
  406. {
  407. Name (_ADR, 0x01) //SlotNumber + Function
  408. Name (_DEP, Package() {\_SB.GPO2})
  409. Method (_RMV, 0, NotSerialized)
  410. {
  411. Return (0x0)
  412. }
  413. Name (_PRW, Package() {0, 0})
  414. Name (_S4W, 2)
  415. Method (_CRS, 0, Serialized)
  416. {
  417. Name (RBUF, ResourceTemplate ()
  418. {
  419. Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {73}
  420. })
  421. Return (RBUF)
  422. }
  423. Method (_PS3, 0, NotSerialized)
  424. {
  425. if(LEqual (\_SB.GPO2.AVBL, 1))
  426. {
  427. Store( 0x00, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 0 puts the device in reset state
  428. Store( 0x00, \_SB.SDHB.PSTS) //Indicates that the device is powered off
  429. }
  430. }
  431. Method (_PS0, 0, NotSerialized)
  432. {
  433. if(LEqual(\_SB.SDHB.PSTS,0x0))
  434. {
  435. if(LEqual (\_SB.GPO2.AVBL, 1))
  436. {
  437. Store( 0x01, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 1 put the device to normal state
  438. Store( 0x01, \_SB.SDHB.PSTS) // indicates that the device powered ON
  439. }
  440. }
  441. }
  442. } // Device (BRCM)
  443. //
  444. // Secondary Broadcom WIFI function
  445. //
  446. Device(BRC2)
  447. {
  448. Name(_ADR, 0x2) // function 2
  449. Name(_STA, 0xf)
  450. //
  451. // The device is not removable. This must be a method.
  452. //
  453. Method(_RMV, 0x0, NotSerialized)
  454. {
  455. Return(0x0)
  456. }
  457. //
  458. // Describe a vendor-defined connection between this device and the
  459. // primary wifi device
  460. //
  461. Method(_CRS)
  462. {
  463. Name(NAM, Buffer() {"\\_SB.SDHB.BRCM"})
  464. Name(SPB, Buffer()
  465. {
  466. 0x8E, // SPB Descriptor
  467. 0x18, 0x00, // Length including NAM above
  468. 0x01, // +0x00 SPB Descriptor Revision
  469. 0x00, // +0x01 Resource Source Index
  470. 0xc0, // +0x02 Bus type - vendor defined
  471. 0x02, // +0x03 Consumer + controller initiated
  472. 0x00, 0x00, // +0x04 Type specific flags
  473. 0x01, // +0x06 Type specific revision
  474. 0x00, 0x00 // +0x07 type specific data length
  475. // +0x09 - 0xf bytes for NULL-terminated NAM
  476. // Length = 0x18
  477. })
  478. Name(END, Buffer() {0x79, 0x00})
  479. Concatenate(SPB, NAM, Local0)
  480. Concatenate(Local0, END, Local1)
  481. Return(Local1)
  482. }
  483. }
  484. }
  485. //
  486. // SD Card
  487. //
  488. Device(SDHC)
  489. {
  490. Name (_ADR, 0)
  491. Name (_HID, "80860F16")
  492. Name (_CID, "PNP0D40")
  493. Name (_DDN, "Intel(R) SD Card Controller - 80860F16")
  494. Name (_UID, 3)
  495. Name(_DEP, Package(0x01)
  496. {
  497. PEPD
  498. })
  499. Name (RBUF, ResourceTemplate ()
  500. {
  501. Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)
  502. Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {47} // SD Card IRQ
  503. })
  504. Method (_CRS, 0x0, NotSerialized)
  505. {
  506. CreateDwordField(^RBUF, ^BAR0._BAS, B0BA)
  507. CreateDwordField(^RBUF, ^BAR0._LEN, B0LN)
  508. Store(SD0A, B0BA)
  509. Store(SD0L, B0LN)
  510. Return (RBUF)
  511. }
  512. Method (_STA, 0x0, NotSerialized)
  513. {
  514. //
  515. // PCIM>> 0:ACPI mode 1:PCI mode
  516. //
  517. If (LEqual(PCIM, 1)) {
  518. Return (0x0)
  519. }
  520. If (LOr(LEqual(SD0A, 0), LEqual(SD3D, 1)))
  521. {
  522. Return (0x0)
  523. }
  524. Return (0xF)
  525. }
  526. Method (_PS3, 0, NotSerialized)
  527. {
  528. OR(PSAT, 0x00000003, PSAT)
  529. OR(PSAT, 0X00000000, PSAT)
  530. }
  531. Method (_PS0, 0, NotSerialized)
  532. {
  533. And(PSAT, 0xfffffffC, PSAT)
  534. OR(PSAT, 0X00000000, PSAT)
  535. }
  536. OperationRegion (KEYS, SystemMemory, SD1A, 0x100)
  537. Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
  538. {
  539. Offset (0x84),
  540. PSAT, 32
  541. }
  542. Device (CARD)
  543. {
  544. Name (_ADR, 0x00000008)
  545. Method(_RMV, 0x0, NotSerialized)
  546. {
  547. // SDRM = 0 non-removable;
  548. If (LEqual(SDRM, 0))
  549. {
  550. Return (0)
  551. }
  552. Return (1)
  553. }
  554. }
  555. }