IgdOpRn.ASL 11 KB

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  1. /*++
  2. Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. Module Name:
  5. IgdOpRn.ASL
  6. Abstract:
  7. IGD OpRegion/Software SCI Reference Code for the Baytrail Family.
  8. This file contains the interrupt handler code for the Integrated
  9. Graphics Device (IGD) OpRegion/Software SCI mechanism.
  10. --*/
  11. //NOTES:
  12. //
  13. // (1) The code contained in this file inherits the scope in which it
  14. // was included. So BIOS developers must be sure to include this
  15. // file in the scope associated with the graphics device
  16. // (ex. \_SB.PCI0.GFX0).
  17. // (2) Create a _L06 method under the GPE scope to handle the event
  18. // generated by the graphics driver. The _L06 method must call
  19. // the GSCI method in this file.
  20. // (3) The MCHP operation region assumes that _ADR and _BBN names
  21. // corresponding to bus 0, device0, function 0 have been declared
  22. // under the PCI0 scope.
  23. // (4) Before the first execution of the GSCI method, the base address
  24. // of the GMCH SCI OpRegion must be programmed where the driver can
  25. // access it. A 32bit scratch register at 0xFC in the IGD PCI
  26. // configuration space (B0/D2/F0/R0FCh) is used for this purpose.
  27. // Define an OperationRegion to cover the GMCH PCI configuration space as
  28. // described in the IGD OpRegion specificiation.
  29. // Define an OperationRegion to cover the IGD PCI configuration space as
  30. // described in the IGD OpRegion specificiation.
  31. OperationRegion(IGDP, PCI_Config,0x00,0x100)
  32. Field(IGDP, AnyAcc, NoLock, Preserve)
  33. {
  34. Offset(0x10), // GTTMMADR
  35. MADR, 32,
  36. Offset(0x50), // GMCH Graphics Control Register
  37. , 1,
  38. GIVD, 1, // IGD VGA disable bit
  39. , 1,
  40. GUMA, 5, // Stolen memory size
  41. , 8,
  42. Offset(0x54),
  43. , 4,
  44. GMFN, 1, // Gfx function 1 enable
  45. , 27,
  46. Offset(0x5C), // Stolen Memory Base Address
  47. GSTM, 32,
  48. Offset(0xE0), // Reg 0xE8, SWSCI control register
  49. GSSE, 1, // Graphics SCI event (1=event pending)
  50. GSSB, 14, // Graphics SCI scratchpad bits
  51. GSES, 1, // Graphics event select (1=SCI)
  52. Offset(0xE4),
  53. ASLE, 8, // Reg 0xE4, ASLE interrupt register
  54. , 24, // Only use first byte of ASLE reg
  55. Offset(0xFC),
  56. ASLS, 32, // Reg 0xFC, Address of the IGD OpRegion
  57. }
  58. Method (MCHK, 0, Serialized)
  59. {
  60. If (LNotEqual (MADR, 0xFFFFFFFF))
  61. {
  62. OperationRegion(IGMM,SystemMemory,MADR,0x3000)
  63. Field(IGMM,AnyAcc, NoLock, Preserve)
  64. {
  65. Offset(0X20C8),
  66. , 4,
  67. DCFE, 4, // DISPLAY_CLOCK_FREQUENCY_ENCODING
  68. }
  69. }
  70. }
  71. // Define an OperationRegion to cover the IGD OpRegion layout.
  72. OperationRegion(IGDM, SystemMemory, ASLB, 0x2000)
  73. Field(IGDM, AnyAcc, NoLock, Preserve)
  74. {
  75. // OpRegion Header
  76. SIGN, 128, // Signature-"IntelGraphicsMem"
  77. SIZE, 32, // OpRegion Size
  78. OVER, 32, // OpRegion Version
  79. SVER, 256, // System BIOS Version
  80. VVER, 128, // VBIOS Version
  81. GVER, 128, // Driver version
  82. MBOX, 32, // Mailboxes supported
  83. DMOD, 32, // Driver Model
  84. PCON, 32, // 96, Platform Configuration
  85. // OpRegion Mailbox 1 (Public ACPI Methods)
  86. // Note: Mailbox 1 is normally reserved for desktop platforms.
  87. Offset(0x100),
  88. DRDY, 32, // Driver readiness (ACPI notification)
  89. CSTS, 32, // Notification status
  90. CEVT, 32, // Current event
  91. Offset(0x120),
  92. DIDL, 32, // Supported display device ID list
  93. DDL2, 32, // Allows for 8 devices
  94. DDL3, 32,
  95. DDL4, 32,
  96. DDL5, 32,
  97. DDL6, 32,
  98. DDL7, 32,
  99. DDL8, 32,
  100. CPDL, 32, // Currently present display list
  101. CPL2, 32, // Allows for 8 devices
  102. CPL3, 32,
  103. CPL4, 32,
  104. CPL5, 32,
  105. CPL6, 32,
  106. CPL7, 32,
  107. CPL8, 32,
  108. CAD1, 32, // Currently active display list
  109. CAL2, 32, // Allows for 8 devices
  110. CAL3, 32,
  111. CAL4, 32,
  112. CAL5, 32,
  113. CAL6, 32,
  114. CAL7, 32,
  115. CAL8, 32,
  116. NADL, 32, // Next active display list
  117. NDL2, 32, // Allows for 8 devices
  118. NDL3, 32,
  119. NDL4, 32,
  120. NDL5, 32,
  121. NDL6, 32,
  122. NDL7, 32,
  123. NDL8, 32,
  124. ASLP, 32, // ASL sleep timeout
  125. TIDX, 32, // Toggle table index
  126. CHPD, 32, // Current hot plug enable indicator
  127. CLID, 32, // Current lid state indicator
  128. CDCK, 32, // Current docking state indicator
  129. SXSW, 32, // Display switch notify on resume
  130. EVTS, 32, // Events supported by ASL (diag only)
  131. CNOT, 32, // Current OS notifications (diag only)
  132. NRDY, 32,
  133. // OpRegion Mailbox 2 (Software SCI Interface)
  134. Offset(0x200), // SCIC
  135. SCIE, 1, // SCI entry bit (1=call unserviced)
  136. GEFC, 4, // Entry function code
  137. GXFC, 3, // Exit result
  138. GESF, 8, // Entry/exit sub-function/parameter
  139. , 16, // SCIC[31:16] reserved
  140. Offset(0x204), // PARM
  141. PARM, 32, // PARM register (extra parameters)
  142. DSLP, 32, // Driver sleep time out
  143. // OpRegion Mailbox 3 (BIOS to Driver Notification)
  144. // Note: Mailbox 3 is normally reserved for desktop platforms.
  145. Offset(0x300),
  146. ARDY, 32, // Driver readiness (power conservation)
  147. ASLC, 32, // ASLE interrupt command/status
  148. TCHE, 32, // Technology enabled indicator
  149. ALSI, 32, // Current ALS illuminance reading
  150. BCLP, 32, // Backlight brightness
  151. PFIT, 32, // Panel fitting state or request
  152. CBLV, 32, // Current brightness level
  153. BCLM, 320, // Backlight brightness level duty cycle mapping table
  154. CPFM, 32, // Current panel fitting mode
  155. EPFM, 32, // Enabled panel fitting modes
  156. PLUT, 592, // Optional. 74-byte Panel LUT Table
  157. PFMB, 32, // Optional. PWM Frequency and Minimum Brightness
  158. CCDV, 32, // Optional. Gamma, Brightness, Contrast values.
  159. PCFT, 32, // Optional. Power Conservation Features
  160. Offset(0x3B6),
  161. STAT, 32, // Status register
  162. // OpRegion Mailbox 4 (VBT)
  163. Offset(0x400),
  164. GVD1, 0xC000, // 6K bytes maximum VBT image
  165. // OpRegion Mailbox 5 (BIOS to Driver Notification Extension)
  166. Offset(0x1C00),
  167. PHED, 32, // Panel Header
  168. BDDC, 2048, // Panel EDID (Max 256 bytes)
  169. }
  170. // Convert boot display type into a port mask.
  171. Name (DBTB, Package()
  172. {
  173. 0x0000, // Automatic
  174. 0x0007, // Port-0 : Integrated CRT
  175. 0x0038, // Port-1 : DVO-A, or Integrated LVDS
  176. 0x01C0, // Port-2 : SDVO-B, or SDVO-B/C
  177. 0x0E00, // Port-3 : SDVO-C
  178. 0x003F, // [CRT + DVO-A / Integrated LVDS]
  179. 0x01C7, // [CRT + SDVO-B] or [CRT + SDVO-B/C]
  180. 0x0E07, // [CRT + SDVO-C]
  181. 0x01F8, // [DVO-A / Integrated LVDS + SDVO-B]
  182. 0x0E38, // [DVO-A / Integrated LVDS + SDVO-C]
  183. 0x0FC0, // [SDVO-B + SDVO-C]
  184. 0x0000, // Reserved
  185. 0x0000, // Reserved
  186. 0x0000, // Reserved
  187. 0x0000, // Reserved
  188. 0x0000, // Reserved
  189. 0x7000, // Port-4: Integrated TV
  190. 0x7007, // [Integrated TV + CRT]
  191. 0x7038, // [Integrated TV + LVDS]
  192. 0x71C0, // [Integrated TV + DVOB]
  193. 0x7E00 // [Integrated TV + DVOC]
  194. })
  195. // Core display clock value table.
  196. Name (CDCT, Package()
  197. {
  198. Package() {160},
  199. Package() {200},
  200. Package() {267},
  201. Package() {320},
  202. Package() {356},
  203. Package() {400},
  204. })
  205. // Defined exit result values:
  206. Name (SUCC, 1) // Exit result: Success
  207. Name (NVLD, 2) // Exit result: Invalid parameter
  208. Name (CRIT, 4) // Exit result: Critical failure
  209. Name (NCRT, 6) // Exit result: Non-critical failure
  210. /************************************************************************;
  211. ;*
  212. ;* Name: GSCI
  213. ;*
  214. ;* Description: Handles an SCI generated by the graphics driver. The
  215. ;* PARM and SCIC input fields are parsed to determine the
  216. ;* functionality requested by the driver. GBDA or SBCB
  217. ;* is called based on the input data in SCIC.
  218. ;*
  219. ;* Usage: The method must be called in response to a GPE 06 event
  220. ;* which will be generated by the graphics driver.
  221. ;* Ex: Method(\_GPE._L06) {Return(\_SB.PCI0.GFX0.GSCI())}
  222. ;*
  223. ;* Input: PARM and SCIC are indirect inputs
  224. ;*
  225. ;* Output: PARM and SIC are indirect outputs
  226. ;*
  227. ;* References: GBDA (Get BIOS Data method), SBCB (System BIOS Callback
  228. ;* method)
  229. ;*
  230. ;************************************************************************/
  231. Method (GSCI, 0, Serialized)
  232. {
  233. Include("IgdOGBDA.ASL") // "Get BIOS Data" Functions
  234. Include("IgdOSBCB.ASL") // "System BIOS CallBacks"
  235. If (LEqual(GEFC, 4))
  236. {
  237. Store(GBDA(), GXFC) // Process Get BIOS Data functions
  238. }
  239. If (LEqual(GEFC, 6))
  240. {
  241. Store(SBCB(), GXFC) // Process BIOS Callback functions
  242. }
  243. Store(0, GEFC) // Wipe out the entry function code
  244. Store(1, SCIS) // Clear the GUNIT SCI status bit in PCH ACPI I/O space.
  245. Store(0, GSSE) // Clear the SCI generation bit in PCI space.
  246. Store(0, SCIE) // Clr SCI serviced bit to signal completion
  247. Return(Zero)
  248. }
  249. // Include MOBLFEAT.ASL for mobile systems only. Remove for desktop.
  250. Include("IgdOMOBF.ASL") // IGD SCI mobile features