IgdOSBCB.ASL 7.5 KB

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  1. /*++
  2. Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. Module Name:
  5. IgdOSBCB.ASL
  6. Abstract:
  7. IGD OpRegion/Software SCI Reference Code for the Baytrail Family.
  8. This file contains the system BIOS call back functionality for the
  9. OpRegion/Software SCI mechanism.
  10. --*/
  11. Method (SBCB, 0, Serialized)
  12. {
  13. // Supported Callbacks: Sub-function 0
  14. If (LEqual(GESF, 0x0))
  15. {
  16. //<TODO> An OEM may support the driver->SBIOS status callbacks, but
  17. // the supported callbacks value must be modified. The code that is
  18. // executed upon reception of the callbacks must be also be updated
  19. // to perform the desired functionality.
  20. Store(0x00000000, PARM) // No callbacks supported
  21. If(LEqual(PFLV,FMBL))
  22. {
  23. Store(0x000F87FD, PARM) // Mobile
  24. }
  25. If(LEqual(PFLV,FDTP))
  26. {
  27. Store(0x000F87BD, PARM) // Desktop
  28. }
  29. Store(Zero, GESF) // Clear the exit parameter
  30. Return(SUCC) // "Success"
  31. }
  32. // BIOS POST Completion: Sub-function 1
  33. If (LEqual(GESF, 1))
  34. {
  35. Store(Zero, GESF) // Clear the exit parameter
  36. Store(Zero, PARM)
  37. Return(SUCC) // Not supported, but no failure
  38. }
  39. // Pre-Hires Set Mode: Sub-function 3
  40. If (LEqual(GESF, 3))
  41. {
  42. Store(Zero, GESF) // Clear the exit parameter
  43. Store(Zero, PARM)
  44. Return(SUCC) // Not supported, but no failure
  45. }
  46. // Post-Hires Set Mode: Sub-function 4
  47. If (LEqual(GESF, 4))
  48. {
  49. Store(Zero, GESF) // Clear the exit parameter
  50. Store(Zero, PARM)
  51. Return(SUCC) // Not supported, but no failure
  52. }
  53. // Display Switch: Sub-function 5
  54. If (LEqual(GESF, 5))
  55. {
  56. Store(Zero, GESF) // Clear the exit parameter
  57. Store(Zero, PARM)
  58. Return(SUCC) // Not supported, but no failure
  59. }
  60. // Set TV format: Sub-function 6
  61. If (LEqual(GESF, 6))
  62. {
  63. //<TODO> If implemented, the input values must be saved into
  64. // non-volatile storage for parsing during the next boot. The
  65. // following Sample code is Intel validated implementation.
  66. Store(And(PARM, 0x0F), ITVF)
  67. Store(ShiftRight(And(PARM, 0xF0), 4), ITVM)
  68. Store(Zero, GESF) // Clear the exit parameter
  69. Store(Zero, PARM)
  70. Return(SUCC)
  71. }
  72. // Adapter Power State: Sub-function 7
  73. If (LEqual(GESF, 7))
  74. {
  75. // Upon notification from driver that the Adapter Power State = D0,
  76. // check if previous lid event failed. If it did, retry the lid
  77. // event here.
  78. If(LEqual(PARM, 0))
  79. {
  80. Store(CLID, Local0)
  81. If(And(0x80000000,Local0))
  82. {
  83. And(CLID, 0x0000000F, CLID)
  84. GLID(CLID)
  85. }
  86. }
  87. Store(Zero, GESF) // Clear the exit parameter
  88. Store(Zero, PARM)
  89. Return(SUCC) // Not supported, but no failure
  90. }
  91. // Display Power State: Sub-function 8
  92. If (LEqual(GESF, 8))
  93. {
  94. Store(Zero, GESF) // Clear the exit parameter
  95. Store(Zero, PARM)
  96. Return(SUCC) // Not supported, but no failure
  97. }
  98. // Set Boot Display: Sub-function 9
  99. If (LEqual(GESF, 9))
  100. {
  101. //<TODO> An OEM may elect to implement this method. In that case,
  102. // the input values must be saved into non-volatile storage for
  103. // parsing during the next boot. The following Sample code is Intel
  104. // validated implementation.
  105. And(PARM, 0xFF, IBTT) // Save the boot display to NVS
  106. Store(Zero, GESF) // Clear the exit parameter
  107. Store(Zero, PARM)
  108. Return(SUCC) // Reserved, "Critical failure"
  109. }
  110. // Set Panel Details: Sub-function 10 (0Ah)
  111. If (LEqual(GESF, 10))
  112. {
  113. //<TODO> An OEM may elect to implement this method. In that case,
  114. // the input values must be saved into non-volatile storage for
  115. // parsing during the next boot. The following Sample code is Intel
  116. // validated implementation.
  117. // Set the panel-related NVRAM variables based the input from the driver.
  118. And(PARM, 0xFF, IPSC)
  119. // Change panel type if a change is requested by the driver (Change if
  120. // panel type input is non-zero). Zero=No change requested.
  121. If(And(ShiftRight(PARM, 8), 0xFF))
  122. {
  123. And(ShiftRight(PARM, 8), 0xFF, IPAT)
  124. Decrement(IPAT) // 0 = no change, so fit to CMOS map
  125. }
  126. And(ShiftRight(PARM, 18), 0x3, IBLC)
  127. And(ShiftRight(PARM, 20), 0x7, IBIA)
  128. Store(Zero, GESF) // Clear the exit parameter
  129. Store(Zero, PARM)
  130. Return(SUCC) // Success
  131. }
  132. // Set Internal Graphics: Sub-function 11 (0Bh)
  133. If (LEqual(GESF, 11))
  134. {
  135. //<TODO> An OEM may elect to implement this method. In that case,
  136. // the input values must be saved into non-volatile storage for
  137. // parsing during the next boot. The following Sample code is Intel
  138. // validated implementation.
  139. And(ShiftRight(PARM, 1), 1, IF1E) // Program the function 1 option
  140. // Fixed memory/DVMT memory
  141. And(ShiftRight(PARM, 17), 0xF, IDMS) // Program DVMT/fixed memory size
  142. Store(Zero, GESF) // Clear the exit parameter
  143. Store(Zero, PARM)
  144. Return(SUCC) // Success
  145. }
  146. // Post-Hires to DOS FS: Sub-function 16 (10h)
  147. If (LEqual(GESF, 16))
  148. {
  149. Store(Zero, GESF) // Clear the exit parameter
  150. Store(Zero, PARM)
  151. Return(SUCC) // Not supported, but no failure
  152. }
  153. // APM Complete: Sub-function 17 (11h)
  154. If (LEqual(GESF, 17))
  155. {
  156. Store(ShiftLeft(LIDS, 8), PARM) // Report the lid state
  157. Add(PARM, 0x100, PARM) // Adjust the lid state, 0 = Unknown
  158. Store(Zero, GESF) // Clear the exit parameter
  159. Return(SUCC) // Not supported, but no failure
  160. }
  161. // Set Spread Spectrum Clocks: Sub-function 18 (12h)
  162. If (LEqual(GESF, 18))
  163. {
  164. //<TODO> An OEM may elect to implement this method. In that case,
  165. // the input values must be saved into non-volatile storage for
  166. // parsing during the next boot. The following Sample code is Intel
  167. // validated implementation.
  168. If(And(PARM, 1))
  169. {
  170. If(LEqual(ShiftRight(PARM, 1), 1))
  171. {
  172. Store(1, ISSC) // Enable HW SSC, only for clock 1
  173. }
  174. Else
  175. {
  176. Store(Zero, GESF)
  177. Return(CRIT) // Failure, as the SSC clock must be 1
  178. }
  179. }
  180. Else
  181. {
  182. Store(0, ISSC) // Disable SSC
  183. }
  184. Store(Zero, GESF) // Clear the exit parameter
  185. Store(Zero, PARM)
  186. Return(SUCC) // Success
  187. }
  188. // Post VBE/PM Callback: Sub-function 19 (13h)
  189. If (LEqual(GESF, 19))
  190. {
  191. Store(Zero, GESF) // Clear the exit parameter
  192. Store(Zero, PARM)
  193. Return(SUCC) // Not supported, but no failure
  194. }
  195. // Set PAVP Data: Sub-function 20 (14h)
  196. If (LEqual(GESF, 20))
  197. {
  198. And(PARM, 0xF, PAVP) // Store PAVP info
  199. Store(Zero, GESF) // Clear the exit parameter
  200. Store(Zero, PARM)
  201. Return(SUCC) // Success
  202. }
  203. // A call to a reserved "System BIOS callbacks" function was received
  204. Store(Zero, GESF) // Clear the exit parameter
  205. Return(SUCC) // Reserved, "Critical failure"
  206. }