PlatformPkgGcc.fdf 33 KB

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  1. #/** @file
  2. # FDF file of Platform.
  3. #
  4. # Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
  5. #
  6. # SPDX-License-Identifier: BSD-2-Clause-Patent
  7. #
  8. #
  9. #**/
  10. [Defines]
  11. DEFINE FLASH_BASE = 0xFF800000 #The base address of the 8Mb FLASH Device.
  12. DEFINE FLASH_SIZE = 0x00800000 #The flash size in bytes of the 8Mb FLASH Device.
  13. DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 8Mb FLASH Device.
  14. DEFINE FLASH_NUM_BLOCKS = 0x800 #The number of blocks in 8Mb FLASH Device.
  15. DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00400000
  16. DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
  17. DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
  18. DEFINE FLASH_REGION_VPD_OFFSET = 0x00440000
  19. DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
  20. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0047E000
  21. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
  22. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00480000
  23. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
  24. DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00510000
  25. DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00210000
  26. DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00720000
  27. DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00070000
  28. DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00790000
  29. DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
  30. ################################################################################
  31. #
  32. # FD Section
  33. # The [FD] Section is made up of the definition statements and a
  34. # description of what goes into the Flash Device Image. Each FD section
  35. # defines one flash "device" image. A flash device image may be one of
  36. # the following: Removable media bootable image (like a boot floppy
  37. # image,) an Option ROM image (that would be "flashed" into an add-in
  38. # card,) a System "Flash" image (that would be burned into a system's
  39. # flash) or an Update ("Capsule") image that will be used to update and
  40. # existing system flash.
  41. #
  42. ################################################################################
  43. [FD.Vlv]
  44. BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
  45. Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
  46. ErasePolarity = 1
  47. BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
  48. NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
  49. #
  50. #Flash location override based on actual flash map
  51. #
  52. SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)
  53. SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE)
  54. SET gPlatformModuleTokenSpaceGuid.PcdBiosRomBase = $(FLASH_BASE)
  55. SET gPlatformModuleTokenSpaceGuid.PcdBiosRomSize = $(FLASH_SIZE)
  56. SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
  57. SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
  58. ################################################################################
  59. #
  60. # Following are lists of FD Region layout which correspond to the locations of different
  61. # images within the flash device.
  62. #
  63. # Regions must be defined in ascending order and may not overlap.
  64. #
  65. # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
  66. # the pipe "|" character, followed by the size of the region, also in hex with the leading
  67. # "0x" characters. Like:
  68. # Offset|Size
  69. # PcdOffsetCName|PcdSizeCName
  70. # RegionType <FV, DATA, or FILE>
  71. # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
  72. #
  73. ################################################################################
  74. #
  75. # IFWI Header
  76. #
  77. 0x0000|0x1000
  78. FILE=Vlv2TbltDevicePkg/Stitch/IFWIHeader/IFWI_HEADER.bin
  79. #
  80. # CPU Microcodes
  81. #
  82. $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
  83. gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
  84. FV = MICROCODE_FV
  85. $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
  86. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
  87. FILE = Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
  88. $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
  89. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
  90. FILE = Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
  91. $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
  92. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
  93. FILE = Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
  94. #
  95. # Main Block
  96. #
  97. $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
  98. gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
  99. FV = FVMAIN_COMPACT
  100. #
  101. # FV Recovery#2
  102. #
  103. $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
  104. gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
  105. FV = FVRECOVERY2
  106. #
  107. # FV Recovery
  108. #
  109. $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
  110. gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
  111. FV = FVRECOVERY
  112. ################################################################################
  113. #
  114. # FV Section
  115. #
  116. # [FV] section is used to define what components or modules are placed within a flash
  117. # device file. This section also defines order the components and modules are positioned
  118. # within the image. The [FV] section consists of define statements, set statements and
  119. # module statements.
  120. #
  121. ################################################################################
  122. [FV.MICROCODE_FV]
  123. BlockSize = $(FLASH_BLOCK_SIZE)
  124. FvAlignment = 16
  125. ERASE_POLARITY = 1
  126. MEMORY_MAPPED = TRUE
  127. STICKY_WRITE = TRUE
  128. LOCK_CAP = TRUE
  129. LOCK_STATUS = FALSE
  130. WRITE_DISABLED_CAP = TRUE
  131. WRITE_ENABLED_CAP = TRUE
  132. WRITE_STATUS = TRUE
  133. WRITE_LOCK_CAP = TRUE
  134. WRITE_LOCK_STATUS = TRUE
  135. READ_DISABLED_CAP = TRUE
  136. READ_ENABLED_CAP = TRUE
  137. READ_STATUS = TRUE
  138. READ_LOCK_CAP = TRUE
  139. READ_LOCK_STATUS = TRUE
  140. FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
  141. $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
  142. }
  143. !if $(RECOVERY_ENABLE)
  144. [FV.FVRECOVERY_COMPONENTS]
  145. FvAlignment = 16 #FV alignment and FV attributes setting.
  146. ERASE_POLARITY = 1
  147. MEMORY_MAPPED = TRUE
  148. STICKY_WRITE = TRUE
  149. LOCK_CAP = TRUE
  150. LOCK_STATUS = TRUE
  151. WRITE_DISABLED_CAP = TRUE
  152. WRITE_ENABLED_CAP = TRUE
  153. WRITE_STATUS = TRUE
  154. WRITE_LOCK_CAP = TRUE
  155. WRITE_LOCK_STATUS = TRUE
  156. READ_DISABLED_CAP = TRUE
  157. READ_ENABLED_CAP = TRUE
  158. READ_STATUS = TRUE
  159. READ_LOCK_CAP = TRUE
  160. READ_LOCK_STATUS = TRUE
  161. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
  162. INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
  163. INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
  164. INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
  165. INF FatPkg/FatPei/FatPei.inf
  166. INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
  167. INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
  168. !endif
  169. ################################################################################
  170. #
  171. # FV Section
  172. #
  173. # [FV] section is used to define what components or modules are placed within a flash
  174. # device file. This section also defines order the components and modules are positioned
  175. # within the image. The [FV] section consists of define statements, set statements and
  176. # module statements.
  177. #
  178. ################################################################################
  179. [FV.FVRECOVERY2]
  180. BlockSize = $(FLASH_BLOCK_SIZE)
  181. FvAlignment = 16 #FV alignment and FV attributes setting.
  182. ERASE_POLARITY = 1
  183. MEMORY_MAPPED = TRUE
  184. STICKY_WRITE = TRUE
  185. LOCK_CAP = TRUE
  186. LOCK_STATUS = TRUE
  187. WRITE_DISABLED_CAP = TRUE
  188. WRITE_ENABLED_CAP = TRUE
  189. WRITE_STATUS = TRUE
  190. WRITE_LOCK_CAP = TRUE
  191. WRITE_LOCK_STATUS = TRUE
  192. READ_DISABLED_CAP = TRUE
  193. READ_ENABLED_CAP = TRUE
  194. READ_STATUS = TRUE
  195. READ_LOCK_CAP = TRUE
  196. READ_LOCK_STATUS = TRUE
  197. FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
  198. INF Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
  199. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
  200. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
  201. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
  202. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
  203. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
  204. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
  205. INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
  206. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
  207. !if $(TPM_ENABLED) == TRUE
  208. INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
  209. INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
  210. INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
  211. !endif
  212. INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
  213. !if $(ACPI50_ENABLE) == TRUE
  214. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
  215. !endif
  216. !if $(PERFORMANCE_ENABLE) == TRUE
  217. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
  218. !endif
  219. !if $(RECOVERY_ENABLE)
  220. FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
  221. SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
  222. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
  223. SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
  224. }
  225. }
  226. !endif
  227. [FV.FVRECOVERY]
  228. BlockSize = $(FLASH_BLOCK_SIZE)
  229. FvAlignment = 16 #FV alignment and FV attributes setting.
  230. ERASE_POLARITY = 1
  231. MEMORY_MAPPED = TRUE
  232. STICKY_WRITE = TRUE
  233. LOCK_CAP = TRUE
  234. LOCK_STATUS = TRUE
  235. WRITE_DISABLED_CAP = TRUE
  236. WRITE_ENABLED_CAP = TRUE
  237. WRITE_STATUS = TRUE
  238. WRITE_LOCK_CAP = TRUE
  239. WRITE_LOCK_STATUS = TRUE
  240. READ_DISABLED_CAP = TRUE
  241. READ_ENABLED_CAP = TRUE
  242. READ_STATUS = TRUE
  243. READ_LOCK_CAP = TRUE
  244. READ_LOCK_STATUS = TRUE
  245. FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
  246. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
  247. INF MdeModulePkg/Core/Pei/PeiMain.inf
  248. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
  249. INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
  250. INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
  251. INF Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf
  252. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
  253. !if $(SOURCE_DEBUG_ENABLE) == TRUE
  254. INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
  255. !endif
  256. !if $(CAPSULE_ENABLE) == TRUE
  257. INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
  258. !if $(DXE_ARCHITECTURE) == "X64"
  259. INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
  260. !endif
  261. !endif
  262. !if $(PCIESC_ENABLE) == TRUE
  263. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
  264. !endif
  265. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
  266. INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  267. [FV.FVMAIN]
  268. BlockSize = $(FLASH_BLOCK_SIZE)
  269. FvAlignment = 16
  270. ERASE_POLARITY = 1
  271. MEMORY_MAPPED = TRUE
  272. STICKY_WRITE = TRUE
  273. LOCK_CAP = TRUE
  274. LOCK_STATUS = TRUE
  275. WRITE_DISABLED_CAP = TRUE
  276. WRITE_ENABLED_CAP = TRUE
  277. WRITE_STATUS = TRUE
  278. WRITE_LOCK_CAP = TRUE
  279. WRITE_LOCK_STATUS = TRUE
  280. READ_DISABLED_CAP = TRUE
  281. READ_ENABLED_CAP = TRUE
  282. READ_STATUS = TRUE
  283. READ_LOCK_CAP = TRUE
  284. READ_LOCK_STATUS = TRUE
  285. FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
  286. APRIORI DXE {
  287. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  288. INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
  289. INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
  290. }
  291. #
  292. # EDK II Related Platform codes
  293. #
  294. INF MdeModulePkg/Core/Dxe/DxeMain.inf
  295. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  296. !if $(ACPI50_ENABLE) == TRUE
  297. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
  298. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
  299. !endif
  300. INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
  301. INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
  302. INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
  303. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
  304. INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
  305. INF UefiCpuPkg/CpuDxe/CpuDxe.inf
  306. INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
  307. INF MdeModulePkg/Universal/Metronome/Metronome.inf
  308. INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
  309. INF MdeModulePkg/Logo/LogoDxe.inf
  310. INF MdeModulePkg/Application/UiApp/UiApp.inf
  311. INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
  312. INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
  313. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
  314. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
  315. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
  316. INF Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbSmm.inf
  317. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
  318. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
  319. !if $(SECURE_BOOT_ENABLE)
  320. INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
  321. !endif
  322. INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
  323. INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
  324. INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
  325. INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
  326. INF Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbRuntimeDxe.inf
  327. INF Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
  328. INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
  329. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
  330. #
  331. # EDK II Related Silicon codes
  332. #
  333. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
  334. INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
  335. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
  336. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
  337. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
  338. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
  339. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitSmm.inf
  340. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
  341. !if $(PCIESC_ENABLE) == TRUE
  342. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
  343. !endif
  344. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
  345. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
  346. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
  347. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
  348. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
  349. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
  350. !if $(TPM_ENABLED) == TRUE
  351. INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
  352. INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
  353. INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
  354. !endif
  355. #
  356. # EDK II Related Platform codes
  357. #
  358. INF Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf
  359. INF Vlv2TbltDevicePkg/PlatformInfoDxe/PlatformInfoDxe.inf
  360. INF Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
  361. INF Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf
  362. INF Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf
  363. INF Vlv2TbltDevicePkg/SaveMemoryConfig/SaveMemoryConfig.inf
  364. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
  365. INF Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf
  366. !if $(GOP_DRIVER_ENABLE) == TRUE
  367. INF Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGopPolicy.inf
  368. FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
  369. SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
  370. SECTION PE32 = Vlv2SocBinPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
  371. SECTION UI = "IntelGopDriver"
  372. }
  373. !endif
  374. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
  375. #
  376. # SMM
  377. #
  378. INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
  379. INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
  380. INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
  381. INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
  382. INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
  383. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
  384. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
  385. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
  386. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/GraphicDxeInitSmm.inf
  387. #
  388. # ACPI
  389. #
  390. INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
  391. INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
  392. INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
  393. INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
  394. INF RuleOverride = ACPITABLE Vlv2DeviceRefCodePkg/AcpiTablesPCAT/AcpiTables.inf
  395. INF Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf
  396. INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
  397. #
  398. # PCI
  399. #
  400. INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
  401. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
  402. #
  403. # ISA
  404. #
  405. INF Vlv2TbltDevicePkg/PcuSio/PcuSio.inf
  406. !if $(SOURCE_DEBUG_ENABLE) != TRUE
  407. INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
  408. !endif
  409. #
  410. # IDE/SCSI/AHCI
  411. #
  412. INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
  413. INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
  414. INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
  415. !if $(SATA_ENABLE) == TRUE
  416. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
  417. #
  418. #
  419. INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
  420. INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
  421. !if $(SCSI_ENABLE) == TRUE
  422. INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
  423. INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
  424. !endif
  425. #
  426. !endif
  427. # Console
  428. #
  429. INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
  430. INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
  431. INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
  432. INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
  433. INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
  434. INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
  435. INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
  436. #
  437. # USB
  438. #
  439. !if $(USB_ENABLE) == TRUE
  440. INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
  441. INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
  442. INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
  443. INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
  444. INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
  445. INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
  446. INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
  447. !endif
  448. #
  449. # SMBIOS
  450. #
  451. INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
  452. INF Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
  453. #
  454. # FAT file system
  455. #
  456. INF FatPkg/EnhancedFatDxe/Fat.inf
  457. #
  458. # UEFI Shell
  459. #
  460. INF ShellPkg/Application/Shell/Shell.inf
  461. #
  462. # dp command
  463. #
  464. !if $(PERFORMANCE_ENABLE) == TRUE
  465. INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
  466. !endif
  467. !if $(GOP_DRIVER_ENABLE) == TRUE
  468. FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
  469. SECTION RAW = Vlv2SocBinPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
  470. SECTION UI = "IntelGopVbt"
  471. }
  472. !endif
  473. #
  474. # Network Modules
  475. #
  476. !include NetworkPkg/Network.fdf.inc
  477. !if $(NETWORK_ENABLE) == TRUE
  478. FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
  479. SECTION PE32 = Vlv2SocBinPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
  480. SECTION UI = "RtkUndiDxe"
  481. }
  482. !if $(DXE_ARCHITECTURE) == "X64"
  483. FILE DRIVER = 7C7467E9-8BB3-4BF1-8694-6FED7D25D13E {
  484. SECTION PE32 = Vlv2SocBinPkg/UNDI/I211PcieUndiDxe/$(DXE_ARCHITECTURE)/E7006X3.EFI
  485. SECTION UI = "E7006X3"
  486. }
  487. !endif
  488. !endif
  489. !if $(CAPSULE_ENABLE)
  490. INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
  491. #
  492. # Minnow Max System Firmware FMP
  493. #
  494. INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf
  495. #
  496. # Sample Device FMP
  497. #
  498. INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  499. INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  500. INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  501. !endif
  502. !if $(MICOCODE_CAPSULE_ENABLE)
  503. INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
  504. !endif
  505. !if $(RECOVERY_ENABLE)
  506. FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
  507. SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
  508. SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
  509. }
  510. !endif
  511. [FV.FVMAIN_COMPACT]
  512. BlockSize = $(FLASH_BLOCK_SIZE)
  513. FvAlignment = 16
  514. ERASE_POLARITY = 1
  515. MEMORY_MAPPED = TRUE
  516. STICKY_WRITE = TRUE
  517. LOCK_CAP = TRUE
  518. LOCK_STATUS = TRUE
  519. WRITE_DISABLED_CAP = TRUE
  520. WRITE_ENABLED_CAP = TRUE
  521. WRITE_STATUS = TRUE
  522. WRITE_LOCK_CAP = TRUE
  523. WRITE_LOCK_STATUS = TRUE
  524. READ_DISABLED_CAP = TRUE
  525. READ_ENABLED_CAP = TRUE
  526. READ_STATUS = TRUE
  527. READ_LOCK_CAP = TRUE
  528. READ_LOCK_STATUS = TRUE
  529. FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
  530. !if $(LZMA_ENABLE) == TRUE
  531. # LZMA Compress
  532. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
  533. SECTION FV_IMAGE = FVMAIN
  534. }
  535. !else
  536. !if $(DXE_COMPRESS_ENABLE) == TRUE
  537. # Tiano Compress
  538. SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
  539. SECTION FV_IMAGE = FVMAIN
  540. }
  541. !else
  542. # No Compress
  543. SECTION COMPRESS PI_NONE {
  544. SECTION FV_IMAGE = FVMAIN
  545. }
  546. !endif
  547. !endif
  548. }
  549. [FV.SETUP_DATA]
  550. BlockSize = $(FLASH_BLOCK_SIZE)
  551. #NumBlocks = 0x10
  552. FvAlignment = 16
  553. ERASE_POLARITY = 1
  554. MEMORY_MAPPED = TRUE
  555. STICKY_WRITE = TRUE
  556. LOCK_CAP = TRUE
  557. LOCK_STATUS = TRUE
  558. WRITE_DISABLED_CAP = TRUE
  559. WRITE_ENABLED_CAP = TRUE
  560. WRITE_STATUS = TRUE
  561. WRITE_LOCK_CAP = TRUE
  562. WRITE_LOCK_STATUS = TRUE
  563. READ_DISABLED_CAP = TRUE
  564. READ_ENABLED_CAP = TRUE
  565. READ_STATUS = TRUE
  566. READ_LOCK_CAP = TRUE
  567. READ_LOCK_STATUS = TRUE
  568. ################################################################################
  569. #
  570. # Rules are use with the [FV] section's module INF type to define
  571. # how an FFS file is created for a given INF file. The following Rule are the default
  572. # rules for the different module type. User can add the customized rules to define the
  573. # content of the FFS file.
  574. #
  575. ################################################################################
  576. [Rule.Common.SEC]
  577. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
  578. PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
  579. RAW BIN Align = 16 |.com
  580. }
  581. [Rule.Common.SEC.BINARY]
  582. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
  583. PE32 PE32 Align = 8 |.efi
  584. RAW BIN Align = 16 |.com
  585. }
  586. [Rule.Common.PEI_CORE]
  587. FILE PEI_CORE = $(NAMED_GUID) {
  588. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  589. UI STRING="$(MODULE_NAME)" Optional
  590. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  591. }
  592. [Rule.Common.PEIM]
  593. FILE PEIM = $(NAMED_GUID) {
  594. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  595. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  596. UI STRING="$(MODULE_NAME)" Optional
  597. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  598. }
  599. [Rule.Common.PEIM.BINARY]
  600. FILE PEIM = $(NAMED_GUID) {
  601. PEI_DEPEX PEI_DEPEX Optional |.depex
  602. PE32 PE32 Align = Auto |.efi
  603. UI STRING="$(MODULE_NAME)" Optional
  604. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  605. }
  606. [Rule.Common.PEIM.BIOSID]
  607. FILE PEIM = $(NAMED_GUID) {
  608. RAW BIN BiosId.bin
  609. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  610. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  611. UI STRING="$(MODULE_NAME)" Optional
  612. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  613. }
  614. [Rule.Common.USER_DEFINED.APINIT]
  615. FILE RAW = $(NAMED_GUID) Fixed Align=4K {
  616. RAW SEC_BIN |.com
  617. }
  618. #cjia 2011-07-21
  619. [Rule.Common.USER_DEFINED.LEGACY16]
  620. FILE FREEFORM = $(NAMED_GUID) {
  621. UI STRING="$(MODULE_NAME)" Optional
  622. RAW BIN |.bin
  623. }
  624. #cjia
  625. [Rule.Common.USER_DEFINED.ASM16]
  626. FILE FREEFORM = $(NAMED_GUID) {
  627. UI STRING="$(MODULE_NAME)" Optional
  628. RAW BIN |.com
  629. }
  630. [Rule.Common.DXE_CORE]
  631. FILE DXE_CORE = $(NAMED_GUID) {
  632. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  633. UI STRING="$(MODULE_NAME)" Optional
  634. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  635. }
  636. [Rule.Common.UEFI_DRIVER]
  637. FILE DRIVER = $(NAMED_GUID) {
  638. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  639. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  640. UI STRING="$(MODULE_NAME)" Optional
  641. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  642. }
  643. [Rule.Common.UEFI_DRIVER.BINARY]
  644. FILE DRIVER = $(NAMED_GUID) {
  645. DXE_DEPEX DXE_DEPEX Optional |.depex
  646. PE32 PE32 |.efi
  647. UI STRING="$(MODULE_NAME)" Optional
  648. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  649. }
  650. [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
  651. FILE DRIVER = $(NAMED_GUID) {
  652. DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/Vlv2TbltDevicePkg/IntelGopDepex/IntelGopDriver.depex
  653. PE32 PE32 |.efi
  654. UI STRING="$(MODULE_NAME)" Optional
  655. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  656. }
  657. [Rule.Common.DXE_DRIVER]
  658. FILE DRIVER = $(NAMED_GUID) {
  659. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  660. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  661. UI STRING="$(MODULE_NAME)" Optional
  662. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  663. }
  664. [Rule.Common.DXE_DRIVER.BINARY]
  665. FILE DRIVER = $(NAMED_GUID) {
  666. DXE_DEPEX DXE_DEPEX Optional |.depex
  667. PE32 PE32 |.efi
  668. UI STRING="$(MODULE_NAME)" Optional
  669. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  670. }
  671. [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
  672. FILE DRIVER = $(NAMED_GUID) {
  673. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  674. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  675. UI STRING="$(MODULE_NAME)" Optional
  676. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  677. RAW ACPI Optional |.acpi
  678. RAW ASL Optional |.aml
  679. }
  680. [Rule.Common.DXE_RUNTIME_DRIVER]
  681. FILE DRIVER = $(NAMED_GUID) {
  682. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  683. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  684. UI STRING="$(MODULE_NAME)" Optional
  685. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  686. }
  687. [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
  688. FILE DRIVER = $(NAMED_GUID) {
  689. DXE_DEPEX DXE_DEPEX Optional |.depex
  690. PE32 PE32 |.efi
  691. UI STRING="$(MODULE_NAME)" Optional
  692. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  693. }
  694. [Rule.Common.DXE_SMM_DRIVER]
  695. FILE SMM = $(NAMED_GUID) {
  696. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  697. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  698. UI STRING="$(MODULE_NAME)" Optional
  699. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  700. }
  701. [Rule.Common.DXE_SMM_DRIVER.BINARY]
  702. FILE SMM = $(NAMED_GUID) {
  703. SMM_DEPEX SMM_DEPEX |.depex
  704. PE32 PE32 |.efi
  705. RAW BIN Optional |.aml
  706. UI STRING="$(MODULE_NAME)" Optional
  707. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  708. }
  709. [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
  710. FILE SMM = $(NAMED_GUID) {
  711. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  712. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  713. UI STRING="$(MODULE_NAME)" Optional
  714. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  715. RAW ACPI Optional |.acpi
  716. RAW ASL Optional |.aml
  717. }
  718. [Rule.Common.SMM_CORE]
  719. FILE SMM_CORE = $(NAMED_GUID) {
  720. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  721. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  722. UI STRING="$(MODULE_NAME)" Optional
  723. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  724. }
  725. [Rule.Common.SMM_CORE.BINARY]
  726. FILE SMM_CORE = $(NAMED_GUID) {
  727. DXE_DEPEX DXE_DEPEX Optional |.depex
  728. PE32 PE32 |.efi
  729. UI STRING="$(MODULE_NAME)" Optional
  730. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  731. }
  732. [Rule.Common.UEFI_APPLICATION]
  733. FILE APPLICATION = $(NAMED_GUID) {
  734. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  735. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  736. UI STRING="$(MODULE_NAME)" Optional
  737. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  738. }
  739. [Rule.Common.UEFI_APPLICATION.UI]
  740. FILE APPLICATION = $(NAMED_GUID) {
  741. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  742. UI STRING="Enter Setup"
  743. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  744. }
  745. [Rule.Common.USER_DEFINED]
  746. FILE FREEFORM = $(NAMED_GUID) {
  747. UI STRING="$(MODULE_NAME)" Optional
  748. RAW BIN |.bin
  749. }
  750. [Rule.Common.USER_DEFINED.BINARY]
  751. FILE FREEFORM = $(NAMED_GUID) {
  752. UI STRING="$(MODULE_NAME)" Optional
  753. RAW BIN |.bin
  754. }
  755. [Rule.Common.USER_DEFINED.ACPITABLE]
  756. FILE FREEFORM = $(NAMED_GUID) {
  757. RAW ACPI Optional |.acpi
  758. RAW ASL Optional |.aml
  759. }
  760. [Rule.Common.USER_DEFINED.ACPITABLE2]
  761. FILE FREEFORM = $(NAMED_GUID) {
  762. RAW ASL Optional |.aml
  763. }
  764. [Rule.Common.ACPITABLE]
  765. FILE FREEFORM = $(NAMED_GUID) {
  766. RAW ACPI Optional |.acpi
  767. RAW ASL Optional |.aml
  768. }
  769. [Rule.Common.PEIM.FMP_IMAGE_DESC]
  770. FILE PEIM = $(NAMED_GUID) {
  771. RAW BIN |.acpi
  772. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  773. PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
  774. UI STRING="$(MODULE_NAME)" Optional
  775. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  776. }