Platform.c 8.6 KB

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  1. /*
  2. * SPDX-License-Identifier: BSD-2-Clause
  3. *
  4. * Copyright (c) 2021 Western Digital Corporation or its affiliates.
  5. *
  6. * Authors:
  7. * Anup Patel <anup.patel@wdc.com>
  8. */
  9. #include <libfdt.h>
  10. #include <PlatformOverride.h>
  11. #include <sbi/riscv_asm.h>
  12. #include <sbi/sbi_domain.h>
  13. #include <sbi/sbi_hartmask.h>
  14. #include <sbi/sbi_platform.h>
  15. #include <sbi/sbi_string.h>
  16. #include <sbi/sbi_math.h>
  17. #include <sbi_utils/fdt/fdt_domain.h>
  18. #include <sbi_utils/fdt/fdt_fixup.h>
  19. #include <sbi_utils/fdt/fdt_helper.h>
  20. #include <sbi_utils/irqchip/fdt_irqchip.h>
  21. #include <sbi_utils/serial/fdt_serial.h>
  22. #include <sbi_utils/timer/fdt_timer.h>
  23. #include <sbi_utils/ipi/fdt_ipi.h>
  24. #include <sbi_utils/reset/fdt_reset.h>
  25. extern const struct platform_override sifive_fu540;
  26. static const struct platform_override *special_platforms[] = {
  27. &sifive_fu540,
  28. };
  29. static const struct platform_override *generic_plat = NULL;
  30. static const struct fdt_match *generic_plat_match = NULL;
  31. static void fw_platform_lookup_special(void *fdt, int root_offset)
  32. {
  33. int pos, noff;
  34. const struct platform_override *plat;
  35. const struct fdt_match *match;
  36. for (pos = 0; pos < array_size(special_platforms); pos++) {
  37. plat = special_platforms[pos];
  38. if (!plat->match_table)
  39. continue;
  40. noff = fdt_find_match(fdt, -1, plat->match_table, &match);
  41. if (noff < 0)
  42. continue;
  43. generic_plat = plat;
  44. generic_plat_match = match;
  45. break;
  46. }
  47. }
  48. extern struct sbi_platform platform;
  49. static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
  50. /*
  51. * The fw_platform_init() function is called very early on the boot HART
  52. * OpenSBI reference firmwares so that platform specific code get chance
  53. * to update "platform" instance before it is used.
  54. *
  55. * The arguments passed to fw_platform_init() function are boot time state
  56. * of A0 to A4 register. The "arg0" will be boot HART id and "arg1" will
  57. * be address of FDT passed by previous booting stage.
  58. *
  59. * The return value of fw_platform_init() function is the FDT location. If
  60. * FDT is unchanged (or FDT is modified in-place) then fw_platform_init()
  61. * can always return the original FDT location (i.e. 'arg1') unmodified.
  62. */
  63. unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
  64. unsigned long arg2, unsigned long arg3,
  65. unsigned long arg4)
  66. {
  67. const char *model;
  68. void *fdt = (void *)arg1;
  69. u32 hartid, hart_count = 0;
  70. int rc, root_offset, cpus_offset, cpu_offset, len;
  71. root_offset = fdt_path_offset(fdt, "/");
  72. if (root_offset < 0)
  73. goto fail;
  74. fw_platform_lookup_special(fdt, root_offset);
  75. model = fdt_getprop(fdt, root_offset, "model", &len);
  76. if (model)
  77. sbi_strncpy(platform.name, model, sizeof(platform.name));
  78. if (generic_plat && generic_plat->features)
  79. platform.features = generic_plat->features(generic_plat_match);
  80. cpus_offset = fdt_path_offset(fdt, "/cpus");
  81. if (cpus_offset < 0)
  82. goto fail;
  83. fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
  84. rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
  85. if (rc)
  86. continue;
  87. if (SBI_HARTMASK_MAX_BITS <= hartid)
  88. continue;
  89. generic_hart_index2id[hart_count++] = hartid;
  90. }
  91. platform.hart_count = hart_count;
  92. /* Return original FDT pointer */
  93. return arg1;
  94. fail:
  95. while (1)
  96. wfi();
  97. }
  98. static int generic_early_init(bool cold_boot)
  99. {
  100. int rc;
  101. if (generic_plat && generic_plat->early_init) {
  102. rc = generic_plat->early_init(cold_boot, generic_plat_match);
  103. if (rc)
  104. return rc;
  105. }
  106. if (!cold_boot)
  107. return 0;
  108. return fdt_reset_init();
  109. }
  110. static int generic_final_init(bool cold_boot)
  111. {
  112. void *fdt;
  113. int rc;
  114. if (generic_plat && generic_plat->final_init) {
  115. rc = generic_plat->final_init(cold_boot, generic_plat_match);
  116. if (rc)
  117. return rc;
  118. }
  119. if (!cold_boot)
  120. return 0;
  121. fdt = sbi_scratch_thishart_arg1_ptr();
  122. fdt_cpu_fixup(fdt);
  123. fdt_fixups(fdt);
  124. fdt_domain_fixup(fdt);
  125. if (generic_plat && generic_plat->fdt_fixup) {
  126. rc = generic_plat->fdt_fixup(fdt, generic_plat_match);
  127. if (rc)
  128. return rc;
  129. }
  130. return 0;
  131. }
  132. static void generic_early_exit(void)
  133. {
  134. if (generic_plat && generic_plat->early_exit)
  135. generic_plat->early_exit(generic_plat_match);
  136. }
  137. static void generic_final_exit(void)
  138. {
  139. if (generic_plat && generic_plat->final_exit)
  140. generic_plat->final_exit(generic_plat_match);
  141. }
  142. static int generic_domains_init(void)
  143. {
  144. return fdt_domains_populate(sbi_scratch_thishart_arg1_ptr());
  145. }
  146. static u64 generic_tlbr_flush_limit(void)
  147. {
  148. if (generic_plat && generic_plat->tlbr_flush_limit)
  149. return generic_plat->tlbr_flush_limit(generic_plat_match);
  150. return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
  151. }
  152. static int generic_system_reset_check(u32 reset_type, u32 reset_reason)
  153. {
  154. if (generic_plat && generic_plat->system_reset_check)
  155. return generic_plat->system_reset_check(reset_type,
  156. reset_reason,
  157. generic_plat_match);
  158. return fdt_system_reset_check(reset_type, reset_reason);
  159. }
  160. static void generic_system_reset(u32 reset_type, u32 reset_reason)
  161. {
  162. if (generic_plat && generic_plat->system_reset) {
  163. generic_plat->system_reset(reset_type, reset_reason,
  164. generic_plat_match);
  165. return;
  166. }
  167. fdt_system_reset(reset_type, reset_reason);
  168. }
  169. #define EDK2_ROOT_FW_REGION 0
  170. #define EDK2_FW_REGION 1
  171. #define EDK2_VARIABLE_REGION 2
  172. #define EDK2_ALL_REGION 3
  173. #define EDK2_END_REGION 4
  174. static struct sbi_domain_memregion root_memregs[EDK2_END_REGION + 1] = { 0 };
  175. struct sbi_domain_memregion *get_mem_regions(void) {
  176. /* EDK2 root firmware domain memory region */
  177. root_memregs[EDK2_ROOT_FW_REGION].order = log2roundup(FixedPcdGet32(PcdRootFirmwareDomainSize));
  178. root_memregs[EDK2_ROOT_FW_REGION].base = FixedPcdGet32(PcdRootFirmwareDomainBaseAddress);
  179. root_memregs[EDK2_ROOT_FW_REGION].flags = 0;
  180. /*EDK2 firmware domain memory region */
  181. root_memregs[EDK2_FW_REGION].order = log2roundup(FixedPcdGet32(PcdFirmwareDomainSize));
  182. root_memregs[EDK2_FW_REGION].base = FixedPcdGet32(PcdFirmwareDomainBaseAddress);
  183. root_memregs[EDK2_FW_REGION].flags = SBI_DOMAIN_MEMREGION_EXECUTABLE | SBI_DOMAIN_MEMREGION_READABLE;
  184. /*EDK2 firmware domain memory region */
  185. root_memregs[EDK2_VARIABLE_REGION].order = log2roundup(FixedPcdGet32(PcdVariableFirmwareRegionSize));
  186. root_memregs[EDK2_VARIABLE_REGION].base = FixedPcdGet32(PcdVariableFirmwareRegionBaseAddress);
  187. root_memregs[EDK2_VARIABLE_REGION].flags = SBI_DOMAIN_MEMREGION_READABLE | SBI_DOMAIN_MEMREGION_WRITEABLE;
  188. /* EDK2 domain allow everything memory region */
  189. root_memregs[EDK2_ALL_REGION].order = __riscv_xlen;
  190. root_memregs[EDK2_ALL_REGION].base = 0;
  191. root_memregs[EDK2_ALL_REGION].flags = (SBI_DOMAIN_MEMREGION_READABLE |
  192. SBI_DOMAIN_MEMREGION_WRITEABLE |
  193. SBI_DOMAIN_MEMREGION_EXECUTABLE);
  194. /* EDK2 domain memory region end */
  195. root_memregs[EDK2_END_REGION].order = 0;
  196. return root_memregs;
  197. }
  198. const struct sbi_platform_operations platform_ops = {
  199. .early_init = generic_early_init,
  200. .final_init = generic_final_init,
  201. .early_exit = generic_early_exit,
  202. .final_exit = generic_final_exit,
  203. .domains_root_regions = get_mem_regions,
  204. .domains_init = generic_domains_init,
  205. .console_init = fdt_serial_init,
  206. .irqchip_init = fdt_irqchip_init,
  207. .irqchip_exit = fdt_irqchip_exit,
  208. .ipi_init = fdt_ipi_init,
  209. .ipi_exit = fdt_ipi_exit,
  210. .get_tlbr_flush_limit = generic_tlbr_flush_limit,
  211. .timer_init = fdt_timer_init,
  212. .timer_exit = fdt_timer_exit,
  213. };
  214. #if FixedPcdGet32(PcdBootableHartNumber) == 4
  215. #define U540_BOOTABLE_HART_COUNT FixedPcdGet32(PcdBootableHartNumber)
  216. static u32 U540_hart_index2id[U540_BOOTABLE_HART_COUNT] = {1, 2, 3, 4};
  217. #endif
  218. struct sbi_platform platform = {
  219. .opensbi_version = OPENSBI_VERSION,
  220. .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
  221. .name = "Generic",
  222. .features = SBI_PLATFORM_DEFAULT_FEATURES,
  223. .hart_count = SBI_HARTMASK_MAX_BITS,
  224. // TODO: Workaround for U540. Not sure why we need this. OpenSBI doesn't need it.
  225. #if FixedPcdGet32(PcdBootableHartNumber) == 4
  226. .hart_index2id = U540_hart_index2id,
  227. #else
  228. .hart_index2id = generic_hart_index2id,
  229. #endif
  230. // TODO: Any reason why it shouldn't just be SBI_PLATFORM_DEFAULT_HART_STACK_SIZE?
  231. .hart_stack_size = FixedPcdGet32(PcdOpenSbiStackSize),
  232. .platform_ops_addr = (unsigned long)&platform_ops
  233. };