// SPDX-License-Identifier: GPL-2.0 OR MIT /* * Copyright (C) 2022 StarFive Technology Co., Ltd. */ /dts-v1/; #include "jh7110.dtsi" / { #address-cells = <2>; #size-cells = <2>; model = "StarFive VisionFive V2"; compatible = "starfive,jh7110"; aliases { spi0="/soc/spi@13010000"; gpio0="/soc/gpio@13040000"; ethernet0=&gmac0; ethernet1=&gmac1; mmc0=&sdio0; mmc1=&sdio1; i2c0 = &i2c5; }; chosen { stdout-path = "/soc/serial@10000000:115200"; }; memory@80000000 { device_type = "memory"; reg = <0x0 0x40000000 0x1 0x0>; }; soc { }; }; &cpu0 { status = "okay"; }; &clkgen { clocks = <&osc>, <&gmac1_rmii_refin>, <&stg_apb>, <&gmac0_rmii_refin>; clock-names = "osc", "gmac1_rmii_refin", "stg_apb", "gmac0_rmii_refin"; }; &sdio0 { fifo-depth = <32>; bus-width = <8>; status = "okay"; }; &sdio1 { fifo-depth = <32>; bus-width = <4>; status = "okay"; }; &gmac0 { status = "okay"; #address-cells = <1>; #size-cells = <0>; phy0: ethernet-phy@0 { rxc_dly_en = <1>; tx_delay_sel_fe = <5>; tx_delay_sel = <0xa>; tx_inverted_10 = <0x1>; tx_inverted_100 = <0x1>; tx_inverted_1000 = <0x1>; }; }; &gmac1 { status = "okay"; #address-cells = <1>; #size-cells = <0>; phy1: ethernet-phy@1 { tx_delay_sel_fe = <5>; tx_delay_sel = <0>; rxc_dly_en = <0>; tx_inverted_10 = <0x1>; tx_inverted_100 = <0x1>; tx_inverted_1000 = <0x0>; }; }; &gpio { compatible = "starfive,jh7110-gpio"; gpio-controller; }; &uart0 { reg-offset = <0>; current-speed = <115200>; status = "okay"; }; &i2c5 { clock-frequency = <100000>; i2c-sda-hold-time-ns = <300>; i2c-sda-falling-time-ns = <3000>; i2c-scl-falling-time-ns = <3000>; auto_calc_scl_lhcnt; status = "okay"; eeprom@50 { compatible = "atmel,24c04"; reg = <0x50>; pagesize = <16>; }; pmic: axp15060_reg@36 { compatible = "stf,axp15060-regulator"; reg = <0x36>; }; }; &gpioa { status = "disabled"; }; &usbdrd30 { status = "okay"; }; &usbdrd_cdns3 { dr_mode = "host"; }; &timer { status = "disabled"; }; &wdog { status = "disabled"; }; &clkvout { status = "disabled"; }; &pdm { status = "disabled"; };