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Platform/Sgi: Add a new PCD for defining addressable bits per chip

Add a new PCD to define the maximum number of address bits used for
addresses within a chip. The value of this PCD can be used to derive the
maximum addressable memory region for each chip and to calculate the
address space offset of a remote chip on multi-chip platform.

In preparation of adding a multi-chip variant of the RD-N2 platform,
use this new PCD to allow maximum address space of 64TB per chip for all
RD-N2 platform variants.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>
Vijayenthiran Subramaniam 2 years ago
parent
commit
e573be8e51

+ 2 - 1
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf

@@ -1,7 +1,7 @@
 ## @file
 #  ACPI table data and ASL sources required to boot the platform.
 #
-#  Copyright (c) 2020-2021, ARM Ltd. All rights reserved.
+#  Copyright (c) 2020 - 2022, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -66,6 +66,7 @@
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip
   gArmSgiTokenSpaceGuid.PcdOscLpiEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize

+ 2 - 1
Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf

@@ -1,7 +1,7 @@
 ## @file
 #  ACPI table data and ASL sources required to boot the platform.
 #
-#  Copyright (c) 2020-2021, Arm Ltd. All rights reserved.
+#  Copyright (c) 2020 - 2022, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -66,6 +66,7 @@
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip
   gArmSgiTokenSpaceGuid.PcdOscLpiEnable
   gArmSgiTokenSpaceGuid.PcdOscCppcEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress

+ 4 - 3
Platform/ARM/SgiPkg/Include/SgiPlatform.h

@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2018-2021, ARM Limited. All rights reserved.
+*  Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -54,8 +54,9 @@
 #define MULTI_CHIP_MODE_DISABLED                  0x0
 #define MULTI_CHIP_MODE_ENABLED                   0x1
 
-// Remote chip address offset (4TB per chip)
-#define SGI_REMOTE_CHIP_MEM_OFFSET(n)             ((1ULL << 42) * (n))
+// Remote chip address offset
+#define SGI_REMOTE_CHIP_MEM_OFFSET(n) \
+          ((1ULL <<  FixedPcdGet64 (PcdMaxAddressBitsPerChip)) * (n))
 
 // Base address of the DRAM1 block in a remote chip
 #define SYSTEM_MEMORY_BASE_REMOTE(ChipId) \

+ 2 - 1
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf

@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2018-2020, ARM Limited. All rights reserved.
+#  Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -41,6 +41,7 @@
   gArmPlatformTokenSpaceGuid.PcdCoreCount
   gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase
 
+  gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip
   gArmSgiTokenSpaceGuid.PcdDramBlock2Base
   gArmSgiTokenSpaceGuid.PcdDramBlock2Size
   gArmSgiTokenSpaceGuid.PcdGicSize

+ 4 - 1
Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc

@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2020 - 2022, ARM Limited. All rights reserved.
+#  Copyright (c) 2020 - 2022, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -45,6 +45,9 @@
   gArmTokenSpaceGuid.PcdPciMmio64Size|0x3000000000
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x60000000
 
+  # Address bus width - 4TB address space
+  gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip|42
+
   # Timer & Watchdog interrupts
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv|92
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv|91

+ 4 - 1
Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc

@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2020 - 2022, ARM Limited. All rights reserved.
+#  Copyright (c) 2020 - 2022, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -45,6 +45,9 @@
   gArmTokenSpaceGuid.PcdPciMmio64Size|0x4000000000
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x1010000000
 
+  # Address bus width - 64TB address space
+  gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip|46
+
   # Timer & Watchdog interrupts
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv|109
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv|108

+ 4 - 1
Platform/ARM/SgiPkg/SgiPlatform.dec

@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2018-2020, ARM Limited. All rights reserved.
+#  Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -90,5 +90,8 @@
   gArmSgiTokenSpaceGuid.PcdOscLpiEnable|0|UINT32|0x00000025
   gArmSgiTokenSpaceGuid.PcdOscCppcEnable|0|UINT32|0x00000026
 
+  # Address bus width
+  gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip|0x0|UINT64|0x00000027
+
 [Ppis]
   gNtFwConfigDtInfoPpiGuid     = { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } }