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@@ -1,61 +0,0 @@
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-/** @file
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- SoC specific Library containg functions to initialize various SoC components
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-
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- Copyright 2017-2020 NXP
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-
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- SPDX-License-Identifier: BSD-2-Clause-Patent
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-
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-**/
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-
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-#include <Base.h>
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-#ifdef CHASSIS2
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-#include <Chassis2/NxpSoc.h>
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-#elif CHASSIS3
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-#include <Chassis3/NxpSoc.h>
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-#endif
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-#include <Library/ArmSmcLib.h>
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-#include <Library/BaseLib.h>
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-#include <Library/IoAccessLib.h>
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-#include <Library/DebugLib.h>
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-#include <Library/IoLib.h>
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-#include <Library/PcdLib.h>
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-#include <Library/PrintLib.h>
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-#include <Library/SerialPortLib.h>
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-
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-#include "NxpChassis.h"
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-
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-UINT32
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-EFIAPI
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-GurRead (
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- IN UINTN Address
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- )
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-{
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- MMIO_OPERATIONS *GurOps;
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-
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- GurOps = GetMmioOperations (FixedPcdGetBool (PcdGurBigEndian));
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-
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- return GurOps->Read32 (Address);
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-}
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-
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-/*
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- * Setup SMMU in bypass mode
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- * and also set its pagesize
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- */
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-VOID
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-SmmuInit (
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- VOID
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- )
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-{
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- UINT32 Value;
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-
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- /* set pagesize as 64K and ssmu-500 in bypass mode */
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- Value = (MmioRead32 ((UINTN)SMMU_REG_SACR) | SACR_PAGESIZE_MASK);
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- MmioWrite32 ((UINTN)SMMU_REG_SACR, Value);
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-
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- Value = (MmioRead32 ((UINTN)SMMU_REG_SCR0) | SCR0_CLIENTPD_MASK) & ~SCR0_USFCFG_MASK;
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- MmioWrite32 ((UINTN)SMMU_REG_SCR0, Value);
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-
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- Value = (MmioRead32 ((UINTN)SMMU_REG_NSCR0) | SCR0_CLIENTPD_MASK) & ~SCR0_USFCFG_MASK;
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- MmioWrite32 ((UINTN)SMMU_REG_NSCR0, Value);
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-}
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-
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