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KabylakeSiliconPkg: Fix invalid debug macros

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4095

Updates several debug macros in KabylakeSiliconPkg to correctly
match print specifiers to actual arguments.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Michael Kubacki 1 год назад
Родитель
Сommit
de65831e5a

+ 11 - 8
Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/CpuPrintPolicy.c

@@ -39,13 +39,16 @@ CpuPowerMgmtBasicConfigPrint (
   )
 {
   DEBUG ((DEBUG_INFO, "------------------ CPU Power Mgmt Basic Config ------------------\n"));
-  DEBUG ((DEBUG_INFO, " CPU_POWER_MGMT_BASIC_CONFIG : OneCoreRatioLimit : 0x%X , TwoCoreRatioLimit = 0x%X , ThreeCoreRatioLimit = 0x%X , FourCoreRatioLimit = 0x%X \n",  CpuPowerMgmtBasicConfig->OneCoreRatioLimit, \
-          CpuPowerMgmtBasicConfig->TwoCoreRatioLimit, \
-          CpuPowerMgmtBasicConfig->ThreeCoreRatioLimit, \
-          CpuPowerMgmtBasicConfig->FourCoreRatioLimit, \
-          CpuPowerMgmtBasicConfig->FiveCoreRatioLimit, \
-          CpuPowerMgmtBasicConfig->SixCoreRatioLimit, \
-          CpuPowerMgmtBasicConfig->SevenCoreRatioLimit, \
+  DEBUG ((DEBUG_INFO,
+          " CPU_POWER_MGMT_BASIC_CONFIG : OneCoreRatioLimit : 0x%X , TwoCoreRatioLimit = 0x%X , ThreeCoreRatioLimit = 0x%X , FourCoreRatioLimit = 0x%X\n"
+          "                               FiveCoreRatioLimit : 0x%X , SixCoreRatioLimit = 0x%X , SevenCoreRatioLimit = 0x%X , EightCoreRatioLimit = 0x%X\n",
+          CpuPowerMgmtBasicConfig->OneCoreRatioLimit,
+          CpuPowerMgmtBasicConfig->TwoCoreRatioLimit,
+          CpuPowerMgmtBasicConfig->ThreeCoreRatioLimit,
+          CpuPowerMgmtBasicConfig->FourCoreRatioLimit,
+          CpuPowerMgmtBasicConfig->FiveCoreRatioLimit,
+          CpuPowerMgmtBasicConfig->SixCoreRatioLimit,
+          CpuPowerMgmtBasicConfig->SevenCoreRatioLimit,
           CpuPowerMgmtBasicConfig->EightCoreRatioLimit));
   DEBUG ((DEBUG_INFO, " CPU_POWER_MGMT_BASIC_CONFIG: Hwp : 0x%x\n", CpuPowerMgmtBasicConfig->Hwp));
   DEBUG ((DEBUG_INFO, " CPU_POWER_MGMT_BASIC_CONFIG: SkipSetBootPState : 0x%x\n", CpuPowerMgmtBasicConfig->SkipSetBootPState));
@@ -151,7 +154,7 @@ CpuPidTestConfigPrint (
 {
   UINT32 Index = 0;
   DEBUG ((DEBUG_INFO, "------------------ CPU PID Test Config ------------------\n"));
-  DEBUG ((DEBUG_INFO, " CPU_PID_TEST_CONFIG : PidTuning : 0x%X\n", Index,  CpuPidTestConfig->PidTuning));
+  DEBUG ((DEBUG_INFO, " CPU_PID_TEST_CONFIG : PidTuning : 0x%X\n", CpuPidTestConfig->PidTuning));
   if ( CpuPidTestConfig->PidTuning == 1) {
     for (Index = PID_DOMAIN_KP; Index <= PID_DOMAIN_KD; Index++) {
         DEBUG ((DEBUG_INFO, " CPU_PID_TEST_CONFIG : Ratl[%X] : 0x%X\n", Index,  CpuPidTestConfig->Ratl[Index]));

+ 2 - 2
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiOcWdtLib/PeiOcWdtLib.c

@@ -75,7 +75,7 @@ OcWdtResetCheck (
   /// Timeout status bits are cleared by writing '1'
   ///
   if (Readback & (B_PCH_OC_WDT_CTL_ICCSURV_STS | B_PCH_OC_WDT_CTL_NO_ICCSURV_STS)) {
-    DEBUG ((DEBUG_ERROR, "(WDT) Expiration detected.\n", Readback));
+    DEBUG ((DEBUG_ERROR, "(WDT) Expiration detected. Read back = 0x%08x\n", Readback));
     Readback |= B_PCH_OC_WDT_CTL_FAILURE_STS;
     Readback |= (B_PCH_OC_WDT_CTL_ICCSURV_STS | B_PCH_OC_WDT_CTL_NO_ICCSURV_STS);
     Readback &= ~(B_PCH_OC_WDT_CTL_UNXP_RESET_STS);
@@ -102,7 +102,7 @@ OcWdtResetCheck (
       ///
       /// No WDT expiration and no unexpected reset - clear Failure status
       ///
-      DEBUG ((DEBUG_INFO, "(WDT) Status OK.\n", Readback));
+      DEBUG ((DEBUG_INFO, "(WDT) Status OK.\n"));
       Readback &= ~(B_PCH_OC_WDT_CTL_FAILURE_STS);
       Readback |= (B_PCH_OC_WDT_CTL_ICCSURV_STS | B_PCH_OC_WDT_CTL_NO_ICCSURV_STS);
     }