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@@ -29,6 +29,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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{// HostBridge 0
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/* Port 0 */
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{
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+ 0, //Segment
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PCI_HB0RB0_ECAM_BASE, //ecam
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0x80, //BusBase
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0x87, //BusLimit
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@@ -44,6 +45,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 1 */
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{
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+ 1, //Segment
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PCI_HB0RB1_ECAM_BASE,//ecam
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0x90, //BusBase
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0x97, //BusLimit
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@@ -59,6 +61,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 2 */
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{
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+ 2, //Segment
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PCI_HB0RB2_ECAM_BASE,
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0xF8, //BusBase
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0xFF, //BusLimit
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@@ -75,6 +78,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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/* Port 3 */
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{
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+ 3, //Segment
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PCI_HB0RB3_ECAM_BASE,
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0xb0, //BusBase
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0xb7, //BusLimit
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@@ -90,6 +94,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 4 */
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{
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+ 4, //Segment
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PCI_HB0RB4_ECAM_BASE, //ecam
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0x88, //BusBase
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0x8f, //BusLimit
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@@ -105,6 +110,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 5 */
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{
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+ 5, //Segment
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PCI_HB0RB5_ECAM_BASE,//ecam
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0x78, //BusBase
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0x7F, //BusLimit
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@@ -120,6 +126,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 6 */
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{
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+ 6, //Segment
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PCI_HB0RB6_ECAM_BASE,
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0xC0, //BusBase
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0xC7, //BusLimit
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@@ -136,6 +143,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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/* Port 7 */
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{
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+ 7, //Segment
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PCI_HB0RB7_ECAM_BASE,
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0x90, //BusBase
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0x97, //BusLimit
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@@ -153,6 +161,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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{// HostBridge 1
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/* Port 0 */
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{
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+ 8, //Segment
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PCI_HB1RB0_ECAM_BASE,
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0x80, //BusBase
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0x87, //BusLimit
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@@ -168,6 +177,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 1 */
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{
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+ 9, //Segment
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PCI_HB1RB1_ECAM_BASE,
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0x90, //BusBase
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0x97, //BusLimit
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@@ -183,6 +193,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 2 */
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{
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+ 0xa, //Segment
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PCI_HB1RB2_ECAM_BASE,
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0x10, //BusBase
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0x1f, //BusLimit
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@@ -199,6 +210,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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/* Port 3 */
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{
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+ 0xb, //Segment
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PCI_HB1RB3_ECAM_BASE,
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0xb0, //BusBase
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0xb7, //BusLimit
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@@ -214,6 +226,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 4 */
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{
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+ 0xc, //Segment
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PCI_HB1RB4_ECAM_BASE,
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0x20, //BusBase
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0x2f, //BusLimit
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@@ -229,6 +242,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 5 */
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{
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+ 0xd, //Segment
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PCI_HB1RB5_ECAM_BASE,
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0x30, //BusBase
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0x3f, //BusLimit
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@@ -244,6 +258,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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},
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/* Port 6 */
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{
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+ 0xe, //Segment
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PCI_HB1RB6_ECAM_BASE,
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0xa8, //BusBase
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0xaf, //BusLimit
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@@ -260,6 +275,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
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/* Port 7 */
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{
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+ 0xf, //Segment
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PCI_HB1RB7_ECAM_BASE,
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0xb8, //BusBase
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0xbf, //BusLimit
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