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@@ -37,14 +37,39 @@ ASM_FUNC (_ModuleEntryPoint)
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li a5, FixedPcdGet32 (PcdBootHartId)
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bne a6, a5, _wait_for_boot_hart
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- li ra, 0
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- call _reset_regs
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+ /*
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+ * Initial the hart count reported in DTB
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+ */
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+ li a4, FixedPcdGet32 (PcdTemporaryRamBase)
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+ li a5, FixedPcdGet32 (PcdTemporaryRamSize)
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+ /* Use Temp memory as the stack for calling to C code */
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+ add sp, a4, a5
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+ /* Get the address of device tree and call generic fw_platform_init */
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+ call GetDeviceTreeAddress /* a0 return the device tree address */
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+ beqz a0, skip_fw_init
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+ add a1, a0, 0 /* a1 is device tree */
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+ csrr a0, CSR_MHARTID /* a0 is boot hart ID */
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+ call fw_platform_init
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+skip_fw_init:
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/* Preload HART details
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- * s7 -> HART Count
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+ * s7 -> Total HART count from PCD or DTB
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* s8 -> HART Stack Size
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*/
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- li s7, FixedPcdGet32 (PcdHartCount)
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+ la a0, platform
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+#if __riscv_xlen == 64
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+ lwu s7, SBI_PLATFORM_HART_COUNT_OFFSET(a0)
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+#else
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+ lw s7, SBI_PLATFORM_HART_COUNT_OFFSET(a0)
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+#endif
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+ /*
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+ * This is the number of HARTs described in
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+ * DTB for this processor. We allocate the
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+ * scratch buffer according to this number.
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+ */
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+ la a4, _pysical_hart_count
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+ sd s7, (a4)
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+
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li s8, FixedPcdGet32 (PcdOpenSbiStackSize)
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/*
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@@ -113,20 +138,9 @@ _scratch_init:
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li a4, FixedPcdGet32 (PcdTemporaryRamBase)
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li a5, FixedPcdGet32 (PcdTemporaryRamSize)
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-
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/* Use Temp memory as the stack for calling to C code */
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add sp, a4, a5
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- /* Get the address of device tree and call generic fw_platform_init */
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- call GetDeviceTreeAddress /* a0 return the device tree address */
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- beqz a0, skip_fw_init
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- add a1, a0, 0 /* a1 is device tree */
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- csrr a0, CSR_MHARTID /* a0 is hart ID */
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- call fw_platform_init
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-skip_fw_init:
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-
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/* Zero out temporary memory */
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- li a4, FixedPcdGet32 (PcdTemporaryRamBase)
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- li a5, FixedPcdGet32 (PcdTemporaryRamSize)
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add a5, a4, a5
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1:
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li a3, 0x0
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@@ -167,7 +181,11 @@ _start_warm:
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li s7, FixedPcdGet32 (PcdBootableHartNumber)
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bnez s7, 1f
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la a4, platform
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- REG_L s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
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+#if __riscv_xlen == 64
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+ lwu s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
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+#else
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+ lw s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
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+#endif
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1:
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li s8, FixedPcdGet32 (PcdOpenSbiStackSize)
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la a4, platform
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@@ -209,7 +227,8 @@ _start_warm:
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csrr a0, CSR_MHARTID
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j _uninitialized_hart_wait
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4:
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- li s7, FixedPcdGet32 (PcdHartCount)
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+ la a5, _pysical_hart_count
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+ ld s7, (a5)
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/* Find the scratch space for this hart
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*
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* Scratch buffer is on the top of stack buffer
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@@ -275,6 +294,8 @@ _start_warm:
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.section .data, "aw"
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_boot_hart_done:
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RISCV_PTR 0
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+_pysical_hart_count:
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+ RISCV_PTR 0
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.align 3
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.section .entry, "ax", %progbits
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@@ -293,7 +314,7 @@ _hartid_to_scratch:
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/*
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* s0 -> HART Stack Size
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* s1 -> HART Stack End
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- * s2 -> Temporary
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+ * s2 -> Total hart count
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*/
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la s2, platform
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#if __riscv_xlen == 64
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@@ -301,8 +322,9 @@ _hartid_to_scratch:
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#else
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lw s0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
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#endif
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- li s2, FixedPcdGet32 (PcdHartCount)
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+ la s1, _pysical_hart_count /* total HART count */
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+ ld s2, (s1)
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mul s2, s2, s0
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li s1, FixedPcdGet32 (PcdScratchRamBase)
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add s1, s1, s2
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