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Platform/Sgi: Add serial debug controller to SSDT

Add a new device entry in the SSDT ACPI table to describe the serial
port used as the debug port. On the Neoverse reference design platforms,
the UART0 port of the SoC is used as the debug port.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Reviewed-by: Thomas Abraham <thomas.abraham@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Tested-by: Thomas Abraham <thomas.abraham@arm.com>
Rohit Mathew преди 1 година
родител
ревизия
8d8bb28d2c

+ 1 - 0
Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf

@@ -39,6 +39,7 @@
 [FixedPcd]
   gArmPlatformTokenSpaceGuid.PcdCoreCount
   gArmPlatformTokenSpaceGuid.PcdClusterCount
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt
 

+ 1 - 0
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf

@@ -39,6 +39,7 @@
 [FixedPcd]
   gArmPlatformTokenSpaceGuid.PcdCoreCount
   gArmPlatformTokenSpaceGuid.PcdClusterCount
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt
 

+ 1 - 0
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf

@@ -41,6 +41,7 @@
 [FixedPcd]
   gArmPlatformTokenSpaceGuid.PcdCoreCount
   gArmPlatformTokenSpaceGuid.PcdClusterCount
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt
 

+ 1 - 0
Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf

@@ -37,6 +37,7 @@
   Platform/ARM/SgiPkg/SgiPlatform.dec
 
 [FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt
   gArmPlatformTokenSpaceGuid.PcdCoreCount

+ 1 - 0
Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf

@@ -37,6 +37,7 @@
   Platform/ARM/SgiPkg/SgiPlatform.dec
 
 [FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
   gArmPlatformTokenSpaceGuid.PcdCoreCount
   gArmPlatformTokenSpaceGuid.PcdClusterCount

+ 1 - 0
Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf

@@ -37,6 +37,7 @@
   Platform/ARM/SgiPkg/SgiPlatform.dec
 
 [FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt
   gArmPlatformTokenSpaceGuid.PcdCoreCount

+ 1 - 0
Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf

@@ -39,6 +39,7 @@
   Platform/ARM/SgiPkg/SgiPlatform.dec
 
 [FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt
   gArmPlatformTokenSpaceGuid.PcdCoreCount

+ 1 - 0
Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf

@@ -39,6 +39,7 @@
 [FixedPcd]
   gArmPlatformTokenSpaceGuid.PcdCoreCount
   gArmPlatformTokenSpaceGuid.PcdClusterCount
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt
 

+ 15 - 0
Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl

@@ -29,6 +29,21 @@ DefinitionBlock ("SsdtRosTable.aml", "SSDT", 2, "ARMLTD", "ARMSGI",
       })
     }
 
+    Device (COM1) {
+      Name (_HID, "ARMH0011")
+      Name (_CID, "ARMH0011")
+      Name (_UID, One)
+      Name (_STA, 0xF)
+      Name (_CRS, ResourceTemplate () {
+        Memory32Fixed (
+          ReadWrite,
+          FixedPcdGet64 (PcdSerialDbgRegisterBase),
+          0x1000
+          )
+        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { FixedPcdGet32 (PcdSerialDbgInterrupt) }
+      })
+    }
+
     // VIRTIO DISK
     Device (VR00) {
       Name (_HID, "LNRO0005")