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@@ -32,7 +32,7 @@ Include
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gEdkiiSiliconInitializedPpiGuid = {0x82a72dc8, 0x61ec, 0x403e, {0xb1, 0x5a, 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}}
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[Guids]
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-gMinPlatformModuleTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
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+gMinPlatformPkgTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
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gAdapterInfoPlatformTestPointGuid = {0x5381e3ea, 0xb77, 0x4580, {0xad, 0xdf, 0xa9, 0x1c, 0x8, 0x3b, 0xf2, 0x97}}
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@@ -78,71 +78,71 @@ TestPointCheckLib|Include/Library/TestPointCheckLib.h
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## The Flash relevant PCD are ineffective and will be patched basing on FDF definitions during build.
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## Set all of them to 0 here to prevent from confusion.
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##
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
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-
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006
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-
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015
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-
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028
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-gMinPlatformModuleTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029
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-gMinPlatformModuleTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000
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-gMinPlatformModuleTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001
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-gMinPlatformModuleTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002
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-gMinPlatformModuleTokenSpaceGuid.PcdApicLocalAddress|0xFEE00000|UINT64|0x9000000B
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-gMinPlatformModuleTokenSpaceGuid.PcdApicLocalMmioSize|0x1000|UINT32|0x9000000C
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-gMinPlatformModuleTokenSpaceGuid.PcdApicIoAddress|0xFEC00000|UINT64|0x9000000D
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-gMinPlatformModuleTokenSpaceGuid.PcdApicIoMmioSize|0x1000|UINT32|0x9000000E
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-gMinPlatformModuleTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012
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-gMinPlatformModuleTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013
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-
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-gMinPlatformModuleTokenSpaceGuid.PcdApicIoIdPch|0x02|UINT8|0x9000001E
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-gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500
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-gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501
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-gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UINT32|0x20000502
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-gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32|0x20000503
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-gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32|0x20000504
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-
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-gMinPlatformModuleTokenSpaceGuid.PcdFspTemporaryRamSize|0x1000|UINT32|0x10001003
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028
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+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000
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+gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001
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+gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdApicLocalAddress|0xFEE00000|UINT64|0x9000000B
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+gMinPlatformPkgTokenSpaceGuid.PcdApicLocalMmioSize|0x1000|UINT32|0x9000000C
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdApicIoAddress|0xFEC00000|UINT64|0x9000000D
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+gMinPlatformPkgTokenSpaceGuid.PcdApicIoMmioSize|0x1000|UINT32|0x9000000E
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012
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+gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdApicIoIdPch|0x02|UINT8|0x9000001E
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500
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+gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501
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+gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UINT32|0x20000502
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+gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32|0x20000503
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+gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32|0x20000504
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+
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+gMinPlatformPkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x1000|UINT32|0x10001003
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#
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# The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
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@@ -153,11 +153,11 @@ gMinPlatformModuleTokenSpaceGuid.PcdFspTemporaryRamSize|0x1000|UINT32|0x10001003
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# BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
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# BIT3-31: Reserved
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#
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-gMinPlatformModuleTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006
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+gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006
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-gMinPlatformModuleTokenSpaceGuid.PcdPreferredPmProfile|0x0|UINT8|0x00100205
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+gMinPlatformPkgTokenSpaceGuid.PcdPreferredPmProfile|0x0|UINT8|0x00100205
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-gMinPlatformModuleTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x00100206
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+gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x00100206
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#
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# See HstiIbvFeatureBit.h for the definition
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@@ -166,7 +166,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x0010
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#
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# It means BYTE<X> BIT<Y> is for feature <AAA>.
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#
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-gMinPlatformModuleTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VOID*|0x00100301
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+gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VOID*|0x00100301
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#
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# See TestPointCheckLib.h for the definition
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@@ -181,7 +181,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VO
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# Stage OS boot: {0x03, 0x07, 0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
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# Stage Secure boot: {0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
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# Stage Advanced: {0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
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-gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00100302
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+gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00100302
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[PcdsDynamic]
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@@ -191,38 +191,38 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0
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## Allocate 56 KB [0x2000..0xFFFF] of I/O space for Pci Devices
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## If PcdPciReservedMemLimit =0 Pci Reserved default MMIO Limit is PciExpressBase else use PcdPciReservedMemLimit .
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##
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedIobase |0x2000 |UINT16|0x40010041
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedIoLimit |0xFFFF |UINT16|0x40010042
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemBase |0x90000000 |UINT32|0x40010043
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemLimit |0x00000000 |UINT32|0x40010044
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010045
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit |0x0000000000000000 |UINT64|0x40010046
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemBase |0xFFFFFFFF |UINT32|0x40010047
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemLimit |0x00000000 |UINT32|0x40010048
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010049
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- gMinPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit|0x0000000000000000 |UINT64|0x4001004A
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- gMinPlatformModuleTokenSpaceGuid.PcdPciDmaAbove4G |FALSE|BOOLEAN|0x4001004B
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- gMinPlatformModuleTokenSpaceGuid.PcdPciNoExtendedConfigSpace |FALSE|BOOLEAN|0x4001004C
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- gMinPlatformModuleTokenSpaceGuid.PcdPciResourceAssigned |FALSE|BOOLEAN|0x4001004D
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-
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- gMinPlatformModuleTokenSpaceGuid.PcdLowPowerS0Idle|0|UINT8|0x40000006
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- gMinPlatformModuleTokenSpaceGuid.PcdTenSecondPowerButtonEnable|0|UINT8|0x40000008
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- gMinPlatformModuleTokenSpaceGuid.PcdPciExpNative|0|UINT8|0x40000004
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- gMinPlatformModuleTokenSpaceGuid.PcdNativeAspmEnable|1|UINT8|0x40000005
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-
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- gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035
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- gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036
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- gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037
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- gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UINT16|0x00010038
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- gMinPlatformModuleTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UINT16|0x00010039
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- gMinPlatformModuleTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16|0x0001003A
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- gMinPlatformModuleTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x0001003B
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- gMinPlatformModuleTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003C
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-
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- gMinPlatformModuleTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT32|0x0010004
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- gMinPlatformModuleTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|UINT32|0x30000008
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-
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- gMinPlatformModuleTokenSpaceGuid.PcdPlatformMemoryCheckLevel|0|UINT32|0x30000009
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIobase |0x2000 |UINT16|0x40010041
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIoLimit |0xFFFF |UINT16|0x40010042
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase |0x90000000 |UINT32|0x40010043
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit |0x00000000 |UINT32|0x40010044
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010045
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit |0x0000000000000000 |UINT64|0x40010046
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemBase |0xFFFFFFFF |UINT32|0x40010047
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemLimit |0x00000000 |UINT32|0x40010048
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010049
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit|0x0000000000000000 |UINT64|0x4001004A
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciDmaAbove4G |FALSE|BOOLEAN|0x4001004B
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace |FALSE|BOOLEAN|0x4001004C
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned |FALSE|BOOLEAN|0x4001004D
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+
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+ gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle|0|UINT8|0x40000006
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+ gMinPlatformPkgTokenSpaceGuid.PcdTenSecondPowerButtonEnable|0|UINT8|0x40000008
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative|0|UINT8|0x40000004
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+ gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable|1|UINT8|0x40000005
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+
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+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035
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+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036
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+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037
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+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UINT16|0x00010038
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+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UINT16|0x00010039
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+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16|0x0001003A
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+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x0001003B
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+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003C
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+
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+ gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT32|0x0010004
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+ gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|UINT32|0x30000008
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+
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+ gMinPlatformPkgTokenSpaceGuid.PcdPlatformMemoryCheckLevel|0|UINT32|0x30000009
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## This PCD is to control which device is the potential trusted console input device.<BR><BR>
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# For example:<BR>
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@@ -231,7 +231,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0
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# {0x03, 0x0F, 0x0B, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x03, 0x01, 0x01,<BR>
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# //Header<BR>
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# 0x7F, 0xFF, 0x04, 0x00}<BR>
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- gMinPlatformModuleTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{0x03, 0x0F, 0x0B, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x03, 0x01, 0x01, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000A
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+ gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{0x03, 0x0F, 0x0B, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x03, 0x01, 0x01, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000A
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## This PCD is to control which device is the potential trusted console output device.<BR><BR>
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# For example:<BR>
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@@ -242,7 +242,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0
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# 0x01, 0x01, 0x06, 0x00, 0x00, 0x02,
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# //Header<BR>
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# 0x7F, 0xFF, 0x04, 0x00}<BR>
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- gMinPlatformModuleTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x02, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000C
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+ gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x02, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x300000C
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## This PCD is to control which device is the potential trusted storage device.<BR><BR>
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# For example:<BR>
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@@ -253,7 +253,7 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0
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# 0x01, 0x01, 0x06, 0x00, 0x00, 0x17,
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# //Header<BR>
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# 0x7F, 0xFF, 0x04, 0x00}<BR>
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- gMinPlatformModuleTokenSpaceGuid.PcdTrustedStorageDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x17, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x3000010
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+ gMinPlatformPkgTokenSpaceGuid.PcdTrustedStorageDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x17, 0x7F, 0xFF, 0x04, 0x00}|VOID*|0x3000010
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[PcdsFeatureFlag]
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#
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@@ -263,13 +263,13 @@ gMinPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x0
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# Stage 4 - boot to OS
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# Stage 5 - boot to OS with security boot enabled
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#
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- gMinPlatformModuleTokenSpaceGuid.PcdBootStage|4|UINT8|0xF00000A0
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+ gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4|UINT8|0xF00000A0
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- gMinPlatformModuleTokenSpaceGuid.PcdStopAfterDebugInit |FALSE|BOOLEAN|0xF00000A1
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- gMinPlatformModuleTokenSpaceGuid.PcdStopAfterMemInit |FALSE|BOOLEAN|0xF00000A2
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- gMinPlatformModuleTokenSpaceGuid.PcdBootToShellOnly |FALSE|BOOLEAN|0xF00000A3
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- gMinPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable |FALSE|BOOLEAN|0xF00000A4
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- gMinPlatformModuleTokenSpaceGuid.PcdTpm2Enable |FALSE|BOOLEAN|0xF00000A5
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- gMinPlatformModuleTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE|BOOLEAN|0xF00000A6
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- gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable |FALSE|BOOLEAN|0xF00000A7
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+ gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit |FALSE|BOOLEAN|0xF00000A1
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+ gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit |FALSE|BOOLEAN|0xF00000A2
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+ gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly |FALSE|BOOLEAN|0xF00000A3
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+ gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable |FALSE|BOOLEAN|0xF00000A4
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+ gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable |FALSE|BOOLEAN|0xF00000A5
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+ gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE|BOOLEAN|0xF00000A6
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+ gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable |FALSE|BOOLEAN|0xF00000A7
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