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RISC-V/ProcessorPkg: Address Core CI Spelling errors.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Abner Chang 2 years ago
parent
commit
6e5d8a44bf

+ 8 - 8
Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h

@@ -1,7 +1,7 @@
 /** @file
   Library to call the RISC-V SBI ecalls
 
-  Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
+  Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -54,7 +54,7 @@ SbiGetSpecVersion (
 /**
   Get the SBI implementation ID
 
-  This ID is used to idenetify a specific SBI implementation in order to work
+  This ID is used to identify a specific SBI implementation in order to work
   around any quirks it might have.
 
   @param[out] ImplId               The ID of the SBI implementation.
@@ -275,7 +275,7 @@ SbiRemoteFenceI (
 /**
   Instructs the remote harts to execute one or more SFENCE.VMA instructions.
 
-  The SFENCE.VMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.VMA covers the range of virtual addresses between StartAddr and Size.
 
   The remote fence function acts as a full tlb flush if * StartAddr and size
   are both 0 * size is equal to 2^XLEN-1
@@ -305,7 +305,7 @@ SbiRemoteSfenceVma (
 /**
   Instructs the remote harts to execute one or more SFENCE.VMA instructions.
 
-  The SFENCE.VMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.VMA covers the range of virtual addresses between StartAddr and Size.
   Covers only the given ASID.
 
   The remote fence function acts as a full tlb flush if * StartAddr and size
@@ -337,7 +337,7 @@ SbiRemoteSfenceVmaAsid (
 /**
   Instructs the remote harts to execute one or more SFENCE.GVMA instructions.
 
-  The SFENCE.GVMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.GVMA covers the range of virtual addresses between StartAddr and Size.
   Covers only the given VMID.
   This function call is only valid for harts implementing the hypervisor extension.
 
@@ -373,7 +373,7 @@ SbiRemoteHfenceGvmaVmid (
 /**
   Instructs the remote harts to execute one or more SFENCE.GVMA instructions.
 
-  The SFENCE.GVMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.GVMA covers the range of virtual addresses between StartAddr and Size.
   This function call is only valid for harts implementing the hypervisor extension.
 
   The remote fence function acts as a full tlb flush if * StartAddr and size
@@ -407,7 +407,7 @@ SbiRemoteHfenceGvma (
 /**
   Instructs the remote harts to execute one or more SFENCE.VVMA instructions.
 
-  The SFENCE.GVMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.GVMA covers the range of virtual addresses between StartAddr and Size.
   Covers only the given ASID.
   This function call is only valid for harts implementing the hypervisor extension.
 
@@ -443,7 +443,7 @@ SbiRemoteHfenceVvmaAsid (
 /**
   Instructs the remote harts to execute one or more SFENCE.VVMA instructions.
 
-  The SFENCE.GVMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.GVMA covers the range of virtual addresses between StartAddr and Size.
   This function call is only valid for harts implementing the hypervisor extension.
 
   The remote fence function acts as a full tlb flush if * StartAddr and size

+ 2 - 2
Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h

@@ -1,7 +1,7 @@
 /** @file
-  RISC-V OpesbSBI header file reference.
+  RISC-V OpenSBI header file reference.
 
-  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+  Copyright (c) 2020-2022, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 

+ 1 - 1
Silicon/RISC-V/ProcessorPkg/Include/ProcessorSpecificHobData.h

@@ -29,7 +29,7 @@ typedef struct {
   EFI_GUID CoreGuid;
   VOID     *Context;        // The additional information of this core which
                             // built in PEI phase and carried to DXE phase.
-                            // The content is pocessor or platform specific.
+                            // The content is processor or platform specific.
   SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA ProcessorSpecificData;
 } RISC_V_PROCESSOR_SPECIFIC_HOB_DATA;
 

+ 2 - 2
Silicon/RISC-V/ProcessorPkg/Include/SmbiosProcessorSpecificData.h

@@ -1,9 +1,9 @@
 /** @file
   Industry Standard Definitions of RISC-V Processor Specific data defined in
-  below link for complaiant with SMBIOS Table Specification v3.3.0.
+  below link for compliant with SMBIOS Table Specification v3.3.0.
   https://github.com/riscv/riscv-smbios
 
-  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+  Copyright (c) 2019-2022, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 

+ 8 - 8
Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c

@@ -15,7 +15,7 @@
   - SbiLegacyRemoteSfenceVmaAsid -> Use SbiRemoteSfenceVmaAsid
   - SbiLegacyShutdown            -> Wait for new System Reset extension
 
-  Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
+  Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved.<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Revision Reference:
@@ -173,7 +173,7 @@ SbiGetSpecVersion (
 /**
   Get the SBI implementation ID
 
-  This ID is used to idenetify a specific SBI implementation in order to work
+  This ID is used to identify a specific SBI implementation in order to work
   around any quirks it might have.
 
   @param[out] ImplId               The ID of the SBI implementation.
@@ -441,7 +441,7 @@ SbiRemoteFenceI (
 /**
   Instructs the remote harts to execute one or more SFENCE.VMA instructions.
 
-  The SFENCE.VMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.VMA covers the range of virtual addresses between StartAddr and Size.
 
   The remote fence function acts as a full tlb flush if * StartAddr and size
   are both 0 * size is equal to 2^XLEN-1
@@ -483,7 +483,7 @@ SbiRemoteSfenceVma (
 /**
   Instructs the remote harts to execute one or more SFENCE.VMA instructions.
 
-  The SFENCE.VMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.VMA covers the range of virtual addresses between StartAddr and Size.
   Covers only the given ASID.
 
   The remote fence function acts as a full tlb flush if * StartAddr and size
@@ -528,7 +528,7 @@ SbiRemoteSfenceVmaAsid (
 /**
   Instructs the remote harts to execute one or more SFENCE.GVMA instructions.
 
-  The SFENCE.GVMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.GVMA covers the range of virtual addresses between StartAddr and Size.
   Covers only the given VMID.
   This function call is only valid for harts implementing the hypervisor extension.
 
@@ -577,7 +577,7 @@ SbiRemoteHFenceGvmaVmid (
 /**
   Instructs the remote harts to execute one or more SFENCE.GVMA instructions.
 
-  The SFENCE.GVMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.GVMA covers the range of virtual addresses between StartAddr and Size.
   This function call is only valid for harts implementing the hypervisor extension.
 
   The remote fence function acts as a full tlb flush if * StartAddr and size
@@ -623,7 +623,7 @@ SbiRemoteHFenceGvma (
 /**
   Instructs the remote harts to execute one or more SFENCE.VVMA instructions.
 
-  The SFENCE.GVMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.GVMA covers the range of virtual addresses between StartAddr and Size.
   Covers only the given ASID.
   This function call is only valid for harts implementing the hypervisor extension.
 
@@ -672,7 +672,7 @@ SbiRemoteHFenceVvmaAsid (
 /**
   Instructs the remote harts to execute one or more SFENCE.VVMA instructions.
 
-  The SFENCE.GVMA covers the range of virtual addresses between StartAaddr and Size.
+  The SFENCE.GVMA covers the range of virtual addresses between StartAddr and Size.
   This function call is only valid for harts implementing the hypervisor extension.
 
   The remote fence function acts as a full tlb flush if * StartAddr and size

+ 2 - 2
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.c

@@ -1,8 +1,8 @@
 /** @file
-  This iinstance uses RISC-V OpenSBI Firmware Extension SBI to
+  This instance uses RISC-V OpenSBI Firmware Extension SBI to
   get the pointer of firmware context.
 
-  Copyright (c) 2021 Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+  Copyright (c) 2021-2022 Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/

+ 3 - 3
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf

@@ -1,9 +1,9 @@
 ## @file
-# Instance of OpebSBI Firmware Conext Library
+# Instance of OpenSBI Firmware Context Library
 #
-# This iinstance uses RISC-V OpenSBI Firmware Extension SBI.
+# This instance uses RISC-V OpenSBI Firmware Extension SBI.
 #
-#  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#  Copyright (c) 2021-2022, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #

+ 2 - 2
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf

@@ -1,9 +1,9 @@
 ## @file
-# Instance of OpebSBI Firmware Conext Library
+# Instance of OpenSBI Firmware Context Library
 #
 # This instance uses RISC-V Supervisor mode SCRATCH CSR
 #
-#  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#  Copyright (c) 2021-2022, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #

+ 2 - 2
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.c

@@ -1,8 +1,8 @@
 /** @file
-  This instance uses This iinstance Supervisor mode STVEC CSR to
+  This instance uses Supervisor mode STVEC CSR to
   get/set the pointer of firmware context.
 
-  Copyright (c) 2021 Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+  Copyright (c) 2021-2022 Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/

+ 2 - 2
Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec

@@ -1,7 +1,7 @@
-## @file  RiscVProcesssorPkg.dec
+## @file  RiscVProcessorPkg.dec
 # This Package provides UEFI RISC-V processor modules and libraries.
 #
-# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Copyright (c) 2020-2022, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #