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@@ -1,7 +1,7 @@
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/** @file
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Implementation of Fsp Misc UPD Initialization.
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-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@@ -16,7 +16,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#include <FspmUpd.h>
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#include <FspsUpd.h>
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-#include <Library/MemoryAllocationLib.h>
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#include <Library/DebugLib.h>
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#include <Library/DebugPrintErrorLevelLib.h>
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#include <Library/PciLib.h>
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@@ -38,25 +37,21 @@ PeiFspMiscUpdUpdatePreMem (
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{
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EFI_STATUS Status;
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UINTN VariableSize;
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- VOID *MemorySavedData;
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+ VOID *FspNvsBufferPtr;
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UINT8 MorControl;
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VOID *MorControlPtr;
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//
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// Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast boot paths.
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//
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- VariableSize = 0;
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- MemorySavedData = NULL;
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- Status = PeiGetVariable (
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- L"MemoryConfig",
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- &gFspNonVolatileStorageHobGuid,
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- &MemorySavedData,
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- &VariableSize
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- );
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- DEBUG ((DEBUG_INFO, "Get L\"MemoryConfig\" gFspNonVolatileStorageHobGuid - %r\n", Status));
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- DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", VariableSize));
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- FspmUpd->FspmArchUpd.NvsBufferPtr = MemorySavedData;
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-
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+ FspNvsBufferPtr = NULL;
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+ VariableSize = 0;
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+ Status = PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableGuid, &FspNvsBufferPtr, &VariableSize);
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+ if (Status == EFI_SUCCESS) {
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+ DEBUG ((DEBUG_INFO, "Get L\"FspNvsBuffer\" gFspNvsBufferVariableGuid - %r\n", Status));
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+ DEBUG ((DEBUG_INFO, "FspNvsBuffer Size - 0x%x\n", VariableSize));
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+ FspmUpd->FspmArchUpd.NvsBufferPtr = FspNvsBufferPtr;
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+ }
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if (FspmUpd->FspmArchUpd.NvsBufferPtr != NULL) {
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//
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// Set the DISB bit in PCH (DRAM Initialization Scratchpad Bit - GEN_PMCON_A[23]),
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