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@@ -419,7 +419,7 @@ AdjustSocketResources (
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Status = AdjustSocketMmioH (SocketResources, ResourceType, ValidSockets);
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break;
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default:
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- DEBUG((DEBUG_ERROR, "ERROR: Resource Type Unknown = %x\n",ResourceType));
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+ DEBUG((DEBUG_ERROR, "[PCI] ERROR: Resource Type Unknown = %x\n", ResourceType));
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Status = EFI_INVALID_PARAMETER;
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break;
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} // switch
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@@ -429,7 +429,7 @@ AdjustSocketResources (
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/**
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- Calculate current system resource map with retrieved NVRAM variable to see if stored settings were applied
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+ Compare current system resource map with rebalance request NVRAM variable to see if stored settings were applied.
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@param[in] SocketPciResourceData - Pointer to stored CPU resource map
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@@ -488,7 +488,8 @@ IsResourceMapRejected (
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PCIDEBUG ("[%d.%d] Current I/O: 0x%04X..0x%04X\n", Socket, Stack,
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IioUdsStackLimits->PciResourceIoBase, IioUdsStackLimits->PciResourceIoLimit);
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PCIDEBUG ("[%d.%d] Saved I/O: 0x%04X..0x%04X %a\n", Socket, Stack,
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- StackLimits->Io.Base, StackLimits->Io.Limit, Rejected ? "rejected" : "");
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+ StackLimits->Io.Base, StackLimits->Io.Limit,
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+ (StackLimits->Io.Limit != 0 && Rejected) ? "rejected" : "");
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if (IioUdsStackLimits->Mmio32Base != StackLimits->LowMmio.Base && StackLimits->LowMmio.Base != 0) {
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Rejected = TRUE;
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@@ -499,7 +500,8 @@ IsResourceMapRejected (
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PCIDEBUG ("[%d.%d] Current MMIOL: 0x%08X..0x%08X\n", Socket, Stack,
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IioUdsStackLimits->Mmio32Base, IioUdsStackLimits->Mmio32Limit);
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PCIDEBUG ("[%d.%d] Saved MMIOL: 0x%08X..0x%08X %a\n", Socket, Stack,
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- StackLimits->LowMmio.Base, StackLimits->LowMmio.Limit, Rejected ? "rejected" : "");
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+ StackLimits->LowMmio.Base, StackLimits->LowMmio.Limit,
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+ (StackLimits->LowMmio.Limit != 0 && Rejected) ? "rejected" : "");
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if (IioUdsStackLimits->Mmio64Base != StackLimits->HighMmio.Base && StackLimits->HighMmio.Base != 0) {
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Rejected = TRUE;
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@@ -510,7 +512,8 @@ IsResourceMapRejected (
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PCIDEBUG ("[%d.%d] Current MMIOH: 0x%012llX..0x%012llX\n", Socket, Stack,
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IioUdsStackLimits->Mmio64Base, IioUdsStackLimits->Mmio64Limit);
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PCIDEBUG ("[%d.%d] Saved MMIOH: 0x%012llX..0x%012llX %a\n", Socket, Stack,
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- StackLimits->HighMmio.Base, StackLimits->HighMmio.Limit, Rejected ? "rejected" : "");
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+ StackLimits->HighMmio.Base, StackLimits->HighMmio.Limit,
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+ (StackLimits->HighMmio.Limit != 0 && Rejected) ? "rejected" : "");
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}
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}
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//
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@@ -525,7 +528,8 @@ IsResourceMapRejected (
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PCIDEBUG("[%d] Current I/O: 0x%04X..0x%04X\n", Socket,
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IioUdsSocketLimits->PciResourceIoBase, IioUdsSocketLimits->PciResourceIoLimit);
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PCIDEBUG("[%d] Saved I/O: 0x%04X..0x%04X %a\n", Socket,
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- SocketLimits->Io.Base, SocketLimits->Io.Limit, Rejected ? "rejected" : "");
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+ SocketLimits->Io.Base, SocketLimits->Io.Limit,
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+ (SocketLimits->Io.Limit != 0 && Rejected) ? "rejected" : "");
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if (IioUdsSocketLimits->Mmio32Base != SocketLimits->LowMmio.Base && SocketLimits->LowMmio.Base != 0) {
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Rejected = TRUE;
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@@ -536,7 +540,8 @@ IsResourceMapRejected (
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PCIDEBUG ("[%d] Current MMIOL: 0x%08X..0x%08X\n", Socket,
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IioUdsSocketLimits->Mmio32Base, IioUdsSocketLimits->Mmio32Limit);
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PCIDEBUG ("[%d] Saved MMIOL: 0x%08X..0x%08X %a\n", Socket,
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- SocketLimits->LowMmio.Base, SocketLimits->LowMmio.Limit, Rejected ? "rejected" : "");
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+ SocketLimits->LowMmio.Base, SocketLimits->LowMmio.Limit,
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+ (SocketLimits->LowMmio.Limit != 0 && Rejected) ? "rejected" : "");
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if (IioUdsSocketLimits->Mmio64Base != SocketLimits->HighMmio.Base && SocketLimits->HighMmio.Base != 0) {
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Rejected = TRUE;
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@@ -547,7 +552,8 @@ IsResourceMapRejected (
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PCIDEBUG ("[%d] Current MMIOH: 0x%012llX..0x%012llX\n", Socket,
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IioUdsSocketLimits->Mmio64Base, IioUdsSocketLimits->Mmio64Limit);
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PCIDEBUG ("[%d] Saved MMIOH: 0x%012llX..0x%012llX %a\n", Socket,
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- SocketLimits->HighMmio.Base, SocketLimits->HighMmio.Limit, Rejected ? "rejected" : "");
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+ SocketLimits->HighMmio.Base, SocketLimits->HighMmio.Limit,
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+ (SocketLimits->HighMmio.Limit != 0 && Rejected) ? "rejected" : "");
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if (IioUdsUboxStackLimits->Mmio64Base != UboxStackLimits->HighMmio.Base && UboxStackLimits->HighMmio.Base != 0) {
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Rejected = TRUE;
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@@ -558,7 +564,8 @@ IsResourceMapRejected (
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PCIDEBUG ("[%d] Current UBOX: 0x%08X..0x%08X\n", Socket,
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IioUdsUboxStackLimits->Mmio64Base, IioUdsUboxStackLimits->Mmio64Limit);
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PCIDEBUG ("[%d] Saved UBOX: 0x%08X..0x%08X %a\n", Socket,
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- UboxStackLimits->HighMmio.Base, UboxStackLimits->HighMmio.Limit, Rejected ? "rejected" : "");
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+ UboxStackLimits->HighMmio.Base, UboxStackLimits->HighMmio.Limit,
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+ (UboxStackLimits->HighMmio.Limit != 0 && Rejected) ? "rejected" : "");
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}
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}
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DEBUG ((DEBUG_INFO, "[PCI] Resource rebalance rejected ? %a\n", Rejected ? "TRUE" : "FALSE"));
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@@ -567,91 +574,67 @@ IsResourceMapRejected (
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/**
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- Read SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME variable from flash and verify its content.
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+ Verify whether system resource map changed comparing to the state when rebalance request was created.
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- If the variable does not exist, or is not valid for current system configuration
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- the buffer at *PciResConfigPtr is just cleared.
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+ @param[in] PciResConfigPtr - Buffer with the rebalance request.
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- @param[out] PciResConfigPtr - Buffer for the resource configuration variable.
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-
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- @retval EFI_SUCCESS The function completed successfully.
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- @retval EFI_NOT_FOUND The variable was not found.
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- @retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error.
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- @retval EFI_SECURITY_VIOLATION The variable could not be retrieved due to an authentication failure.
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+ @return If current map is different than the one used when rebalance was created true is returned,
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+ otherwise false.
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**/
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-EFI_STATUS
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-PciHostReadResourceConfig (
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- OUT SYSTEM_PCI_BASE_LIMITS *PciResConfigPtr
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+BOOLEAN
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+IsSystemMapChanged (
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+ IN SYSTEM_PCI_BASE_LIMITS *PciResConfigPtr
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)
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{
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- UINTN VarSize;
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- EFI_STATUS Status;
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- UINT8 Socket;
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+ UINT8 Socket;
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- VarSize = sizeof(*PciResConfigPtr);
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- Status = gRT->GetVariable (SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME, &gEfiSocketPciResourceDataGuid,
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- NULL, &VarSize, PciResConfigPtr);
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- if (EFI_ERROR (Status) && Status != EFI_BUFFER_TOO_SMALL) {
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- goto ErrExit;
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- }
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- if (Status == EFI_BUFFER_TOO_SMALL || VarSize != sizeof(*PciResConfigPtr)) {
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-
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- PCIDEBUG ("Got variable '%s' of unexpected size %d (expect %d) - overwrite\n",
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- SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME, VarSize, sizeof(*PciResConfigPtr));
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- Status = EFI_NOT_FOUND;
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- goto ErrExit;
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- }
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- //
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- // If any of the below checks fails clear the buffer and return EFI_NOT_FOUND.
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- //
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- Status = EFI_NOT_FOUND;
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if (PciResConfigPtr->MmioHBase != mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio64Base ||
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- PciResConfigPtr->MmioHLimit != mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio64Limit) {
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+ PciResConfigPtr->MmioHGranularity != *(UINT64*)&mIioUds->IioUdsPtr->PlatformData.MmiohGranularity) {
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- PCIDEBUG ("%s: Memory map changed (MMIOH %012llX..%012llX != %012llX..%012llX) - overwrite\n",
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- SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME,
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- PciResConfigPtr->MmioHBase, PciResConfigPtr->MmioHLimit,
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- mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio64Base,
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- mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio64Limit);
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- goto ErrExit;
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+ DEBUG ((DEBUG_ERROR, "[PCI] %s: MMIOH Base %012llX [%llX] != %012llX [%llX] - system map changed\n",
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+ SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME,
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+ PciResConfigPtr->MmioHBase, PciResConfigPtr->MmioHGranularity,
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+ mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio64Base,
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+ *(UINT64*)&mIioUds->IioUdsPtr->PlatformData.MmiohGranularity));
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+ return TRUE;
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}
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if (PciResConfigPtr->MmioLBase != mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Base ||
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- PciResConfigPtr->MmioLLimit != mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Limit) {
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-
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- PCIDEBUG ("%s: Memory map changed (MMIOL %08X..%08X != %08X..%08X) - overwrite\n",
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- SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME,
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- PciResConfigPtr->MmioLBase, PciResConfigPtr->MmioLLimit,
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- mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Base,
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- mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Limit);
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- goto ErrExit;
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+ PciResConfigPtr->MmioLLimit != mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Limit ||
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+ PciResConfigPtr->MmioLGranularity != mIioUds->IioUdsPtr->PlatformData.MmiolGranularity) {
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+
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+ DEBUG ((DEBUG_ERROR, "[PCI] %s: MMIOL %08X..%08X [%X] != %08X..%08X [%X] - system map changed\n",
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+ SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME,
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+ PciResConfigPtr->MmioLBase, PciResConfigPtr->MmioLLimit, PciResConfigPtr->MmioLGranularity,
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+ mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Base,
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+ mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Limit,
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+ mIioUds->IioUdsPtr->PlatformData.MmiolGranularity));
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+ return TRUE;
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}
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if (PciResConfigPtr->IoBase != mIioUds->IioUdsPtr->PlatformData.PlatGlobalIoBase ||
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- PciResConfigPtr->IoLimit != mIioUds->IioUdsPtr->PlatformData.PlatGlobalIoLimit) {
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-
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- PCIDEBUG ("%s: Memory map changed (I/O %04X..%04X != %04X..%04X) - overwrite\n",
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- SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME,
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- PciResConfigPtr->IoBase, PciResConfigPtr->IoLimit,
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- mIioUds->IioUdsPtr->PlatformData.PlatGlobalIoBase,
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- mIioUds->IioUdsPtr->PlatformData.PlatGlobalIoLimit);
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- goto ErrExit;
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+ PciResConfigPtr->IoLimit != mIioUds->IioUdsPtr->PlatformData.PlatGlobalIoLimit ||
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+ PciResConfigPtr->IoGranularity != mIioUds->IioUdsPtr->PlatformData.IoGranularity) {
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+
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+ DEBUG ((DEBUG_ERROR, "[PCI] %s: I/O %04X..%04X [%X] != %04X..%04X [%X] - system map changed\n",
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+ SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME,
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+ PciResConfigPtr->IoBase, PciResConfigPtr->IoLimit, PciResConfigPtr->IoGranularity,
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+ mIioUds->IioUdsPtr->PlatformData.PlatGlobalIoBase,
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+ mIioUds->IioUdsPtr->PlatformData.PlatGlobalIoLimit,
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+ mIioUds->IioUdsPtr->PlatformData.IoGranularity));
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+ return TRUE;
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}
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for (Socket = 0; Socket < NELEMENTS (PciResConfigPtr->Socket); Socket++) {
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if (PciResConfigPtr->StackPresentBitmap[Socket] !=
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mIioUds->IioUdsPtr->PlatformData.CpuQpiInfo[Socket].stackPresentBitmap) {
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- PCIDEBUG ("%s: Stack bitmap mismach (%04X != %04X) in socket %d - overwrite\n",
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- SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME, PciResConfigPtr->StackPresentBitmap[Socket],
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- mIioUds->IioUdsPtr->PlatformData.CpuQpiInfo[Socket].stackPresentBitmap, Socket);
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- goto ErrExit;
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+ DEBUG ((DEBUG_ERROR, "[PCI] %s: Stack bitmap mismach (%04X != %04X) in socket %d - system map changed\n",
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+ SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME, PciResConfigPtr->StackPresentBitmap[Socket],
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+ mIioUds->IioUdsPtr->PlatformData.CpuQpiInfo[Socket].stackPresentBitmap, Socket));
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+ return TRUE;
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}
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}
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- return EFI_SUCCESS;
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-
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- ErrExit:
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- ZeroMem (PciResConfigPtr, sizeof(*PciResConfigPtr));
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- return Status;
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-} // PciHostReadResourceConfig()
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+ return FALSE;
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+} // IsSystemMapChanged()
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/**
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@@ -689,6 +672,7 @@ AdjustResourceAmongRootBridges (
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UINT8 TypeIndex;
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UINT8 ChangedBitMap;
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EFI_STATUS Status;
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+ UINTN VarSize;
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SYSTEM_PCI_BASE_LIMITS SocketPciResourceData;
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UINT8 Stack;
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UINT8 LastStack;
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@@ -717,28 +701,47 @@ AdjustResourceAmongRootBridges (
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MmiohGranularity |= ((UINT64)mIioUds->IioUdsPtr->PlatformData.MmiohGranularity.hi) << 32;
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ZeroMem (&SocketResources[0], sizeof(SocketResources));
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//
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- // Read the system resource cfg from NVRAM. If the variable does not exist, or is
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- // not valid for current system configuration the buffer SocketPciResourceData
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- // is just cleared.
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+ // Read the system resource cfg from NVRAM. If the variable does not exist just create new one.
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+ // If variable exists, check if it was applied by KTI. If not we got two options possible:
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+ // (1) it is not valid because system resource map changed, or
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+ // (2) it is not valid because of unknown reason.
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+ // The first case is detected and new request shall be created for rebalance.
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+ // In the second case just continue boot to avoid reboot loop.
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//
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- Status = PciHostReadResourceConfig (&SocketPciResourceData);
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- if (EFI_ERROR (Status)) {
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+ VarSize = sizeof(SocketPciResourceData);
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+ ZeroMem (&SocketPciResourceData, sizeof(SocketPciResourceData));
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+ Status = gRT->GetVariable (SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME, &gEfiSocketPciResourceDataGuid,
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+ NULL, &VarSize, &SocketPciResourceData);
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+ if (EFI_ERROR (Status) && Status != EFI_NOT_FOUND && Status != EFI_BUFFER_TOO_SMALL) {
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- if (Status != EFI_NOT_FOUND) {
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+ ASSERT_EFI_ERROR (Status);
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+ return;
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+ }
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+ if (Status == EFI_BUFFER_TOO_SMALL) {
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- ASSERT_EFI_ERROR (Status);
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- return;
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- }
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- //
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- // Variable is not initialized yet, go with empty structure.
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- //
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- } else if (IsResourceMapRejected (&SocketPciResourceData)) {
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+ VarSize += 1; // Make it not equal to sizeof(SocketPciResourceData)
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+ }
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+ if (VarSize != sizeof(SocketPciResourceData)) {
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+
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+ PCIDEBUG ("Got variable '%s' of unexpected size %d (expect %d)\n",
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+ SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME, VarSize, sizeof(SocketPciResourceData));
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+ }
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+ if (Status != EFI_NOT_FOUND) {
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//
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- // If variable is already initialized, but rejected by KTI do not reboot to avoid loop.
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+ // Variable exists, let's check if it was applied by KTI.
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//
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- return;
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- }
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+ if (IsResourceMapRejected (&SocketPciResourceData)) {
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+ //
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+ // Rejected so check if system resources map was changed.
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+ //
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+ if (!IsSystemMapChanged (&SocketPciResourceData) && VarSize == sizeof(SocketPciResourceData)) {
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+ DEBUG ((DEBUG_ERROR, "[PCI] ERROR: Resource rebalance rejected by KTI - continue without rebalance\n"));
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+ return;
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+ }
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+ ZeroMem (&SocketPciResourceData, sizeof(SocketPciResourceData));
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+ }
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+ }
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UboxMmioSize = mIioUds->IioUdsPtr->PlatformData.UboxMmioSize;
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PlatGlobalMmiolBase = mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Base;
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ValidSockets = 0;
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@@ -918,6 +921,13 @@ AdjustResourceAmongRootBridges (
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NewLength += Alignment;
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}
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|
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+ //
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+ // Check if new length is big enough to support PEI MMIO resource assigment for the stacks
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+ //
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+ if (NewLength < mIioUds->IioUdsPtr->PlatformData.IIO_resource[Socket].StackRes[Stack].Mmio32MinSize) {
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+ NewLength = mIioUds->IioUdsPtr->PlatformData.IIO_resource[Socket].StackRes[Stack].Mmio32MinSize;
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|
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+ }
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+
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if (NewLength != 0) {
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|
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//
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|
|
// At least 4MB align per KTI requirement. Add the length requested with given alignment.
|
|
@@ -1036,6 +1046,9 @@ AdjustResourceAmongRootBridges (
|
|
|
Remainder = MmiohGranularity - (NewLength % MmiohGranularity);
|
|
|
NewLength += Remainder;
|
|
|
}
|
|
|
+
|
|
|
+ NewLength = ALIGN_VALUE (NewLength, Alignment);
|
|
|
+
|
|
|
//
|
|
|
// Store length as length - 1 for handling
|
|
|
//
|
|
@@ -1134,31 +1147,44 @@ AdjustResourceAmongRootBridges (
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
- } else if (OutOfResources && ChangedTypeOOR[TypeMem64]){
|
|
|
- //
|
|
|
- // Allow mmioh to be adjusted to access max available physical address range.
|
|
|
- //
|
|
|
- Status = AdjustSocketResources (SocketResources, TypeMem64, ValidSockets);
|
|
|
- if (Status == EFI_SUCCESS) {
|
|
|
- ChangedBitMap |= (1 << TypeIndex);
|
|
|
- } else {
|
|
|
- ChangedBitMap &= ~(1 << TypeIndex);
|
|
|
+ } else if (OutOfResources) {
|
|
|
+ if (ChangedTypeOOR[TypeMem64]) {
|
|
|
+ //
|
|
|
+ // Allow mmioh to be adjusted to access max available physical address range.
|
|
|
+ //
|
|
|
+ Status = AdjustSocketResources (SocketResources, TypeMem64, ValidSockets);
|
|
|
+ if (Status == EFI_SUCCESS) {
|
|
|
+ ChangedBitMap |= (1 << TypeIndex);
|
|
|
+ } else {
|
|
|
+ ChangedBitMap &= ~(1 << TypeIndex);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ if (ChangedTypeOOR[TypeIo] || ChangedTypeOOR[TypeMem32]) {
|
|
|
+ DEBUG ((DEBUG_ERROR, "Clearing %s request\n", mPciResourceTypeStr[TypeIo]));
|
|
|
+ DEBUG ((DEBUG_ERROR, "Clearing %s request\n", mPciResourceTypeStr[TypeMem32]));
|
|
|
+ for (Socket = 0; Socket < MAX_SOCKET; Socket++) {
|
|
|
+ for (Stack = 0; Stack < MAX_IIO_STACK; Stack++) {
|
|
|
+ SocketResources[Socket].StackRes[Stack].NeedIoUpdate = 0;
|
|
|
+ SocketResources[Socket].StackRes[Stack].MmiolUpdate = 0;
|
|
|
+ }
|
|
|
+ }
|
|
|
}
|
|
|
}
|
|
|
-
|
|
|
+ //
|
|
|
// Update changed resource type.
|
|
|
// OemGetResourceMapUpdate() will only update changed resource type so it is alright if data is zero.
|
|
|
+ //
|
|
|
if (ChangedBitMap != 0) {
|
|
|
|
|
|
for (Socket = 0; Socket < MAX_SOCKET; Socket++) {
|
|
|
|
|
|
SocketPciResourceData.StackPresentBitmap[Socket] = mIioUds->IioUdsPtr->PlatformData.CpuQpiInfo[Socket].stackPresentBitmap;
|
|
|
for (Stack = 0; Stack < MAX_IIO_STACK; Stack++) {
|
|
|
+
|
|
|
if (!(mIioUds->IioUdsPtr->PlatformData.CpuQpiInfo[Socket].stackPresentBitmap & (1 << Stack))) {
|
|
|
continue;
|
|
|
}
|
|
|
CurStackLimits = &SocketPciResourceData.Socket[Socket].StackLimits[Stack];
|
|
|
-
|
|
|
//
|
|
|
// Disable stacks that have no resources and are assigned none.
|
|
|
// Reaching this far means the stack is valid and should be disabled if base equals limit and
|
|
@@ -1293,9 +1319,10 @@ AdjustResourceAmongRootBridges (
|
|
|
CurSocketLimits->HighMmio.Base = SocketResources[Socket].MmiohBase;
|
|
|
CurSocketLimits->HighMmio.Limit = SocketResources[Socket].MmiohLimit;
|
|
|
}
|
|
|
-
|
|
|
- DEBUG((DEBUG_INFO, "\nSocketResources[%x].UboxBase =%x\n",Socket,UboxStackLimits->LowMmio.Base));
|
|
|
- DEBUG((DEBUG_INFO, "SocketResources[%x].UboxLimit =%x\n",Socket,UboxStackLimits->LowMmio.Limit));
|
|
|
+ DEBUG((DEBUG_INFO, "\nSocketResources[%x].UboxBase = %x\n",
|
|
|
+ Socket, SocketPciResourceData.Socket[Socket].StackLimits[UBOX_STACK].LowMmio.Base));
|
|
|
+ DEBUG((DEBUG_INFO, "SocketResources[%x].UboxLimit = %x\n",
|
|
|
+ Socket, SocketPciResourceData.Socket[Socket].StackLimits[UBOX_STACK].LowMmio.Limit));
|
|
|
DEBUG((DEBUG_INFO, "\nSocketResources[%x].IoBase =%x\n",Socket,SocketResources[Socket].IoBase));
|
|
|
DEBUG((DEBUG_INFO, "SocketResources[%x].IoLimit =%x\n",Socket,SocketResources[Socket].IoLimit));
|
|
|
DEBUG((DEBUG_INFO, "SocketResources[%x].MmiolBase =%x\n",Socket,SocketResources[Socket].MmiolBase));
|
|
@@ -1304,16 +1331,18 @@ AdjustResourceAmongRootBridges (
|
|
|
DEBUG((DEBUG_INFO, "SocketResources[%x].MmiohLimit =%lx\n",Socket,SocketResources[Socket].MmiohLimit));
|
|
|
} // for Socket
|
|
|
SocketPciResourceData.MmioHBase = mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio64Base;
|
|
|
- SocketPciResourceData.MmioHLimit = mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio64Limit;
|
|
|
+ SocketPciResourceData.MmioHGranularity = *(UINT64*)&mIioUds->IioUdsPtr->PlatformData.MmiohGranularity;
|
|
|
SocketPciResourceData.MmioLBase = mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Base;
|
|
|
SocketPciResourceData.MmioLLimit = mIioUds->IioUdsPtr->PlatformData.PlatGlobalMmio32Limit;
|
|
|
+ SocketPciResourceData.MmioLGranularity = mIioUds->IioUdsPtr->PlatformData.MmiolGranularity;
|
|
|
SocketPciResourceData.IoBase = mIioUds->IioUdsPtr->PlatformData.PlatGlobalIoBase;
|
|
|
SocketPciResourceData.IoLimit = mIioUds->IioUdsPtr->PlatformData.PlatGlobalIoLimit;
|
|
|
+ SocketPciResourceData.IoGranularity = mIioUds->IioUdsPtr->PlatformData.IoGranularity;
|
|
|
|
|
|
PCIDEBUG("Writing resource rebalance request '%s':\n", SYSTEM_PCI_RESOURCE_CONFIGURATION_DATA_NAME);
|
|
|
- PCIDEBUG("System I/O : %04X..%04X\n", SocketPciResourceData.IoBase, SocketPciResourceData.IoLimit);
|
|
|
- PCIDEBUG("System MMIOL: %08X..%08X\n", SocketPciResourceData.MmioLBase, SocketPciResourceData.MmioLLimit);
|
|
|
- PCIDEBUG("System MMIOH: %012llX..%012llX\n", SocketPciResourceData.MmioHBase, SocketPciResourceData.MmioHLimit);
|
|
|
+ PCIDEBUG("System I/O : %04X..%04X [%X]\n", SocketPciResourceData.IoBase, SocketPciResourceData.IoLimit, SocketPciResourceData.IoGranularity);
|
|
|
+ PCIDEBUG("System MMIOL: %08X..%08X [%X]\n", SocketPciResourceData.MmioLBase, SocketPciResourceData.MmioLLimit, SocketPciResourceData.MmioLGranularity);
|
|
|
+ PCIDEBUG("System MMIOH: %012llX [%llX]\n", SocketPciResourceData.MmioHBase, SocketPciResourceData.MmioHGranularity);
|
|
|
for (Socket = 0; Socket < NELEMENTS (SocketPciResourceData.Socket); Socket++) {
|
|
|
|
|
|
PCIDEBUG("[%d] StackPresent: 0x%04X\n", Socket, SocketPciResourceData.StackPresentBitmap[Socket]);
|