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@@ -1,7 +1,7 @@
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/** @file
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Acpi Gnvs Init Library.
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-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@@ -11,11 +11,52 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#include <Library/PciLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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+#include <Library/UefiLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <PchAccess.h>
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#include <Protocol/GlobalNvsArea.h>
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#include <Protocol/MpService.h>
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+#include <Protocol/SaGlobalNvsArea.h>
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+
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+/**
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+ A protocol callback which updates MMIO Base and Length in SA GNVS area
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+
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+ @param[in] Event - The triggered event.
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+ @param[in] Context - Context for this event.
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+
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+**/
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+VOID
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+EFIAPI
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+UpdateSaGnvsForMmioResourceBaseLength (
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+ IN EFI_EVENT Event,
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+ IN VOID *Context
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+ )
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+{
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+ EFI_STATUS Status;
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+ SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL *SaGlobalNvsAreaProtocol;
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+
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+ Status = gBS->LocateProtocol (&gSaGlobalNvsAreaProtocolGuid, NULL, (VOID **) &SaGlobalNvsAreaProtocol);
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+ if (Status != EFI_SUCCESS) {
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+ return;
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+ }
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+ gBS->CloseEvent (Event);
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+
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+ //
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+ // Configure MMIO Base/Length. This logic is only valid for platforms that use PciHostBridgeLibSimple.
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+ //
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+ DEBUG ((DEBUG_INFO, "[BoardAcpiDxe] Update SA GNVS Area.\n"));
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+ SaGlobalNvsAreaProtocol->Area->Mmio32Base = PcdGet32 (PcdPciReservedMemBase);
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+ if (PcdGet32 (PcdPciReservedMemLimit) != 0) {
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+ SaGlobalNvsAreaProtocol->Area->Mmio32Length = PcdGet32 (PcdPciReservedMemLimit) - PcdGet32 (PcdPciReservedMemBase) + 1;
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+ } else {
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+ SaGlobalNvsAreaProtocol->Area->Mmio32Length = ((UINT32) PcdGet64 (PcdPciExpressBaseAddress)) - PcdGet32 (PcdPciReservedMemBase);
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+ }
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+ if (PcdGet64 (PcdPciReservedMemAbove4GBLimit) > PcdGet64 (PcdPciReservedMemAbove4GBBase)) {
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+ SaGlobalNvsAreaProtocol->Area->Mmio64Base = PcdGet64 (PcdPciReservedMemAbove4GBBase);
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+ SaGlobalNvsAreaProtocol->Area->Mmio64Length = PcdGet64 (PcdPciReservedMemAbove4GBLimit) - PcdGet64 (PcdPciReservedMemAbove4GBBase) + 1;
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+ }
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+}
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/**
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@brief
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@@ -39,6 +80,7 @@ AcpiGnvsInit (
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EFI_MP_SERVICES_PROTOCOL *MpService;
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UINTN NumberOfCPUs;
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UINTN NumberOfEnabledCPUs;
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+ VOID *SaGlobalNvsRegistration;
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Pages = EFI_SIZE_TO_PAGES (sizeof (EFI_GLOBAL_NVS_AREA));
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Address = 0xffffffff; // allocate address below 4G.
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@@ -53,7 +95,7 @@ AcpiGnvsInit (
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if (EFI_ERROR(Status)) {
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return Status;
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}
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-
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+
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//
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// Locate the MP services protocol
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// Find the MP Protocol. This is an MP platform, so MP protocol must be there.
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@@ -90,6 +132,16 @@ AcpiGnvsInit (
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GNVS->Area->PL1LimitCS = 0;
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GNVS->Area->PL1LimitCSValue = 4500;
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+ //
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+ // Update SA GNVS with MMIO Base/Length
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+ //
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+ EfiCreateProtocolNotifyEvent (
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+ &gSaGlobalNvsAreaProtocolGuid,
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+ TPL_CALLBACK,
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+ UpdateSaGnvsForMmioResourceBaseLength,
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+ NULL,
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+ &SaGlobalNvsRegistration
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+ );
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+
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return EFI_SUCCESS;
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}
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-
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