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@@ -32,6 +32,60 @@ ArmadaBoardGpioExpanderGet (
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return EFI_SUCCESS;
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}
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+//
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+// PCIE
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+//
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+STATIC
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+MV_PCIE_CONTROLLER mPcieController[] = {
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+ { /* PCIE0 @0xF2600000 */
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+ .PcieDbiAddress = 0xF2600000,
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+ .ConfigSpaceAddress = 0xE0000000,
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+ .HaveResetGpio = TRUE,
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+ .PcieResetGpio =
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+ {
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+ MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER,
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+ MV_GPIO_CP0_CONTROLLER1,
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+ 20,
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+ FALSE
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+ },
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+ .PcieBusMin = 0,
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+ .PcieBusMax = 0xFE,
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+ .PcieIoTranslation = 0xEFF00000,
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+ .PcieIoWinBase = 0x0,
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+ .PcieIoWinSize = 0x10000,
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+ .PcieMmio32Translation = 0,
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+ .PcieMmio32WinBase = 0xC0000000,
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+ .PcieMmio32WinSize = 0x20000000,
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+ .PcieMmio64Translation = 0,
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+ .PcieMmio64WinBase = 0x800000000,
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+ .PcieMmio64WinSize = 0x100000000,
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+ }
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+};
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+
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+/**
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+ Return the number and description of PCIE controllers used on the platform.
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+
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+ @param[in out] **PcieControllers Array containing PCIE controllers'
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+ description.
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+ @param[in out] *PcieControllerCount Amount of used PCIE controllers.
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+
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+ @retval EFI_SUCCESS The data were obtained successfully.
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+ @retval other Return error status.
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+
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+**/
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+EFI_STATUS
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+EFIAPI
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+ArmadaBoardPcieControllerGet (
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+ IN OUT MV_PCIE_CONTROLLER CONST **PcieControllers,
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+ IN OUT UINTN *PcieControllerCount
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+ )
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+{
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+ *PcieControllers = mPcieController;
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+ *PcieControllerCount = ARRAY_SIZE (mPcieController);
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+
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+ return EFI_SUCCESS;
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+}
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+
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//
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// Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
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//
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