/** @file
*  Multiple APIC Description Table (MADT)
*
*  Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
*  Copyright (c) 2015, Hisilicon Limited. All rights reserved.
*  Copyright (c) 2015, Linaro Limited. All rights reserved.
*
*  This program and the accompanying materials
*
*  SPDX-License-Identifier: BSD-2-Clause-Patent
*
*  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
*
**/

#include "Hi1610Platform.h"

#include <Library/AcpiLib.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
#include <IndustryStandard/Acpi.h>
#include <Library/AcpiNextLib.h>

// Differs from Juno, we have another affinity level beyond cluster and core
// 0x20000 is only for socket 0
#define PLATFORM_GET_MPID(ClusterId, CoreId)   (0x10000 | ((ClusterId) << 8) | (CoreId))

//
// Multiple APIC Description Table
//
#pragma pack (1)

typedef struct {
  EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
  EFI_ACPI_6_1_GIC_STRUCTURE                            GicInterfaces[16];
  EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
  EFI_ACPI_6_1_GIC_ITS_STRUCTURE                      GicITS[1];
} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;

#pragma pack ()

EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
  {
    ARM_ACPI_HEADER (
      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE,
      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
    ),
    //
    // MADT specific fields
    //
    0, // LocalApicAddress
    0, // Flags
  },
  {
    // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Flags, PmuIrq, GicBase, GicVBase, GicHBase,
    //                                          GsivId, GicRBase, Mpidr)
    // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GICC Structure of
    //       ACPI v5.1).
    //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses
    //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        0, 0, PLATFORM_GET_MPID(0, 0),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x100000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        1, 1, PLATFORM_GET_MPID(0, 1),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x130000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        2, 2, PLATFORM_GET_MPID(0, 2),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x160000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        3, 3, PLATFORM_GET_MPID(0, 3),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x190000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        4, 4, PLATFORM_GET_MPID(1, 0), EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x1C0000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        5, 5, PLATFORM_GET_MPID(1, 1),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x1F0000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        6, 6, PLATFORM_GET_MPID(1, 2),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x220000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        7, 7, PLATFORM_GET_MPID(1, 3),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x250000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        8, 8, PLATFORM_GET_MPID(2, 0),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x280000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        9, 9, PLATFORM_GET_MPID(2, 1),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x2B0000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        10, 10, PLATFORM_GET_MPID(2, 2),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x2E0000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        11, 11, PLATFORM_GET_MPID(2, 3),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x310000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        12, 12, PLATFORM_GET_MPID(3, 0), EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x340000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        13, 13, PLATFORM_GET_MPID(3, 1),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x370000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        14, 14, PLATFORM_GET_MPID(3, 2),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x3A0000 /* GicRBase */, 0),
    EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
        15, 15, PLATFORM_GET_MPID(3, 3),  EFI_ACPI_6_1_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
        FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet32 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet32 (PcdGicDistributorBase) + 0x3D0000 /* GicRBase */, 0),
  },

  EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0, 0x4),
  {
    EFI_ACPI_6_1_GIC_ITS_INIT(0,0xC6000000),
  }
};

//
// Reference the table being generated to prevent the optimizer from removing the
// data structure from the executable
//
VOID* CONST ReferenceAcpiTable = &Madt;
