/** @file

  @copyright
  Copyright 2017 - 2020 Intel Corporation. <BR>

  SPDX-License-Identifier: BSD-2-Clause-Patent
**/

#include "MaxSocket.h"
External(\_SB.WERR, DeviceObj)

//  General Purpose Event

Scope (\_GPE) {

  // Based on Socket ID to be notified, evaluate appropriate devices.
  Method(NTFC, 2){
    If(And(Arg0, 0x01)){
      Notify(\_SB.SCK0, Arg1)
    }

#if MAX_SOCKET > 1
    If(And(Arg0, 0x02)){
      Notify(\_SB.SCK1, Arg1)
    }
#endif

#if MAX_SOCKET > 2
    If(And(Arg0, 0x04)){
      Notify(\_SB.SCK2, Arg1)
    }
#endif

#if MAX_SOCKET > 3
    If(And(Arg0, 0x08)){
      Notify(\_SB.SCK3, Arg1)
    }
#endif

#if MAX_SOCKET > 4
    If(And(Arg0, 0x10)){
      Notify(\_SB.SCK4, Arg1)
    }
#endif

#if MAX_SOCKET > 5
    If(And(Arg0, 0x20)){
      Notify(\_SB.SCK5, Arg1)
    }
#endif

#if MAX_SOCKET > 6
    If(And(Arg0, 0x40)){
      Notify(\_SB.SCK6, Arg1)
    }
#endif

#if MAX_SOCKET > 7
    If(And(Arg0, 0x80)){
      Notify(\_SB.SCK7, Arg1)
    }
#endif
  } //End Method NTFC
#if 0
  Method(NTFM, 2){

    // Based on Memory Board ID to be notified, evaluate appropriate devices.
    If(And(Arg0, 0x01)){
      Notify(\_SB.SCK0.M000, Arg1)
    }
    If(And(Arg0, 0x02)){
      Notify(\_SB.SCK0.M001, Arg1)
    }
#if MAX_SOCKET > 1
    If(And(Arg0, 0x04)){
      Notify(\_SB.SCK1.M000, Arg1)
    }
    If(And(Arg0, 0x08)){
      Notify(\_SB.SCK1.M001, Arg1)
    }
#endif
#if MAX_SOCKET > 2
    If(And(Arg0, 0x10)){
      Notify(\_SB.SCK2.M000, Arg1)
    }
    If(And(Arg0, 0x20)){
      Notify(\_SB.SCK2.M001, Arg1)
    }
#endif
#if MAX_SOCKET > 3
    If(And(Arg0, 0x40)){
      Notify(\_SB.SCK3.M000, Arg1)
    }
    If(And(Arg0, 0x80)){
      Notify(\_SB.SCK3.M001, Arg1)
    }
#endif

  } // End Method NTFM
#endif

  Method(NTFI, 2){
#if MAX_SOCKET > 1
    If(And(Arg0, 0x01)){
      Notify(\_SB.PC06, Arg1)
      Notify(\_SB.PC07, Arg1)
      Notify(\_SB.PC08, Arg1)
      Notify(\_SB.PC09, Arg1)
      Notify(\_SB.PC10, Arg1)
      Notify(\_SB.PC11, Arg1)

    }
#endif
#if MAX_SOCKET > 2
    If(And(Arg0, 0x02)){
      Notify(\_SB.PC12, Arg1)
      Notify(\_SB.PC13, Arg1)
      Notify(\_SB.PC14, Arg1)
      Notify(\_SB.PC15, Arg1)
      Notify(\_SB.PC16, Arg1)
      Notify(\_SB.PC17, Arg1)
    }
#endif
#if MAX_SOCKET > 3
    If(And(Arg0, 0x04)){
      Notify(\_SB.PC18, Arg1)
      Notify(\_SB.PC19, Arg1)
      Notify(\_SB.PC20, Arg1)
      Notify(\_SB.PC21, Arg1)
      Notify(\_SB.PC22, Arg1)
      Notify(\_SB.PC23, Arg1)
    }
#endif
  } //End Method NTFI

  // Tell OS to run thru the new status of this device (Software SCI generated from SMM for all Hot plug events)
  Method (_L62, 0x0, NotSerialized) {
    if(LEqual(SCI0, 3)) { // Device ejection (Invoked with _EJ0 method called)
      //NTFM  (SCI1, 3)
      NTFC  (SCI2, 3)
      Store (0, SCI0)
    } ElseIf (LEqual(SCI0, 1)) { // Device check (OS can still reject online request based on resources and capability)
      NTFC (CPHP, 0)
      NTFI (IIOP, 0)
      Store (0, CPHP)
      Store (0, IIOP)
      Store (0, SCI0)
    }

    #include "NvdimmGpe.asi"

    // Retrieve leaf and root notification data pre SWGPE clear
    Store (NNPR (), Local0)

    Store (0, GPEC)

    if(LEqual(WSCI, 0x1)) {
      Store(0, WSCI)
      if(LEqual(DBGM, 0x01)){
        Store (0x4A, IO80)
      }
      If (CondRefOf (\_SB.WERR)) {
        Notify (\_SB.WERR, 0x80)
      }
    }

    // Perform NVDIMM leaf and root notifications with notification data updated post SWGPE clear
    NNDO (Local0)

    ///
    /// Handle HWP SCI event
    ///
    //#include "HwpLvt.asi"

    //
    //  Handle eDPC SWGPE event
    //
    #include "IioPcieEdpcGpe.asi"
  }

  // PME supported for Slots, use GPE 9 for PME
  // Hot plug on all slots for now, change later.
  // Slot numbers on silk screen might be different than the port number, currently use port numbers.
  //
  // IIO PCI_E Slot Hotplug GPE Event
  //
  Method (_L61, 0, NotSerialized) {
    #include "IioPcieHotPlugGpeHandler10nm.asl"
  }// end of _L61 GPE Method

}// end of _GPE scope
