cpu.h 7.0 KB

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  1. // Copyright (c) 2012 The Chromium Authors. All rights reserved.
  2. // Use of this source code is governed by a BSD-style license that can be
  3. // found in the LICENSE file.
  4. #ifndef BASE_CPU_H_
  5. #define BASE_CPU_H_
  6. #include <string>
  7. #include <vector>
  8. #include "base/base_export.h"
  9. #include "base/time/time.h"
  10. #include "build/build_config.h"
  11. namespace base {
  12. #if defined(ARCH_CPU_X86_FAMILY)
  13. namespace internal {
  14. struct X86ModelInfo {
  15. int family;
  16. int model;
  17. int ext_family;
  18. int ext_model;
  19. };
  20. // Compute the CPU family and model based on the vendor and CPUID signature.
  21. BASE_EXPORT X86ModelInfo ComputeX86FamilyAndModel(const std::string& vendor,
  22. int signature);
  23. } // namespace internal
  24. #endif // defined(ARCH_CPU_X86_FAMILY)
  25. // Query information about the processor.
  26. class BASE_EXPORT CPU final {
  27. public:
  28. CPU();
  29. CPU(CPU&&);
  30. CPU(const CPU&) = delete;
  31. // Get a preallocated instance of CPU.
  32. // This can be used in very early application startup. The instance of CPU is
  33. // created without branding, see CPU(bool requires_branding) for details and
  34. // implications.
  35. static const CPU& GetInstanceNoAllocation();
  36. enum IntelMicroArchitecture {
  37. PENTIUM = 0,
  38. SSE = 1,
  39. SSE2 = 2,
  40. SSE3 = 3,
  41. SSSE3 = 4,
  42. SSE41 = 5,
  43. SSE42 = 6,
  44. AVX = 7,
  45. AVX2 = 8,
  46. FMA3 = 9,
  47. MAX_INTEL_MICRO_ARCHITECTURE = 10
  48. };
  49. // Accessors for CPU information.
  50. const std::string& vendor_name() const { return cpu_vendor_; }
  51. int signature() const { return signature_; }
  52. int stepping() const { return stepping_; }
  53. int model() const { return model_; }
  54. int family() const { return family_; }
  55. int type() const { return type_; }
  56. int extended_model() const { return ext_model_; }
  57. int extended_family() const { return ext_family_; }
  58. bool has_mmx() const { return has_mmx_; }
  59. bool has_sse() const { return has_sse_; }
  60. bool has_sse2() const { return has_sse2_; }
  61. bool has_sse3() const { return has_sse3_; }
  62. bool has_ssse3() const { return has_ssse3_; }
  63. bool has_sse41() const { return has_sse41_; }
  64. bool has_sse42() const { return has_sse42_; }
  65. bool has_popcnt() const { return has_popcnt_; }
  66. bool has_avx() const { return has_avx_; }
  67. bool has_fma3() const { return has_fma3_; }
  68. bool has_avx2() const { return has_avx2_; }
  69. bool has_aesni() const { return has_aesni_; }
  70. bool has_non_stop_time_stamp_counter() const {
  71. return has_non_stop_time_stamp_counter_;
  72. }
  73. bool is_running_in_vm() const { return is_running_in_vm_; }
  74. #if defined(ARCH_CPU_ARM_FAMILY)
  75. // The cpuinfo values for ARM cores are from the MIDR_EL1 register, a
  76. // bitfield whose format is described in the core-specific manuals. E.g.,
  77. // ARM Cortex-A57:
  78. // https://developer.arm.com/documentation/ddi0488/h/system-control/aarch64-register-descriptions/main-id-register--el1.
  79. uint8_t implementer() const { return implementer_; }
  80. uint32_t part_number() const { return part_number_; }
  81. #endif
  82. // Armv8.5-A extensions for control flow and memory safety.
  83. #if defined(ARCH_CPU_ARM_FAMILY)
  84. bool has_mte() const { return has_mte_; }
  85. bool has_bti() const { return has_bti_; }
  86. #else
  87. constexpr bool has_mte() const { return false; }
  88. constexpr bool has_bti() const { return false; }
  89. #endif
  90. #if defined(ARCH_CPU_X86_FAMILY)
  91. IntelMicroArchitecture GetIntelMicroArchitecture() const;
  92. #endif
  93. const std::string& cpu_brand() const { return cpu_brand_; }
  94. #if BUILDFLAG(IS_LINUX) || BUILDFLAG(IS_CHROMEOS) || BUILDFLAG(IS_ANDROID) || \
  95. BUILDFLAG(IS_AIX)
  96. enum class CoreType {
  97. kUnknown = 0,
  98. kOther,
  99. kSymmetric,
  100. kBigLittle_Little,
  101. kBigLittle_Big,
  102. kBigLittleBigger_Little,
  103. kBigLittleBigger_Big,
  104. kBigLittleBigger_Bigger,
  105. kMaxValue = kBigLittleBigger_Bigger
  106. };
  107. // Attempts to guess the core types of individual CPU cores based on frequency
  108. // information from /sys/devices/system/cpu/cpuN/cpufreq/cpuinfo_max_freq.
  109. // Beware that it is kernel/hardware dependent whether the information from
  110. // sys is accurate. Returns a reference to a static-storage vector (leaked on
  111. // shutdown) with the guessed type for core N at index N.
  112. static const std::vector<CoreType>& GetGuessedCoreTypes();
  113. struct TimeInStateEntry {
  114. CPU::CoreType core_type; // type of the cores in this cluster.
  115. size_t cluster_core_index; // index of the first core in the cluster.
  116. uint64_t core_frequency_khz;
  117. TimeDelta cumulative_time;
  118. };
  119. using TimeInState = std::vector<TimeInStateEntry>;
  120. // For each CPU core, emits the cumulative time spent in different frequency
  121. // states into the output parameter (replacing its current contents). One
  122. // entry in the output parameter is added for each cluster core index
  123. // + frequency state combination with a non-zero CPU time value. Returns false
  124. // on failure. We return the usage via an output parameter to allow reuse of
  125. // TimeInState's std::vector by the caller, e.g. to avoid allocations between
  126. // repeated calls to this method.
  127. //
  128. // NOTE: Currently only supported on Linux/Android, and only on kernels with
  129. // cpufreq-stats driver.
  130. static bool GetTimeInState(TimeInState&);
  131. // For each CPU core, emits the total cumulative wall time spent in any idle
  132. // state into the output parameter (replacing its current contents). Returns
  133. // false on failure. We return the usage via an output parameter to allow
  134. // reuse of TimeInState's std::vector by the caller, e.g. to avoid allocations
  135. // between repeated calls to this method.
  136. //
  137. // NOTE: Currently only supported on Linux/Android, and only on kernels with
  138. // cpuidle driver.
  139. using CoreIdleTimes = std::vector<TimeDelta>;
  140. static bool GetCumulativeCoreIdleTimes(CoreIdleTimes&);
  141. #endif // BUILDFLAG(IS_LINUX) || BUILDFLAG(IS_CHROMEOS) ||
  142. // BUILDFLAG(IS_ANDROID) || BUILDFLAG(IS_AIX)
  143. private:
  144. // Query the processor for CPUID information.
  145. void Initialize(bool requires_branding);
  146. explicit CPU(bool requires_branding);
  147. int signature_ = 0; // raw form of type, family, model, and stepping
  148. int type_ = 0; // process type
  149. int family_ = 0; // family of the processor
  150. int model_ = 0; // model of processor
  151. int stepping_ = 0; // processor revision number
  152. int ext_model_ = 0;
  153. int ext_family_ = 0;
  154. #if defined(ARCH_CPU_ARM_FAMILY)
  155. uint32_t part_number_ = 0; // ARM MIDR part number
  156. uint8_t implementer_ = 0; // ARM MIDR implementer identifier
  157. #endif
  158. bool has_mmx_ = false;
  159. bool has_sse_ = false;
  160. bool has_sse2_ = false;
  161. bool has_sse3_ = false;
  162. bool has_ssse3_ = false;
  163. bool has_sse41_ = false;
  164. bool has_sse42_ = false;
  165. bool has_popcnt_ = false;
  166. bool has_avx_ = false;
  167. bool has_fma3_ = false;
  168. bool has_avx2_ = false;
  169. bool has_aesni_ = false;
  170. #if defined(ARCH_CPU_ARM_FAMILY)
  171. bool has_mte_ = false; // Armv8.5-A MTE (Memory Taggging Extension)
  172. bool has_bti_ = false; // Armv8.5-A BTI (Branch Target Identification)
  173. #endif
  174. bool has_non_stop_time_stamp_counter_ = false;
  175. bool is_running_in_vm_ = false;
  176. std::string cpu_vendor_ = "unknown";
  177. std::string cpu_brand_;
  178. };
  179. } // namespace base
  180. #endif // BASE_CPU_H_