Config.in.mips 7.1 KB

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  1. # mips default CPU ISAs
  2. config BR2_MIPS_CPU_MIPS32
  3. bool
  4. select BR2_MIPS_NAN_LEGACY
  5. config BR2_MIPS_CPU_MIPS32R2
  6. bool
  7. select BR2_MIPS_NAN_LEGACY
  8. config BR2_MIPS_CPU_MIPS32R3
  9. bool
  10. select BR2_MIPS_NAN_LEGACY
  11. config BR2_MIPS_CPU_MIPS32R5
  12. bool
  13. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  14. config BR2_MIPS_CPU_MIPS32R6
  15. bool
  16. select BR2_MIPS_NAN_2008
  17. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  18. config BR2_MIPS_CPU_MIPS64
  19. bool
  20. select BR2_MIPS_NAN_LEGACY
  21. config BR2_MIPS_CPU_MIPS64R2
  22. bool
  23. select BR2_MIPS_NAN_LEGACY
  24. config BR2_MIPS_CPU_MIPS64R3
  25. bool
  26. select BR2_MIPS_NAN_LEGACY
  27. config BR2_MIPS_CPU_MIPS64R5
  28. bool
  29. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  30. config BR2_MIPS_CPU_MIPS64R6
  31. bool
  32. select BR2_MIPS_NAN_2008
  33. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  34. choice
  35. prompt "Target Architecture Variant"
  36. default BR2_mips_32 if BR2_mips || BR2_mipsel
  37. default BR2_mips_64 if BR2_mips64 || BR2_mips64el
  38. depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
  39. help
  40. Specific CPU variant to use
  41. 64bit capable: 64, 64r2, 64r3, 64r5, 64r6
  42. non-64bit capable: 32, 32r2, 32r3, 32r5, 32r6
  43. config BR2_mips_32
  44. bool "Generic MIPS32"
  45. depends on !BR2_ARCH_IS_64
  46. select BR2_MIPS_CPU_MIPS32
  47. config BR2_mips_32r2
  48. bool "Generic MIPS32R2"
  49. depends on !BR2_ARCH_IS_64
  50. select BR2_MIPS_CPU_MIPS32R2
  51. config BR2_mips_32r3
  52. bool "Generic MIPS32R3"
  53. depends on !BR2_ARCH_IS_64
  54. select BR2_MIPS_CPU_MIPS32R3
  55. config BR2_mips_32r5
  56. bool "Generic MIPS32R5"
  57. depends on !BR2_ARCH_IS_64
  58. select BR2_MIPS_CPU_MIPS32R5
  59. config BR2_mips_32r6
  60. bool "Generic MIPS32R6"
  61. depends on !BR2_ARCH_IS_64
  62. select BR2_MIPS_CPU_MIPS32R6
  63. config BR2_mips_interaptiv
  64. bool "interAptiv"
  65. depends on !BR2_ARCH_IS_64
  66. select BR2_MIPS_CPU_MIPS32R2
  67. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  68. config BR2_mips_m5150
  69. bool "M5150"
  70. depends on !BR2_ARCH_IS_64
  71. select BR2_MIPS_CPU_MIPS32R5
  72. select BR2_MIPS_NAN_2008
  73. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  74. config BR2_mips_m6250
  75. bool "M6250"
  76. depends on !BR2_ARCH_IS_64
  77. select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  78. select BR2_MIPS_CPU_MIPS32R6
  79. config BR2_mips_p5600
  80. bool "P5600"
  81. depends on !BR2_ARCH_IS_64
  82. select BR2_MIPS_CPU_MIPS32R5
  83. select BR2_MIPS_NAN_2008
  84. config BR2_mips_xburst
  85. bool "XBurst"
  86. depends on !BR2_ARCH_IS_64
  87. select BR2_MIPS_CPU_MIPS32R2
  88. help
  89. The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
  90. bug in the FPU that can generate incorrect results in
  91. certain cases. The problem shows up when you have several
  92. fused madd instructions in sequence with dependant
  93. operands. This requires the -mno-fused-madd compiler option
  94. to be used in order to prevent emitting these instructions.
  95. See http://www.ingenic.com/en/?xburst.html
  96. config BR2_mips_64
  97. bool "Generic MIPS64"
  98. depends on BR2_ARCH_IS_64
  99. select BR2_MIPS_CPU_MIPS64
  100. config BR2_mips_64r2
  101. bool "Generic MIPS64R2"
  102. depends on BR2_ARCH_IS_64
  103. select BR2_MIPS_CPU_MIPS64R2
  104. config BR2_mips_64r3
  105. bool "Generic MIPS64R3"
  106. depends on BR2_ARCH_IS_64
  107. select BR2_MIPS_CPU_MIPS64R3
  108. config BR2_mips_64r5
  109. bool "Generic MIPS64R5"
  110. depends on BR2_ARCH_IS_64
  111. select BR2_MIPS_CPU_MIPS64R5
  112. config BR2_mips_64r6
  113. bool "Generic MIPS64R6"
  114. depends on BR2_ARCH_IS_64
  115. select BR2_MIPS_CPU_MIPS64R6
  116. config BR2_mips_i6400
  117. bool "I6400"
  118. depends on BR2_ARCH_IS_64
  119. select BR2_MIPS_CPU_MIPS64R6
  120. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  121. config BR2_mips_octeon2
  122. bool "Octeon II"
  123. depends on BR2_ARCH_IS_64
  124. select BR2_MIPS_CPU_MIPS64R2
  125. help
  126. Marvell (formerly Cavium Networks) Octeon II CN60XX
  127. processors.
  128. config BR2_mips_octeon3
  129. bool "Octeon III"
  130. depends on BR2_ARCH_IS_64
  131. select BR2_MIPS_CPU_MIPS64R3
  132. help
  133. Marvell (formerly Cavium Networks) Octeon III CN7XXX
  134. processors.
  135. config BR2_mips_p6600
  136. bool "P6600"
  137. depends on BR2_ARCH_IS_64
  138. select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  139. select BR2_MIPS_CPU_MIPS64R6
  140. endchoice
  141. choice
  142. prompt "Target ABI"
  143. default BR2_MIPS_NABI32
  144. depends on BR2_mips64 || BR2_mips64el
  145. help
  146. Application Binary Interface to use
  147. config BR2_MIPS_NABI32
  148. bool "n32"
  149. depends on BR2_ARCH_IS_64
  150. select BR2_KERNEL_64_USERLAND_32
  151. config BR2_MIPS_NABI64
  152. bool "n64"
  153. depends on BR2_ARCH_IS_64
  154. endchoice
  155. config BR2_MIPS_SOFT_FLOAT
  156. bool "Use soft-float"
  157. default y
  158. depends on !BR2_mips_octeon3 # hard-float only
  159. select BR2_SOFT_FLOAT
  160. help
  161. If your target CPU does not have a Floating Point Unit (FPU)
  162. or a kernel FPU emulator, but you still wish to support
  163. floating point functions, then everything will need to be
  164. compiled with soft floating point support (-msoft-float).
  165. choice
  166. prompt "FP mode"
  167. default BR2_MIPS_FP32_MODE_XX
  168. depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT
  169. help
  170. MIPS32 supports different FP modes (32,xx,64). Information
  171. about FP modes can be found here:
  172. https://sourceware.org/binutils/docs/as/MIPS-Options.html
  173. https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code
  174. config BR2_MIPS_FP32_MODE_32
  175. bool "32"
  176. depends on !BR2_MIPS_CPU_MIPS32R6
  177. config BR2_MIPS_FP32_MODE_XX
  178. bool "xx"
  179. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  180. config BR2_MIPS_FP32_MODE_64
  181. bool "64"
  182. depends on !BR2_MIPS_CPU_MIPS32
  183. endchoice
  184. config BR2_GCC_TARGET_FP32_MODE
  185. default "32" if BR2_MIPS_FP32_MODE_32
  186. default "xx" if BR2_MIPS_FP32_MODE_XX
  187. default "64" if BR2_MIPS_FP32_MODE_64
  188. config BR2_MIPS_NAN_LEGACY
  189. bool
  190. config BR2_MIPS_NAN_2008
  191. bool
  192. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  193. choice
  194. prompt "Target NaN"
  195. default BR2_MIPS_ENABLE_NAN_2008
  196. depends on BR2_mips_32r5 || BR2_mips_64r5
  197. help
  198. MIPS supports two different NaN encodings, legacy and 2008.
  199. Information about MIPS NaN encodings can be found here:
  200. https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html
  201. config BR2_MIPS_ENABLE_NAN_LEGACY
  202. bool "legacy"
  203. select BR2_MIPS_NAN_LEGACY
  204. config BR2_MIPS_ENABLE_NAN_2008
  205. bool "2008"
  206. depends on !BR2_MIPS_SOFT_FLOAT
  207. select BR2_MIPS_NAN_2008
  208. endchoice
  209. config BR2_GCC_TARGET_NAN
  210. default "legacy" if BR2_MIPS_NAN_LEGACY
  211. default "2008" if BR2_MIPS_NAN_2008
  212. config BR2_ARCH
  213. default "mips" if BR2_mips
  214. default "mipsel" if BR2_mipsel
  215. default "mips64" if BR2_mips64
  216. default "mips64el" if BR2_mips64el
  217. config BR2_ENDIAN
  218. default "LITTLE" if BR2_mipsel || BR2_mips64el
  219. default "BIG" if BR2_mips || BR2_mips64
  220. config BR2_GCC_TARGET_ARCH
  221. default "mips32" if BR2_mips_32
  222. default "mips32r2" if BR2_mips_32r2
  223. default "mips32r3" if BR2_mips_32r3
  224. default "mips32r5" if BR2_mips_32r5
  225. default "mips32r6" if BR2_mips_32r6
  226. default "interaptiv" if BR2_mips_interaptiv
  227. default "m5101" if BR2_mips_m5150
  228. default "m6201" if BR2_mips_m6250
  229. default "p5600" if BR2_mips_p5600
  230. default "mips32r2" if BR2_mips_xburst
  231. default "mips64" if BR2_mips_64
  232. default "mips64r2" if BR2_mips_64r2
  233. default "mips64r3" if BR2_mips_64r3
  234. default "mips64r5" if BR2_mips_64r5
  235. default "mips64r6" if BR2_mips_64r6
  236. default "i6400" if BR2_mips_i6400
  237. default "octeon2" if BR2_mips_octeon2
  238. default "octeon3" if BR2_mips_octeon3
  239. default "p6600" if BR2_mips_p6600
  240. config BR2_MIPS_OABI32
  241. bool
  242. default y if BR2_mips || BR2_mipsel
  243. config BR2_GCC_TARGET_ABI
  244. default "32" if BR2_MIPS_OABI32
  245. default "n32" if BR2_MIPS_NABI32
  246. default "64" if BR2_MIPS_NABI64
  247. config BR2_READELF_ARCH_NAME
  248. default "MIPS R3000"
  249. # vim: ft=kconfig
  250. # -*- mode:kconfig; -*-