Config.in.arm 28 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934
  1. # arm cpu features
  2. config BR2_ARM_CPU_HAS_NEON
  3. bool
  4. # for some cores, NEON support is optional
  5. config BR2_ARM_CPU_MAYBE_HAS_NEON
  6. bool
  7. # For some cores, the FPU is optional
  8. config BR2_ARM_CPU_MAYBE_HAS_FPU
  9. bool
  10. config BR2_ARM_CPU_HAS_FPU
  11. bool
  12. # for some cores, VFPv2 is optional
  13. config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  14. bool
  15. select BR2_ARM_CPU_MAYBE_HAS_FPU
  16. config BR2_ARM_CPU_HAS_VFPV2
  17. bool
  18. select BR2_ARM_CPU_HAS_FPU
  19. # for some cores, VFPv3 is optional
  20. config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  21. bool
  22. select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  23. config BR2_ARM_CPU_HAS_VFPV3
  24. bool
  25. select BR2_ARM_CPU_HAS_VFPV2
  26. # for some cores, VFPv4 is optional
  27. config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  28. bool
  29. select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  30. config BR2_ARM_CPU_HAS_VFPV4
  31. bool
  32. select BR2_ARM_CPU_HAS_VFPV3
  33. # FPv4 is always optional
  34. config BR2_ARM_CPU_MAYBE_HAS_FPV4
  35. bool
  36. select BR2_ARM_CPU_MAYBE_HAS_FPU
  37. config BR2_ARM_CPU_HAS_FPV4
  38. bool
  39. select BR2_ARM_CPU_HAS_FPU
  40. # FPv5 is always optional
  41. config BR2_ARM_CPU_MAYBE_HAS_FPV5
  42. bool
  43. select BR2_ARM_CPU_MAYBE_HAS_FPV4
  44. config BR2_ARM_CPU_HAS_FPV5
  45. bool
  46. select BR2_ARM_CPU_HAS_FPV4
  47. config BR2_ARM_CPU_HAS_FP_ARMV8
  48. bool
  49. select BR2_ARM_CPU_HAS_VFPV4
  50. config BR2_ARM_CPU_HAS_ARM
  51. bool
  52. config BR2_ARM_CPU_HAS_THUMB
  53. bool
  54. config BR2_ARM_CPU_HAS_THUMB2
  55. bool
  56. config BR2_ARM_CPU_ARMV4
  57. bool
  58. config BR2_ARM_CPU_ARMV5
  59. bool
  60. config BR2_ARM_CPU_ARMV6
  61. bool
  62. config BR2_ARM_CPU_ARMV7A
  63. bool
  64. config BR2_ARM_CPU_ARMV7M
  65. bool
  66. config BR2_ARM_CPU_ARMV8A
  67. bool
  68. choice
  69. prompt "Target Architecture Variant"
  70. default BR2_cortex_a53 if BR2_ARCH_IS_64
  71. default BR2_arm926t
  72. help
  73. Specific CPU variant to use
  74. if !BR2_ARCH_IS_64
  75. comment "armv4 cores"
  76. config BR2_arm920t
  77. bool "arm920t"
  78. select BR2_ARM_CPU_HAS_ARM
  79. select BR2_ARM_CPU_HAS_THUMB
  80. select BR2_ARM_CPU_ARMV4
  81. select BR2_ARCH_HAS_MMU_OPTIONAL
  82. config BR2_arm922t
  83. bool "arm922t"
  84. select BR2_ARM_CPU_HAS_ARM
  85. select BR2_ARM_CPU_HAS_THUMB
  86. select BR2_ARM_CPU_ARMV4
  87. select BR2_ARCH_HAS_MMU_OPTIONAL
  88. config BR2_fa526
  89. bool "fa526/626"
  90. select BR2_ARM_CPU_HAS_ARM
  91. select BR2_ARM_CPU_ARMV4
  92. select BR2_ARCH_HAS_MMU_OPTIONAL
  93. config BR2_strongarm
  94. bool "strongarm sa110/sa1100"
  95. select BR2_ARM_CPU_HAS_ARM
  96. select BR2_ARM_CPU_ARMV4
  97. select BR2_ARCH_HAS_MMU_OPTIONAL
  98. comment "armv5 cores"
  99. config BR2_arm926t
  100. bool "arm926t"
  101. select BR2_ARM_CPU_HAS_ARM
  102. select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  103. select BR2_ARM_CPU_HAS_THUMB
  104. select BR2_ARM_CPU_ARMV5
  105. select BR2_ARCH_HAS_MMU_OPTIONAL
  106. config BR2_iwmmxt
  107. bool "iwmmxt"
  108. select BR2_ARM_CPU_HAS_ARM
  109. select BR2_ARM_CPU_ARMV5
  110. select BR2_ARCH_HAS_MMU_OPTIONAL
  111. config BR2_xscale
  112. bool "xscale"
  113. select BR2_ARM_CPU_HAS_ARM
  114. select BR2_ARM_CPU_HAS_THUMB
  115. select BR2_ARM_CPU_ARMV5
  116. select BR2_ARCH_HAS_MMU_OPTIONAL
  117. comment "armv6 cores"
  118. config BR2_arm1136j_s
  119. bool "arm1136j-s"
  120. select BR2_ARM_CPU_HAS_ARM
  121. select BR2_ARM_CPU_HAS_THUMB
  122. select BR2_ARM_CPU_ARMV6
  123. select BR2_ARCH_HAS_MMU_OPTIONAL
  124. config BR2_arm1136jf_s
  125. bool "arm1136jf-s"
  126. select BR2_ARM_CPU_HAS_ARM
  127. select BR2_ARM_CPU_HAS_VFPV2
  128. select BR2_ARM_CPU_HAS_THUMB
  129. select BR2_ARM_CPU_ARMV6
  130. select BR2_ARCH_HAS_MMU_OPTIONAL
  131. config BR2_arm1176jz_s
  132. bool "arm1176jz-s"
  133. select BR2_ARM_CPU_HAS_ARM
  134. select BR2_ARM_CPU_HAS_THUMB
  135. select BR2_ARM_CPU_ARMV6
  136. select BR2_ARCH_HAS_MMU_OPTIONAL
  137. config BR2_arm1176jzf_s
  138. bool "arm1176jzf-s"
  139. select BR2_ARM_CPU_HAS_ARM
  140. select BR2_ARM_CPU_HAS_VFPV2
  141. select BR2_ARM_CPU_HAS_THUMB
  142. select BR2_ARM_CPU_ARMV6
  143. select BR2_ARCH_HAS_MMU_OPTIONAL
  144. config BR2_arm11mpcore
  145. bool "mpcore"
  146. select BR2_ARM_CPU_HAS_ARM
  147. select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  148. select BR2_ARM_CPU_HAS_THUMB
  149. select BR2_ARM_CPU_ARMV6
  150. select BR2_ARCH_HAS_MMU_OPTIONAL
  151. comment "armv7a cores"
  152. config BR2_cortex_a5
  153. bool "cortex-A5"
  154. select BR2_ARM_CPU_HAS_ARM
  155. select BR2_ARM_CPU_MAYBE_HAS_NEON
  156. select BR2_ARM_CPU_MAYBE_HAS_VFPV4
  157. select BR2_ARM_CPU_HAS_THUMB2
  158. select BR2_ARM_CPU_ARMV7A
  159. select BR2_ARCH_HAS_MMU_OPTIONAL
  160. config BR2_cortex_a7
  161. bool "cortex-A7"
  162. select BR2_ARM_CPU_HAS_ARM
  163. select BR2_ARM_CPU_HAS_NEON
  164. select BR2_ARM_CPU_HAS_VFPV4
  165. select BR2_ARM_CPU_HAS_THUMB2
  166. select BR2_ARM_CPU_ARMV7A
  167. select BR2_ARCH_HAS_MMU_OPTIONAL
  168. config BR2_cortex_a8
  169. bool "cortex-A8"
  170. select BR2_ARM_CPU_HAS_ARM
  171. select BR2_ARM_CPU_HAS_NEON
  172. select BR2_ARM_CPU_HAS_VFPV3
  173. select BR2_ARM_CPU_HAS_THUMB2
  174. select BR2_ARM_CPU_ARMV7A
  175. select BR2_ARCH_HAS_MMU_OPTIONAL
  176. config BR2_cortex_a9
  177. bool "cortex-A9"
  178. select BR2_ARM_CPU_HAS_ARM
  179. select BR2_ARM_CPU_MAYBE_HAS_NEON
  180. select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  181. select BR2_ARM_CPU_HAS_THUMB2
  182. select BR2_ARM_CPU_ARMV7A
  183. select BR2_ARCH_HAS_MMU_OPTIONAL
  184. config BR2_cortex_a12
  185. bool "cortex-A12"
  186. select BR2_ARM_CPU_HAS_ARM
  187. select BR2_ARM_CPU_HAS_NEON
  188. select BR2_ARM_CPU_HAS_VFPV4
  189. select BR2_ARM_CPU_HAS_THUMB2
  190. select BR2_ARM_CPU_ARMV7A
  191. select BR2_ARCH_HAS_MMU_OPTIONAL
  192. config BR2_cortex_a15
  193. bool "cortex-A15"
  194. select BR2_ARM_CPU_HAS_ARM
  195. select BR2_ARM_CPU_HAS_NEON
  196. select BR2_ARM_CPU_HAS_VFPV4
  197. select BR2_ARM_CPU_HAS_THUMB2
  198. select BR2_ARM_CPU_ARMV7A
  199. select BR2_ARCH_HAS_MMU_OPTIONAL
  200. config BR2_cortex_a15_a7
  201. bool "cortex-A15/A7 big.LITTLE"
  202. select BR2_ARM_CPU_HAS_ARM
  203. select BR2_ARM_CPU_HAS_NEON
  204. select BR2_ARM_CPU_HAS_VFPV4
  205. select BR2_ARM_CPU_HAS_THUMB2
  206. select BR2_ARM_CPU_ARMV7A
  207. select BR2_ARCH_HAS_MMU_OPTIONAL
  208. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  209. config BR2_cortex_a17
  210. bool "cortex-A17"
  211. select BR2_ARM_CPU_HAS_ARM
  212. select BR2_ARM_CPU_HAS_NEON
  213. select BR2_ARM_CPU_HAS_VFPV4
  214. select BR2_ARM_CPU_HAS_THUMB2
  215. select BR2_ARM_CPU_ARMV7A
  216. select BR2_ARCH_HAS_MMU_OPTIONAL
  217. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  218. config BR2_cortex_a17_a7
  219. bool "cortex-A17/A7 big.LITTLE"
  220. select BR2_ARM_CPU_HAS_ARM
  221. select BR2_ARM_CPU_HAS_NEON
  222. select BR2_ARM_CPU_HAS_VFPV4
  223. select BR2_ARM_CPU_HAS_THUMB2
  224. select BR2_ARM_CPU_ARMV7A
  225. select BR2_ARCH_HAS_MMU_OPTIONAL
  226. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  227. config BR2_pj4
  228. bool "pj4"
  229. select BR2_ARM_CPU_HAS_ARM
  230. select BR2_ARM_CPU_HAS_VFPV3
  231. select BR2_ARM_CPU_ARMV7A
  232. select BR2_ARCH_HAS_MMU_OPTIONAL
  233. comment "armv7m cores"
  234. config BR2_cortex_m3
  235. bool "cortex-M3"
  236. select BR2_ARM_CPU_HAS_THUMB2
  237. select BR2_ARM_CPU_ARMV7M
  238. config BR2_cortex_m4
  239. bool "cortex-M4"
  240. select BR2_ARM_CPU_HAS_THUMB2
  241. select BR2_ARM_CPU_MAYBE_HAS_FPV4
  242. select BR2_ARM_CPU_ARMV7M
  243. config BR2_cortex_m7
  244. bool "cortex-M7"
  245. select BR2_ARM_CPU_HAS_THUMB2
  246. select BR2_ARM_CPU_MAYBE_HAS_FPV5
  247. select BR2_ARM_CPU_ARMV7M
  248. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  249. endif # !BR2_ARCH_IS_64
  250. comment "armv8 cores"
  251. config BR2_cortex_a32
  252. bool "cortex-A32"
  253. depends on !BR2_ARCH_IS_64
  254. select BR2_ARM_CPU_HAS_ARM
  255. select BR2_ARM_CPU_HAS_NEON
  256. select BR2_ARM_CPU_HAS_THUMB2
  257. select BR2_ARM_CPU_HAS_FP_ARMV8
  258. select BR2_ARM_CPU_ARMV8A
  259. select BR2_ARCH_HAS_MMU_OPTIONAL
  260. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  261. config BR2_cortex_a35
  262. bool "cortex-A35"
  263. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  264. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  265. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  266. select BR2_ARM_CPU_HAS_FP_ARMV8
  267. select BR2_ARM_CPU_ARMV8A
  268. select BR2_ARCH_HAS_MMU_OPTIONAL
  269. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  270. config BR2_cortex_a53
  271. bool "cortex-A53"
  272. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  273. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  274. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  275. select BR2_ARM_CPU_HAS_FP_ARMV8
  276. select BR2_ARM_CPU_ARMV8A
  277. select BR2_ARCH_HAS_MMU_OPTIONAL
  278. config BR2_cortex_a57
  279. bool "cortex-A57"
  280. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  281. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  282. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  283. select BR2_ARM_CPU_HAS_FP_ARMV8
  284. select BR2_ARM_CPU_ARMV8A
  285. select BR2_ARCH_HAS_MMU_OPTIONAL
  286. config BR2_cortex_a57_a53
  287. bool "cortex-A57/A53 big.LITTLE"
  288. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  289. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  290. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  291. select BR2_ARM_CPU_HAS_FP_ARMV8
  292. select BR2_ARM_CPU_ARMV8A
  293. select BR2_ARCH_HAS_MMU_OPTIONAL
  294. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  295. config BR2_cortex_a72
  296. bool "cortex-A72"
  297. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  298. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  299. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  300. select BR2_ARM_CPU_HAS_FP_ARMV8
  301. select BR2_ARM_CPU_ARMV8A
  302. select BR2_ARCH_HAS_MMU_OPTIONAL
  303. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  304. config BR2_cortex_a72_a53
  305. bool "cortex-A72/A53 big.LITTLE"
  306. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  307. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  308. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  309. select BR2_ARM_CPU_HAS_FP_ARMV8
  310. select BR2_ARM_CPU_ARMV8A
  311. select BR2_ARCH_HAS_MMU_OPTIONAL
  312. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  313. config BR2_cortex_a73
  314. bool "cortex-A73"
  315. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  316. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  317. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  318. select BR2_ARM_CPU_HAS_FP_ARMV8
  319. select BR2_ARM_CPU_ARMV8A
  320. select BR2_ARCH_HAS_MMU_OPTIONAL
  321. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  322. config BR2_cortex_a73_a35
  323. bool "cortex-A73/A35 big.LITTLE"
  324. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  325. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  326. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  327. select BR2_ARM_CPU_HAS_FP_ARMV8
  328. select BR2_ARM_CPU_ARMV8A
  329. select BR2_ARCH_HAS_MMU_OPTIONAL
  330. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  331. config BR2_cortex_a73_a53
  332. bool "cortex-A73/A53 big.LITTLE"
  333. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  334. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  335. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  336. select BR2_ARM_CPU_HAS_FP_ARMV8
  337. select BR2_ARM_CPU_ARMV8A
  338. select BR2_ARCH_HAS_MMU_OPTIONAL
  339. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  340. config BR2_emag
  341. bool "emag"
  342. depends on BR2_ARCH_IS_64
  343. select BR2_ARM_CPU_HAS_FP_ARMV8
  344. select BR2_ARM_CPU_ARMV8A
  345. select BR2_ARCH_HAS_MMU_OPTIONAL
  346. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  347. config BR2_exynos_m1
  348. bool "exynos-m1"
  349. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  350. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  351. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  352. select BR2_ARM_CPU_HAS_FP_ARMV8
  353. select BR2_ARM_CPU_ARMV8A
  354. select BR2_ARCH_HAS_MMU_OPTIONAL
  355. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  356. config BR2_falkor
  357. bool "falkor"
  358. depends on BR2_ARCH_IS_64
  359. select BR2_ARM_CPU_HAS_FP_ARMV8
  360. select BR2_ARM_CPU_ARMV8A
  361. select BR2_ARCH_HAS_MMU_OPTIONAL
  362. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  363. config BR2_phecda
  364. bool "phecda"
  365. depends on BR2_ARCH_IS_64
  366. select BR2_ARM_CPU_HAS_FP_ARMV8
  367. select BR2_ARM_CPU_ARMV8A
  368. select BR2_ARCH_HAS_MMU_OPTIONAL
  369. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  370. config BR2_qdf24xx
  371. bool "qdf24xx"
  372. depends on BR2_ARCH_IS_64
  373. select BR2_ARM_CPU_HAS_FP_ARMV8
  374. select BR2_ARM_CPU_ARMV8A
  375. select BR2_ARCH_HAS_MMU_OPTIONAL
  376. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  377. config BR2_thunderx
  378. bool "thunderx (aka octeontx)"
  379. depends on BR2_ARCH_IS_64
  380. select BR2_ARM_CPU_HAS_FP_ARMV8
  381. select BR2_ARM_CPU_ARMV8A
  382. select BR2_ARCH_HAS_MMU_OPTIONAL
  383. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  384. config BR2_thunderxt81
  385. bool "thunderxt81 (aka octeontx81)"
  386. depends on BR2_ARCH_IS_64
  387. select BR2_ARM_CPU_HAS_FP_ARMV8
  388. select BR2_ARM_CPU_ARMV8A
  389. select BR2_ARCH_HAS_MMU_OPTIONAL
  390. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  391. config BR2_thunderxt83
  392. bool "thunderxt83 (aka octeontx83)"
  393. depends on BR2_ARCH_IS_64
  394. select BR2_ARM_CPU_HAS_FP_ARMV8
  395. select BR2_ARM_CPU_ARMV8A
  396. select BR2_ARCH_HAS_MMU_OPTIONAL
  397. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  398. config BR2_thunderxt88
  399. bool "thunderxt88"
  400. depends on BR2_ARCH_IS_64
  401. select BR2_ARM_CPU_HAS_FP_ARMV8
  402. select BR2_ARM_CPU_ARMV8A
  403. select BR2_ARCH_HAS_MMU_OPTIONAL
  404. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  405. config BR2_thunderxt88p1
  406. bool "thunderxt88p1"
  407. depends on BR2_ARCH_IS_64
  408. select BR2_ARM_CPU_HAS_FP_ARMV8
  409. select BR2_ARM_CPU_ARMV8A
  410. select BR2_ARCH_HAS_MMU_OPTIONAL
  411. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  412. config BR2_xgene1
  413. bool "xgene1"
  414. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  415. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  416. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  417. select BR2_ARM_CPU_HAS_FP_ARMV8
  418. select BR2_ARM_CPU_ARMV8A
  419. select BR2_ARCH_HAS_MMU_OPTIONAL
  420. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  421. comment "armv8.1a cores"
  422. config BR2_thunderx2t99
  423. bool "thunderx2t99"
  424. depends on BR2_ARCH_IS_64
  425. select BR2_ARM_CPU_HAS_FP_ARMV8
  426. select BR2_ARM_CPU_ARMV8A
  427. select BR2_ARCH_HAS_MMU_OPTIONAL
  428. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  429. config BR2_thunderx2t99p1
  430. bool "thunderx2t99p1"
  431. depends on BR2_ARCH_IS_64
  432. select BR2_ARM_CPU_HAS_FP_ARMV8
  433. select BR2_ARM_CPU_ARMV8A
  434. select BR2_ARCH_HAS_MMU_OPTIONAL
  435. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  436. config BR2_vulcan
  437. bool "vulcan"
  438. depends on BR2_ARCH_IS_64
  439. select BR2_ARM_CPU_HAS_FP_ARMV8
  440. select BR2_ARM_CPU_ARMV8A
  441. select BR2_ARCH_HAS_MMU_OPTIONAL
  442. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  443. comment "armv8.2a cores"
  444. config BR2_cortex_a55
  445. bool "cortex-A55"
  446. depends on BR2_ARCH_IS_64
  447. select BR2_ARM_CPU_HAS_FP_ARMV8
  448. select BR2_ARM_CPU_ARMV8A
  449. select BR2_ARCH_HAS_MMU_OPTIONAL
  450. select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  451. config BR2_cortex_a75
  452. bool "cortex-A75"
  453. depends on BR2_ARCH_IS_64
  454. select BR2_ARM_CPU_HAS_FP_ARMV8
  455. select BR2_ARM_CPU_ARMV8A
  456. select BR2_ARCH_HAS_MMU_OPTIONAL
  457. select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  458. config BR2_cortex_a75_a55
  459. bool "cortex-A75/A55 big.LITTLE"
  460. depends on BR2_ARCH_IS_64
  461. select BR2_ARM_CPU_HAS_FP_ARMV8
  462. select BR2_ARM_CPU_ARMV8A
  463. select BR2_ARCH_HAS_MMU_OPTIONAL
  464. select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  465. config BR2_cortex_a76
  466. bool "cortex-A76"
  467. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  468. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  469. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  470. select BR2_ARM_CPU_HAS_FP_ARMV8
  471. select BR2_ARM_CPU_ARMV8A
  472. select BR2_ARCH_HAS_MMU_OPTIONAL
  473. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  474. config BR2_cortex_a76_a55
  475. bool "cortex-A76/A55 big.LITTLE"
  476. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  477. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  478. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  479. select BR2_ARM_CPU_HAS_FP_ARMV8
  480. select BR2_ARM_CPU_ARMV8A
  481. select BR2_ARCH_HAS_MMU_OPTIONAL
  482. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  483. config BR2_neoverse_n1
  484. bool "neoverse-N1 (aka ares)"
  485. select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
  486. select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
  487. select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
  488. select BR2_ARM_CPU_HAS_FP_ARMV8
  489. select BR2_ARM_CPU_ARMV8A
  490. select BR2_ARCH_HAS_MMU_OPTIONAL
  491. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  492. config BR2_tsv110
  493. bool "tsv110"
  494. depends on BR2_ARCH_IS_64
  495. select BR2_ARM_CPU_HAS_FP_ARMV8
  496. select BR2_ARM_CPU_ARMV8A
  497. select BR2_ARCH_HAS_MMU_OPTIONAL
  498. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  499. comment "armv8.4a cores"
  500. config BR2_saphira
  501. bool "saphira"
  502. depends on BR2_ARCH_IS_64
  503. select BR2_ARM_CPU_HAS_FP_ARMV8
  504. select BR2_ARM_CPU_ARMV8A
  505. select BR2_ARCH_HAS_MMU_OPTIONAL
  506. select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  507. endchoice
  508. config BR2_ARM_ENABLE_NEON
  509. bool "Enable NEON SIMD extension support"
  510. depends on BR2_ARM_CPU_MAYBE_HAS_NEON
  511. select BR2_ARM_CPU_HAS_NEON
  512. help
  513. For some CPU cores, the NEON SIMD extension is optional.
  514. Select this option if you are certain your particular
  515. implementation has NEON support and you want to use it.
  516. config BR2_ARM_ENABLE_VFP
  517. bool "Enable VFP extension support"
  518. depends on BR2_ARM_CPU_MAYBE_HAS_FPU
  519. select BR2_ARM_CPU_HAS_FPV5 if BR2_ARM_CPU_MAYBE_HAS_FPV5
  520. select BR2_ARM_CPU_HAS_FPV4 if BR2_ARM_CPU_MAYBE_HAS_FPV4
  521. select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
  522. select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
  523. select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
  524. help
  525. For some CPU cores, the VFP extension is optional. Select
  526. this option if you are certain your particular
  527. implementation has VFP support and you want to use it.
  528. choice
  529. prompt "Target ABI"
  530. default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_FPU
  531. default BR2_ARM_EABI
  532. depends on BR2_arm || BR2_armeb
  533. help
  534. Application Binary Interface to use. The Application Binary
  535. Interface describes the calling conventions (how arguments
  536. are passed to functions, how the return value is passed, how
  537. system calls are made, etc.).
  538. config BR2_ARM_EABI
  539. bool "EABI"
  540. help
  541. The EABI is currently the standard ARM ABI, which is used in
  542. most projects. It supports both the 'soft' floating point
  543. model (in which floating point instructions are emulated in
  544. software) and the 'softfp' floating point model (in which
  545. floating point instructions are executed using an hardware
  546. floating point unit, but floating point arguments to
  547. functions are passed in integer registers).
  548. The 'softfp' floating point model is link-compatible with
  549. the 'soft' floating point model, i.e you can link a library
  550. built 'soft' with some other code built 'softfp'.
  551. However, passing the floating point arguments in integer
  552. registers is a bit inefficient, so if your ARM processor has
  553. a floating point unit, and you don't have pre-compiled
  554. 'soft' or 'softfp' code, using the EABIhf ABI will provide
  555. better floating point performances.
  556. If your processor does not have a floating point unit, then
  557. you must use this ABI.
  558. config BR2_ARM_EABIHF
  559. bool "EABIhf"
  560. depends on BR2_ARM_CPU_HAS_FPU
  561. help
  562. The EABIhf is an extension of EABI which supports the 'hard'
  563. floating point model. This model uses the floating point
  564. unit to execute floating point instructions, and passes
  565. floating point arguments in floating point registers.
  566. It is more efficient than EABI for floating point related
  567. workload. However, it does not allow to link against code
  568. that has been pre-built for the 'soft' or 'softfp' floating
  569. point models.
  570. If your processor has a floating point unit, and you don't
  571. depend on existing pre-compiled code, this option is most
  572. likely the best choice.
  573. endchoice
  574. choice
  575. prompt "Floating point strategy"
  576. default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
  577. default BR2_ARM_FPU_FPV5D16 if BR2_ARM_CPU_HAS_FPV5
  578. default BR2_ARM_FPU_FPV4D16 if BR2_ARM_CPU_HAS_FPV4
  579. default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
  580. default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
  581. default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
  582. default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_FPU
  583. config BR2_ARM_SOFT_FLOAT
  584. bool "Soft float"
  585. depends on BR2_ARM_EABI
  586. select BR2_SOFT_FLOAT
  587. help
  588. This option allows to use software emulated floating
  589. point. It should be used for ARM cores that do not include a
  590. Vector Floating Point unit, such as ARMv5 cores (ARM926 for
  591. example) or certain ARMv6 cores.
  592. config BR2_ARM_FPU_VFPV2
  593. bool "VFPv2"
  594. depends on BR2_ARM_CPU_HAS_VFPV2
  595. help
  596. This option allows to use the VFPv2 floating point unit, as
  597. available in some ARMv5 processors (ARM926EJ-S) and some
  598. ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
  599. MPCore).
  600. Note that this option is also safe to use for newer cores
  601. such as Cortex-A, because the VFPv3 and VFPv4 units are
  602. backward compatible with VFPv2.
  603. config BR2_ARM_FPU_VFPV3
  604. bool "VFPv3"
  605. depends on BR2_ARM_CPU_HAS_VFPV3
  606. help
  607. This option allows to use the VFPv3 floating point unit, as
  608. available in some ARMv7 processors (Cortex-A{8, 9}). This
  609. option requires a VFPv3 unit that has 32 double-precision
  610. registers, which is not necessarily the case in all SOCs
  611. based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
  612. instead, which is guaranteed to work on all Cortex-A{8, 9}.
  613. Note that this option is also safe to use for newer cores
  614. that have a VFPv4 unit, because VFPv4 is backward compatible
  615. with VFPv3. They must of course also have 32
  616. double-precision registers.
  617. config BR2_ARM_FPU_VFPV3D16
  618. bool "VFPv3-D16"
  619. depends on BR2_ARM_CPU_HAS_VFPV3
  620. help
  621. This option allows to use the VFPv3 floating point unit, as
  622. available in some ARMv7 processors (Cortex-A{8, 9}). This
  623. option requires a VFPv3 unit that has 16 double-precision
  624. registers, which is generally the case in all SOCs based on
  625. Cortex-A{8, 9}, even though VFPv3 is technically optional on
  626. Cortex-A9. This is the safest option for those cores.
  627. Note that this option is also safe to use for newer cores
  628. such that have a VFPv4 unit, because the VFPv4 is backward
  629. compatible with VFPv3.
  630. config BR2_ARM_FPU_VFPV4
  631. bool "VFPv4"
  632. depends on BR2_ARM_CPU_HAS_VFPV4
  633. help
  634. This option allows to use the VFPv4 floating point unit, as
  635. available in some ARMv7 processors (Cortex-A{5, 7, 12,
  636. 15}). This option requires a VFPv4 unit that has 32
  637. double-precision registers, which is not necessarily the
  638. case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
  639. unsure, you should probably use VFPv4-D16 instead.
  640. Note that if you want binary code that works on all ARMv7
  641. cores, including the earlier Cortex-A{8, 9}, you should
  642. instead select VFPv3.
  643. config BR2_ARM_FPU_VFPV4D16
  644. bool "VFPv4-D16"
  645. depends on BR2_ARM_CPU_HAS_VFPV4
  646. help
  647. This option allows to use the VFPv4 floating point unit, as
  648. available in some ARMv7 processors (Cortex-A{5, 7, 12,
  649. 15}). This option requires a VFPv4 unit that has 16
  650. double-precision registers, which is always available on
  651. Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
  652. Cortex-A7.
  653. Note that if you want binary code that works on all ARMv7
  654. cores, including the earlier Cortex-A{8, 9}, you should
  655. instead select VFPv3-D16.
  656. config BR2_ARM_FPU_NEON
  657. bool "NEON"
  658. depends on BR2_ARM_CPU_HAS_NEON
  659. help
  660. This option allows to use the NEON SIMD unit, as available
  661. in some ARMv7 processors, as a floating-point unit. It
  662. should however be noted that using NEON for floating point
  663. operations doesn't provide a complete compatibility with the
  664. IEEE 754.
  665. config BR2_ARM_FPU_NEON_VFPV4
  666. bool "NEON/VFPv4"
  667. depends on BR2_ARM_CPU_HAS_VFPV4
  668. depends on BR2_ARM_CPU_HAS_NEON
  669. help
  670. This option allows to use both the VFPv4 and the NEON SIMD
  671. units for floating point operations. Note that some ARMv7
  672. cores do not necessarily have VFPv4 and/or NEON support, for
  673. example on Cortex-A5 and Cortex-A7, support for VFPv4 and
  674. NEON is optional.
  675. config BR2_ARM_FPU_FPV4D16
  676. bool "FPv4-D16"
  677. depends on BR2_ARM_CPU_HAS_FPV4
  678. help
  679. This option allows to use the FPv4-SP (single precision)
  680. floating point unit, as available in some ARMv7m processors
  681. (Cortex-M4).
  682. config BR2_ARM_FPU_FPV5D16
  683. bool "FPv5-D16"
  684. depends on BR2_ARM_CPU_HAS_FPV5
  685. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  686. help
  687. This option allows to use the FPv5-SP (single precision)
  688. floating point unit, as available in some ARMv7m processors
  689. (Cortex-M7).
  690. Note that if you want binary code that works on the earlier
  691. Cortex-M4, you should instead select FPv4-D16.
  692. config BR2_ARM_FPU_FPV5DPD16
  693. bool "FPv5-DP-D16"
  694. depends on BR2_ARM_CPU_HAS_FPV5
  695. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  696. help
  697. This option allows to use the FPv5-DP (double precision)
  698. floating point unit, as available in some ARMv7m processors
  699. (Cortex-M7).
  700. Note that if you want binary code that works on the earlier
  701. Cortex-M4, you should instead select FPv4-D16.
  702. config BR2_ARM_FPU_FP_ARMV8
  703. bool "FP-ARMv8"
  704. depends on BR2_ARM_CPU_HAS_FP_ARMV8
  705. help
  706. This option allows to use the ARMv8 floating point unit.
  707. config BR2_ARM_FPU_NEON_FP_ARMV8
  708. bool "NEON/FP-ARMv8"
  709. depends on BR2_ARM_CPU_HAS_FP_ARMV8
  710. depends on BR2_ARM_CPU_HAS_NEON
  711. help
  712. This option allows to use both the ARMv8 floating point unit
  713. and the NEON SIMD unit for floating point operations.
  714. endchoice
  715. choice
  716. prompt "ARM instruction set"
  717. depends on BR2_arm || BR2_armeb
  718. config BR2_ARM_INSTRUCTIONS_ARM
  719. bool "ARM"
  720. depends on BR2_ARM_CPU_HAS_ARM
  721. help
  722. This option instructs the compiler to generate regular ARM
  723. instructions, that are all 32 bits wide.
  724. config BR2_ARM_INSTRUCTIONS_THUMB
  725. bool "Thumb"
  726. depends on BR2_ARM_CPU_HAS_THUMB
  727. # Thumb-1 and VFP are not compatible
  728. depends on BR2_ARM_SOFT_FLOAT
  729. help
  730. This option instructions the compiler to generate Thumb
  731. instructions, which allows to mix 16 bits instructions and
  732. 32 bits instructions. This generally provides a much smaller
  733. compiled binary size.
  734. comment "Thumb1 is not compatible with VFP"
  735. depends on BR2_ARM_CPU_HAS_THUMB
  736. depends on !BR2_ARM_SOFT_FLOAT
  737. config BR2_ARM_INSTRUCTIONS_THUMB2
  738. bool "Thumb2"
  739. depends on BR2_ARM_CPU_HAS_THUMB2
  740. help
  741. This option instructions the compiler to generate Thumb2
  742. instructions, which allows to mix 16 bits instructions and
  743. 32 bits instructions. This generally provides a much smaller
  744. compiled binary size.
  745. endchoice
  746. config BR2_ARCH
  747. default "arm" if BR2_arm
  748. default "armeb" if BR2_armeb
  749. default "aarch64" if BR2_aarch64
  750. default "aarch64_be" if BR2_aarch64_be
  751. config BR2_ENDIAN
  752. default "LITTLE" if (BR2_arm || BR2_aarch64)
  753. default "BIG" if (BR2_armeb || BR2_aarch64_be)
  754. config BR2_GCC_TARGET_CPU
  755. # armv4
  756. default "arm920t" if BR2_arm920t
  757. default "arm922t" if BR2_arm922t
  758. default "fa526" if BR2_fa526
  759. default "strongarm" if BR2_strongarm
  760. # armv5
  761. default "arm926ej-s" if BR2_arm926t
  762. default "iwmmxt" if BR2_iwmmxt
  763. default "xscale" if BR2_xscale
  764. # armv6
  765. default "arm1136j-s" if BR2_arm1136j_s
  766. default "arm1136jf-s" if BR2_arm1136jf_s
  767. default "arm1176jz-s" if BR2_arm1176jz_s
  768. default "arm1176jzf-s" if BR2_arm1176jzf_s
  769. default "mpcore" if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
  770. default "mpcorenovfp" if BR2_arm11mpcore
  771. # armv7a
  772. default "cortex-a5" if BR2_cortex_a5
  773. default "cortex-a7" if BR2_cortex_a7
  774. default "cortex-a8" if BR2_cortex_a8
  775. default "cortex-a9" if BR2_cortex_a9
  776. default "cortex-a12" if BR2_cortex_a12
  777. default "cortex-a15" if BR2_cortex_a15
  778. default "cortex-a15.cortex-a7" if BR2_cortex_a15_a7
  779. default "cortex-a17" if BR2_cortex_a17
  780. default "cortex-a17.cortex-a7" if BR2_cortex_a17_a7
  781. default "marvell-pj4" if BR2_pj4
  782. # armv7m
  783. default "cortex-m3" if BR2_cortex_m3
  784. default "cortex-m4" if BR2_cortex_m4
  785. default "cortex-m7" if BR2_cortex_m7
  786. # armv8a
  787. default "cortex-a32" if BR2_cortex_a32
  788. default "cortex-a35" if BR2_cortex_a35
  789. default "cortex-a53" if BR2_cortex_a53
  790. default "cortex-a57" if BR2_cortex_a57
  791. default "cortex-a57.cortex-a53" if BR2_cortex_a57_a53
  792. default "cortex-a72" if BR2_cortex_a72
  793. default "cortex-a72.cortex-a53" if BR2_cortex_a72_a53
  794. default "cortex-a73" if BR2_cortex_a73
  795. default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35
  796. default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53
  797. default "emag" if BR2_emag
  798. default "exynos-m1" if BR2_exynos_m1
  799. default "falkor" if BR2_falkor
  800. default "phecda" if BR2_phecda
  801. default "qdf24xx" if BR2_qdf24xx
  802. default "thunderx" if BR2_thunderx && !BR2_TOOLCHAIN_GCC_AT_LEAST_9
  803. default "octeontx" if BR2_thunderx && BR2_TOOLCHAIN_GCC_AT_LEAST_9
  804. default "thunderxt81" if BR2_thunderxt81 && !BR2_TOOLCHAIN_GCC_AT_LEAST_9
  805. default "octeontx81" if BR2_thunderxt81 && BR2_TOOLCHAIN_GCC_AT_LEAST_9
  806. default "thunderxt83" if BR2_thunderxt83 && !BR2_TOOLCHAIN_GCC_AT_LEAST_9
  807. default "octeontx83" if BR2_thunderxt83 && BR2_TOOLCHAIN_GCC_AT_LEAST_9
  808. default "thunderxt88" if BR2_thunderxt88
  809. default "thunderxt88p1" if BR2_thunderxt88p1
  810. default "xgene1" if BR2_xgene1
  811. # armv8.1a
  812. default "thunderx2t99" if BR2_thunderx2t99
  813. default "thunderx2t99p1" if BR2_thunderx2t99p1
  814. default "vulcan" if BR2_vulcan
  815. # armv8.2a
  816. default "cortex-a55" if BR2_cortex_a55
  817. default "cortex-a75" if BR2_cortex_a75
  818. default "cortex-a75.cortex-a55" if BR2_cortex_a75_a55
  819. default "cortex-a76" if BR2_cortex_a76
  820. default "cortex-a76.cortex-a55" if BR2_cortex_a76_a55
  821. default "neoverse-n1" if BR2_neoverse_n1
  822. default "tsv110" if BR2_tsv110
  823. # armv8.4a
  824. default "saphira" if BR2_saphira
  825. config BR2_GCC_TARGET_ABI
  826. default "aapcs-linux" if BR2_arm || BR2_armeb
  827. default "lp64" if BR2_aarch64 || BR2_aarch64_be
  828. config BR2_GCC_TARGET_FPU
  829. default "vfp" if BR2_ARM_FPU_VFPV2
  830. default "vfpv3" if BR2_ARM_FPU_VFPV3
  831. default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
  832. default "vfpv4" if BR2_ARM_FPU_VFPV4
  833. default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
  834. default "neon" if BR2_ARM_FPU_NEON
  835. default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
  836. default "fpv4-sp-d16" if BR2_ARM_FPU_FPV4D16
  837. default "fpv5-sp-d16" if BR2_ARM_FPU_FPV5D16
  838. default "fpv5-d16" if BR2_ARM_FPU_FPV5DPD16
  839. default "fp-armv8" if BR2_ARM_FPU_FP_ARMV8
  840. default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
  841. depends on BR2_arm || BR2_armeb
  842. config BR2_GCC_TARGET_FLOAT_ABI
  843. default "soft" if BR2_ARM_SOFT_FLOAT
  844. default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
  845. default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
  846. config BR2_GCC_TARGET_MODE
  847. default "arm" if BR2_ARM_INSTRUCTIONS_ARM
  848. default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
  849. config BR2_READELF_ARCH_NAME
  850. default "ARM" if BR2_arm || BR2_armeb
  851. default "AArch64" if BR2_aarch64 || BR2_aarch64_be
  852. # vim: ft=kconfig
  853. # -*- mode:kconfig; -*-