spi_flash_internal.h 4.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * SPI flash internal definitions
  4. *
  5. * Copyright (C) 2008 Atmel Corporation
  6. */
  7. /* Common parameters -- kind of high, but they should only occur when there
  8. * is a problem (and well your system already is broken), so err on the side
  9. * of caution in case we're dealing with slower SPI buses and/or processors.
  10. */
  11. #ifndef __SPI_FLASH_INTERNAL_H_
  12. #define __SPI_FLASH_INTERNAL_H_
  13. #include <comdef.h>
  14. #define CONFIG_SYS_HZ 12000000
  15. #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
  16. #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
  17. #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
  18. /* Common commands */
  19. #define CMD_READ_ARRAY_SLOW 0x03 /* Read Data Bytes */
  20. #define CMD_READ_ARRAY_FAST 0x0B
  21. #define CMD_READ_ARRAY_DUAL 0x3B
  22. #define CMD_READ_ARRAY_QUAD 0X6B
  23. #define CMD_READ_ARRAY_LEGACY 0xEB
  24. #define CMD_WRITE_STATUS 0x01 /* Write Status Register */
  25. #define CMD_WRITE_STATUS_1 0x01 /* Write Status Register */
  26. #define CMD_WRITE_STATUS_2 0x31 /* Write Status Register */
  27. #define CMD_WRITE_STATUS_3 0x11 /* Write Status Register */
  28. #define CMD_READ_STATUS_1 0x05 /* Read Status Register */
  29. #define CMD_READ_STATUS_2 0x35 /* Read Status Register */
  30. #define CMD_READ_STATUS_3 0x15 /* Read Status Register */
  31. #define CMD_PAGE_PROGRAM 0x02 /* Page Program */
  32. #define CMD_PAGE_PROGRAM_QUAD 0x32
  33. #define CMD_WRITE_DISABLE 0x04 /* Write Disable */
  34. #define CMD_READ_STATUS 0x05 /* Read Status Register */
  35. #define CMD_READ_STATUS1 0x35
  36. #define CMD_WRITE_ENABLE 0x06 /* Write Enable */
  37. #define CMD_W25_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
  38. #define CMD_W25_SE 0x20 /* Sector (4K) Erase */
  39. #define CMD_W25_BE 0xd8 /* Block (64K) Erase */
  40. #define CMD_W25_CE 0xc7 /* Chip Erase */
  41. #define CMD_W25_DP 0xb9 /* Deep Power-down */
  42. #define CMD_W25_RES 0xab /* Release from DP, and Read Signature */
  43. #define CMD_W25_BE_32 0x52 /* Sector (32K) Erase */
  44. #define CMD_STATUS_ENABLE 0x50
  45. /* Common status */
  46. #define STATUS_WIP 0x01
  47. #define FLASH_ENABLE 0x02
  48. #define STATUS_QE (0x01 << 1)
  49. /* Send a single-byte command to the device and read the response */
  50. int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, u32 len);
  51. /*
  52. * Send a multi-byte command to the device and read the response. Used
  53. * for flash array reads, etc.
  54. */
  55. int spi_flash_cmd_read(struct spi_slave *spi, u8 *cmd,u32 cmd_len,
  56. void *data, u32 data_len);
  57. int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
  58. u32 len, void *data, u32 mode);
  59. int spi_flash_read_mode(struct spi_flash *flash, u32 offset,
  60. u32 len, void *data, u32 mode);
  61. /*
  62. * Send a multi-byte command to the device followed by (optional)
  63. * data. Used for programming the flash array, etc.
  64. */
  65. int spi_flash_cmd_write(struct spi_slave *spi, u8 *cmd, u32 cmd_len,
  66. void *data, u32 data_len);
  67. /*
  68. * Write the requested data out breaking it up into multiple write
  69. * commands as needed per the write size.
  70. */
  71. int spi_flash_cmd_write_mode(struct spi_flash *flash, u32 offset,
  72. u32 len, void *buf, u32 mode);
  73. /*
  74. * Enable writing on the SPI flash.
  75. */
  76. int spi_flash_cmd_write_enable(struct spi_flash *flash);
  77. /*
  78. * Disable writing on the SPI flash.
  79. */
  80. int spi_flash_cmd_write_disable(struct spi_slave *spi);
  81. /*
  82. * Same as spi_flash_cmd_read() except it also claims/releases the SPI
  83. * bus. Used as common part of the ->read() operation.
  84. */
  85. int spi_flash_read_common(struct spi_flash *flash, u8 *cmd,
  86. u32 cmd_len, void *data, u32 data_len);
  87. /* Send a command to the device and wait for some bit to clear itself. */
  88. int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
  89. u8 cmd, u8 poll_bit);
  90. /*
  91. * Send the read status command to the device and wait for the wip
  92. * (write-in-progress) bit to clear itself.
  93. */
  94. int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
  95. /* Erase sectors. */
  96. int spi_flash_cmd_erase(struct spi_flash *flash, u8 erase_cmd, u32 offset, u32 len);
  97. int spi_flash_erase_mode(struct spi_flash *flash, u32 offset, u32 len, u32 mode);
  98. /* Manufacturer-specific probe functions */
  99. struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode);
  100. struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode);
  101. struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode);
  102. struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode);
  103. struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode);
  104. struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode);
  105. struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode);
  106. struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode);
  107. struct spi_flash *spi_flash_probe_gigadevice(struct spi_slave *spi, u8 *idcode);
  108. struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
  109. unsigned int max_hz, u32 mode, u32 fifo_width);
  110. #endif