uart.c 6.9 KB

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  1. #include <stdarg.h>
  2. #include <comdef.h>
  3. #include <uart.h>
  4. #include <sys.h>
  5. #include <ezGPIO_fullMux_ctrl_macro.h>
  6. #include <clkgen_ctrl_macro.h>
  7. #include <rstgen_ctrl_macro.h>
  8. #include <vic_module_reset_clkgen.h>
  9. #define UART_CLK (100000000UL)
  10. /* CLK 32M */
  11. #define UART_BUADRATE_32MCLK_9600 9600
  12. #define UART_BUADRATE_32MCLK_57600 57600
  13. #define UART_BUADRATE_32MCLK_115200 115200
  14. #define UART_BUADRATE_32MCLK_125000 125000
  15. #define UART_BUADRATE_32MCLK_222222 222222 ///230400
  16. #define UART_BUADRATE_32MCLK_333333 333333 ///380400
  17. #define UART_BUADRATE_32MCLK_400000 400000 ///460800
  18. #define UART_BUADRATE_32MCLK_500000 500000
  19. #define UART_BUADRATE_32MCLK_666666 666666 ///921600
  20. #define UART_BUADRATE_32MCLK_1M 1000000
  21. #define UART_BUADRATE_32MCLK_2M 2000000
  22. /* CLK 64M */
  23. #define UART_BUADRATE_64MCLK_38400 38400
  24. #define UART_BUADRATE_64MCLK_57600 57600
  25. #define UART_BUADRATE_64MCLK_115200 115200
  26. #define UART_BUADRATE_64MCLK_230400 230400
  27. #define UART_BUADRATE_64MCLK_380400 380400
  28. #define UART_BUADRATE_64MCLK_444444 444444 ///460800
  29. #define UART_BUADRATE_64MCLK_500000 500000
  30. #define UART_BUADRATE_64MCLK_571428 571428
  31. #define UART_BUADRATE_64MCLK_666666 666666 ///921600
  32. #define UART_BUADRATE_64MCLK_800000 800000 ///921600
  33. #define UART_BUADRATE_64MCLK_1M 1000000
  34. #define UART_BUADRATE_64MCLK_2M 2000000
  35. ////#define UART_BUADRATE_2_5M 2500000 ///
  36. ////#define UART_BUADRATE_3M 3000000 ///
  37. #define UART_BUADRATE_64MCLK_4M 4000000 ///shiboqi
  38. unsigned int uart_id=0;
  39. static const u64 uart_base[4] = {
  40. UART0_HS_BASE_ADDR,
  41. UART1_HS_BASE_ADDR,
  42. UART2_BASE_ADDR,
  43. UART3_BASE_ADDR,
  44. };
  45. static unsigned int serial_in(int offset)
  46. {
  47. offset <<= 2;
  48. return readl((volatile void *)(uart_base[uart_id] + offset));
  49. }
  50. static void serial_out(int offset, int value)
  51. {
  52. offset <<= 2;
  53. writel(value, (volatile void *)(uart_base[uart_id] + offset));
  54. }
  55. int __serial_tstc()
  56. {
  57. return ((serial_in(REG_LSR)) & (1 << 0));
  58. }
  59. int serial_tstc()
  60. {
  61. return __serial_tstc();
  62. }
  63. void uart_init(int id)
  64. {
  65. unsigned int divisor;
  66. unsigned char lcr_cache;
  67. #if 0 //repeat init
  68. switch(id)
  69. {
  70. case 0:
  71. vic_uart0_reset_clk_gpio_misc_enable;
  72. break;
  73. case 1:
  74. vic_uart1_reset_clk_gpio_misc_enable;
  75. break;
  76. case 2:
  77. vic_uart2_reset_clk_gpio_misc_enable
  78. break;
  79. case 3:
  80. _ENABLE_CLOCK_clk_uart3_apb_;
  81. _ENABLE_CLOCK_clk_uart3_core_;
  82. _ASSERT_RESET_rstgen_rstn_uart3_apb_;
  83. _ASSERT_RESET_rstgen_rstn_uart3_core_;
  84. _CLEAR_RESET_rstgen_rstn_uart3_core_;
  85. _CLEAR_RESET_rstgen_rstn_uart3_apb_;
  86. SET_GPIO_14_dout_uart3_pad_sout;
  87. SET_GPIO_14_doen_LOW;
  88. SET_GPIO_13_doen_HIGH;
  89. SET_GPIO_uart3_pad_sin(13);
  90. break;
  91. default:
  92. return;
  93. }
  94. #endif
  95. uart_id = id;
  96. divisor = (UART_CLK / UART_BUADRATE_32MCLK_115200) >> 4;
  97. lcr_cache = serial_in(REG_LCR);
  98. serial_out(REG_LCR, (LCR_DLAB | lcr_cache));
  99. serial_out(REG_BRDL,(unsigned char)(divisor & 0xff));
  100. serial_out(REG_BRDH,(unsigned char)((divisor >> 8) & 0xff));
  101. /* restore the DLAB to access the baud rate divisor registers */
  102. serial_out(REG_LCR, lcr_cache);
  103. /* 8 data bits, 1 stop bit, no parity, clear DLAB */
  104. serial_out(REG_LCR, (LCR_CS8 | LCR_1_STB | LCR_PDIS));
  105. serial_out(REG_MDC, 0); /*disable flow control*/
  106. /*
  107. * Program FIFO: enabled, mode 0 (set for compatibility with quark),
  108. * generate the interrupt at 8th byte
  109. * Clear TX and RX FIFO
  110. */
  111. serial_out(REG_FCR, (FCR_FIFO | FCR_MODE1 | /*FCR_FIFO_1*/FCR_FIFO_8 | FCR_RCVRCLR | FCR_XMITCLR));
  112. serial_out(REG_IER, 0);//dis the ser interrupt
  113. }
  114. int _putc(char c) {
  115. do
  116. {}while((serial_in(REG_LSR) & LSR_THRE) == 0);
  117. serial_out(REG_THR, c);
  118. return 0;
  119. }
  120. void rlSendString(char *s)
  121. {
  122. while (*s){
  123. _putc(*s++);
  124. }
  125. }
  126. int CtrlBreak( void )
  127. {
  128. int retflag;
  129. do{
  130. retflag = serial_getc();
  131. if( retflag == 0x03 ){
  132. break;
  133. }
  134. }while( retflag );
  135. return retflag;
  136. }
  137. int serial_getc()
  138. {
  139. /* Wait here until the the FIFO is not full */
  140. while (!(serial_in(REG_LSR) & (1 << 0))){};
  141. return serial_in(REG_RDR);
  142. }
  143. void serial_gets(char *pstr)
  144. {
  145. unsigned char c;
  146. unsigned char *pstrorg;
  147. pstrorg = (unsigned char *) pstr;
  148. while ((c = serial_getc()) != '\r')
  149. {
  150. if (c == '\b'){
  151. if ((int) *pstrorg < (int) *pstr){
  152. rlSendString("\b \b");
  153. pstr--;
  154. }
  155. }else{
  156. *pstr++ = c;
  157. _putc(c);
  158. }
  159. }
  160. *pstr = '\0';
  161. rlSendString("\r\n");
  162. }
  163. void _puts(const char * s) {
  164. while (*s != '\0'){
  165. _putc(*s++);
  166. }
  167. }
  168. void print_ubyte_hex(unsigned char bval)
  169. {
  170. static const char digits[16] = "0123456789ABCDEF";
  171. char tmp[2];
  172. int dig=0;
  173. dig = ((bval&0xf0)>>4);
  174. tmp[0] = digits[dig];
  175. dig = (bval&0x0f);
  176. tmp[1] = digits[dig];
  177. _putc(tmp[0]);
  178. _putc(tmp[1]);
  179. }
  180. int serial_nowait_getc()
  181. {
  182. unsigned int status;
  183. status = serial_in(REG_LSR);
  184. if (!(status & (1 << 0))) {
  185. status = 0;//NO_POLL_CHAR;
  186. goto out;
  187. }
  188. status = serial_in(REG_RDR);
  189. out:
  190. return status;
  191. }
  192. #if 1
  193. int vnprintf(char* out, size_t n, const char* s, va_list vl)
  194. {
  195. bool format = false;
  196. bool longarg = false;
  197. size_t pos = 0;
  198. for( ; *s; s++)
  199. {
  200. if(format)
  201. {
  202. switch(*s)
  203. {
  204. case 'l':
  205. longarg = true;
  206. break;
  207. case 'p':
  208. longarg = true;
  209. if (++pos < n) out[pos-1] = '0';
  210. if (++pos < n) out[pos-1] = 'x';
  211. case 'x':
  212. {
  213. long num = longarg ? va_arg(vl, long) : va_arg(vl, int);
  214. for(int i = 2*(longarg ? sizeof(long) : sizeof(int))-1; i >= 0; i--) {
  215. int d = (num >> (4*i)) & 0xF;
  216. if (++pos < n) out[pos-1] = (d < 10 ? '0'+d : 'a'+d-10);
  217. }
  218. longarg = false;
  219. format = false;
  220. break;
  221. }
  222. case 'd':
  223. {
  224. long num = longarg ? va_arg(vl, long) : va_arg(vl, int);
  225. if (num < 0) {
  226. num = -num;
  227. if (++pos < n) out[pos-1] = '-';
  228. }
  229. long digits = 1;
  230. for (long nn = num; nn /= 10; digits++)
  231. ;
  232. for (int i = digits-1; i >= 0; i--) {
  233. if (pos + i + 1 < n) out[pos + i] = '0' + (num % 10);
  234. num /= 10;
  235. }
  236. pos += digits;
  237. longarg = false;
  238. format = false;
  239. break;
  240. }
  241. case 's':
  242. {
  243. const char* s2 = va_arg(vl, const char*);
  244. while (*s2) {
  245. if (++pos < n)
  246. out[pos-1] = *s2;
  247. s2++;
  248. }
  249. longarg = false;
  250. format = false;
  251. break;
  252. }
  253. case 'c':
  254. {
  255. if (++pos < n) out[pos-1] = (char)va_arg(vl,int);
  256. longarg = false;
  257. format = false;
  258. break;
  259. }
  260. default:
  261. break;
  262. }
  263. }
  264. else if(*s == '%')
  265. format = true;
  266. else
  267. if (++pos < n) out[pos-1] = *s;
  268. }
  269. if (pos < n)
  270. out[pos] = 0;
  271. else if (n)
  272. out[n-1] = 0;
  273. return pos;
  274. }
  275. static void vprintk(const char* s, va_list vl)
  276. {
  277. char out[256];
  278. int res = vnprintf(out, sizeof(out), s, vl);
  279. _puts(out);
  280. }
  281. void printk(const char* s, ...)
  282. {
  283. va_list vl;
  284. va_start(vl, s);
  285. vprintk(s, vl);
  286. va_end(vl);
  287. }
  288. #endif