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add macro to distinguish BEAGLEV and EVBV1

yanhong.wang 3 years ago
parent
commit
4547a8d564
2 changed files with 46 additions and 4 deletions
  1. 41 1
      boot/bootmain.c
  2. 5 3
      build/Makefile

+ 41 - 1
boot/bootmain.c

@@ -3,6 +3,15 @@
 #include "spi.h"
 #include "encoding.h"
 #include "clkgen_ctrl_macro.h"
+#include "rstgen_ctrl_macro.h"
+#include "syscon_iopad_ctrl_macro.h"
+
+#if defined(BEAGLEV)
+#include <syscon_sysmain_ctrl_macro.h>
+#include <ezGPIO_fullMux_ctrl_macro.h>
+#include <rstgen_ctrl_macro.h>
+#endif
+
 
 typedef void ( *STARTRUNNING )( unsigned int par1 );
 
@@ -121,7 +130,7 @@ static void chip_clk_init()
 	
 	// slow down nne bus can fix nne50 & vp6 ram scan issue,
 	// as well as vin_subsys reg scan issue.
-	_SWITCH_CLOCK_clk_nne_bus_SOURCE_clk_cpu_axi_;
+//	_SWITCH_CLOCK_clk_nne_bus_SOURCE_clk_cpu_axi_;
 }
 
 /*only hartid 0 call this function*/
@@ -132,6 +141,37 @@ void BootMain(void)
 	/*switch to pll mode*/
 	chip_clk_init();
 
+//for illegal instruction exception
+	_SET_SYSCON_REG_register50_SCFG_funcshare_pad_ctrl_18(0x00c000c0);
+
+	_CLEAR_RESET_rstgen_rstn_usbnoc_axi_;
+	_CLEAR_RESET_rstgen_rstn_hifi4noc_axi_;
+
+	_ENABLE_CLOCK_clk_x2c_axi_;
+	_CLEAR_RESET_rstgen_rstn_x2c_axi_;
+
+	_CLEAR_RESET_rstgen_rstn_dspx2c_axi_;
+	_CLEAR_RESET_rstgen_rstn_dma1p_axi_;
+
+	_ENABLE_CLOCK_clk_msi_apb_;
+	_CLEAR_RESET_rstgen_rstn_msi_apb_;
+
+	_ASSERT_RESET_rstgen_rstn_x2c_axi_;
+	_CLEAR_RESET_rstgen_rstn_x2c_axi_;
+//end for illegal instruction exception
+
+#if defined(BEAGLEV)
+	_SET_SYSCON_REG_register69_core1_en(1);
+	_SET_SYSCON_REG_register104_SCFG_io_padshare_sel(6);
+	_SET_SYSCON_REG_register32_SCFG_funcshare_pad_ctrl_0(0x00c00000);
+	_SET_SYSCON_REG_register33_SCFG_funcshare_pad_ctrl_1(0x00c000c0);
+	_SET_SYSCON_REG_register34_SCFG_funcshare_pad_ctrl_2(0x00c000c0);
+	_SET_SYSCON_REG_register35_SCFG_funcshare_pad_ctrl_3(0x00c000c0);
+	_SET_SYSCON_REG_register39_SCFG_funcshare_pad_ctrl_7(0x00c300c3);
+	_SET_SYSCON_REG_register38_SCFG_funcshare_pad_ctrl_6(0x00c00000);
+
+#endif
+
 	uart_init(3);
 	
 	writel(0x18000000, 0x1801fffc);

+ 5 - 3
build/Makefile

@@ -7,12 +7,14 @@ LD=${CROSSCOMPILE}ld
 OBJCOPY=${CROSSCOMPILE}objcopy
 OBJDUMP=${CROSSCOMPILE}objdump
 
+# BOARD IS BEAGLEV OR EVBV1
+BOARD=EVBV1
 
 SUFFIX=$(shell date +%y%m%d)
 GIT_VERSION=$(shell git show -s --pretty=format:%h)
 BLD_VERSION=$(SUFFIX)-$(GIT_VERSION)
 
-TARGET 	= bootloader-$(SUFFIX)
+TARGET 	= bootloader-$(BOARD)-$(SUFFIX)
 LINKER_SCRIPT := bootloader.lds
 MAP_FILE := bootloader.map
 
@@ -28,7 +30,7 @@ INCLUDE_DIR=-I. -I../boot\
 RISCV_ARCH := rv64imafdc
 RISCV_ABI  := lp64d 
 
-CFLAGS += -O2 -g -c -Wall -DVERSION=\"$(BLD_VERSION)\"
+CFLAGS += -O2 -g -c -Wall -DVERSION=\"$(BLD_VERSION)\" -D$(BOARD)
 CFLAGS += -march=$(RISCV_ARCH)
 CFLAGS += -mabi=$(RISCV_ABI)
 CFLAGS += -mcmodel=medany
@@ -79,4 +81,4 @@ $(TARGET).elf:$(OBJECTLIST)
 	
 .PHONY: clean
 clean:
-	rm -f ../*/*.o $(TARGET).bin *.elf *.asm *.map
+	rm -f ../*/*.o $(TARGET).bin $(TARGET).bin.out $(TARGET).elf $(TARGET).asm *.map